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<title>netbsd/sys/arch, branch lockcount-9.3</title>
<subtitle>NetBSD fork for lockdoc analysis</subtitle>
<link rel='alternate' type='text/html' href='http://git.infra.scholz.ruhr/netbsd/'/>
<entry>
<title>Add lockcount output via printf</title>
<updated>2022-12-13T09:00:55+00:00</updated>
<author>
<name>Merlin Scholz</name>
<email>merlin@scholz.ruhr</email>
</author>
<published>2022-12-13T09:00:55+00:00</published>
<link rel='alternate' type='text/html' href='http://git.infra.scholz.ruhr/netbsd/commit/?id=57b8faa72823ed98eb542eccbd0ab203fec47345'/>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>First concept for lock counting</title>
<updated>2022-12-10T17:00:09+00:00</updated>
<author>
<name>Merlin Scholz</name>
<email>merlin@scholz.ruhr</email>
</author>
<published>2022-12-10T17:00:09+00:00</published>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Decouple LOCKDEBUG and LOCKDOC kernel flags</title>
<updated>2022-11-02T21:37:45+00:00</updated>
<author>
<name>Merlin Scholz</name>
<email>merlin@scholz.ruhr</email>
</author>
<published>2022-11-02T21:37:45+00:00</published>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Separate LOCKDEBUG and LOCKDOG kernel flags</title>
<updated>2022-10-24T16:12:12+00:00</updated>
<author>
<name>Merlin Scholz</name>
<email>merlin@scholz.ruhr</email>
</author>
<published>2022-10-24T16:12:12+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>First proper lockdoc hooks</title>
<updated>2022-10-24T15:30:32+00:00</updated>
<author>
<name>Merlin Scholz</name>
<email>merlin@scholz.ruhr</email>
</author>
<published>2022-10-24T15:30:32+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>Port over code skeleton</title>
<updated>2022-10-17T16:23:56+00:00</updated>
<author>
<name>Merlin Scholz</name>
<email>merlin@scholz.ruhr</email>
</author>
<published>2022-10-17T16:23:56+00:00</published>
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</entry>
<entry>
<title>Add sterilized LOCKDOC kernel config</title>
<updated>2022-10-16T19:40:59+00:00</updated>
<author>
<name>Merlin Scholz</name>
<email>merlin@scholz.ruhr</email>
</author>
<published>2022-10-16T19:40:59+00:00</published>
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<id>2d00993316006b2e9d981c9131130cb9927e5fe4</id>
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</entry>
<entry>
<title>Pull up the following revisions, requested by msaitoh in ticket #1482:</title>
<updated>2022-07-27T14:40:07+00:00</updated>
<author>
<name>martin</name>
<email>martin@NetBSD.org</email>
</author>
<published>2022-07-27T14:40:07+00:00</published>
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	sys/dev/pci/pcidevs				1.1422,1.1445-1.1460
							via patch
	sys/arch/x86/pci/amdsmn.c			1.13

Update pcidevs:
- Add Intel Alder Lake devices and Intel 600 Series PCH devices.
- Add some Intel Xeon Scalable / Skylake-E devices.
- Fix AMD F16_HB from 0x1568 to 0x1538.
- Add some devices for AMD and improve some descriptions to clarify.
- Add VMware AHCI and NVMe.
- Update Intel 700 series Ethernet devices.
- Add some Broadcom devices.
- Add some Broadcom / LSI RAID cards.
- Fix typos and whitespace.</content>
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<pre>
	sys/dev/pci/pcidevs				1.1422,1.1445-1.1460
							via patch
	sys/arch/x86/pci/amdsmn.c			1.13

Update pcidevs:
- Add Intel Alder Lake devices and Intel 600 Series PCH devices.
- Add some Intel Xeon Scalable / Skylake-E devices.
- Fix AMD F16_HB from 0x1568 to 0x1538.
- Add some devices for AMD and improve some descriptions to clarify.
- Add VMware AHCI and NVMe.
- Update Intel 700 series Ethernet devices.
- Add some Broadcom devices.
- Add some Broadcom / LSI RAID cards.
- Fix typos and whitespace.</pre>
</div>
</content>
</entry>
<entry>
<title>Pull up following revision(s) (requested by skrll in ticket #1474):</title>
<updated>2022-06-16T14:22:02+00:00</updated>
<author>
<name>martin</name>
<email>martin@NetBSD.org</email>
</author>
<published>2022-06-16T14:22:02+00:00</published>
<link rel='alternate' type='text/html' href='http://git.infra.scholz.ruhr/netbsd/commit/?id=9d76de85464af96869b07892ed2e936dedf9819f'/>
<id>9d76de85464af96869b07892ed2e936dedf9819f</id>
<content type='text'>
	sys/arch/hppa/hppa/pmap.c: revision 1.120

Re-reading the PA2.0 Cache Move-In rules tells me we do indeed need to
purge the translations from the TLBs in pmap_procwr.

PR/56867: hppa: intermittent SIGSEGV reports in t_ptrace_wait's stepN
and setstepN test cases</content>
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<pre>
	sys/arch/hppa/hppa/pmap.c: revision 1.120

Re-reading the PA2.0 Cache Move-In rules tells me we do indeed need to
purge the translations from the TLBs in pmap_procwr.

PR/56867: hppa: intermittent SIGSEGV reports in t_ptrace_wait's stepN
and setstepN test cases</pre>
</div>
</content>
</entry>
<entry>
<title>Pull up following revision(s) (requested by skrll in ticket #1468):</title>
<updated>2022-06-10T17:34:22+00:00</updated>
<author>
<name>martin</name>
<email>martin@NetBSD.org</email>
</author>
<published>2022-06-10T17:34:22+00:00</published>
<link rel='alternate' type='text/html' href='http://git.infra.scholz.ruhr/netbsd/commit/?id=dbbb7aac217b4adf6399815840ad88ab75265f62'/>
<id>dbbb7aac217b4adf6399815840ad88ab75265f62</id>
<content type='text'>
	sys/arch/hppa/hppa/trap.c: revision 1.120
	sys/arch/hppa/include/ptrace.h: revision 1.11-1.12 (via patch)

Define a PTRACE_ILLEGAL_ASM

Match up PTRACE_BREAKPOINT_ASM with PTRACE_BREAKPOINT which is the
gdb breakpoint instruction.

Only report the SSBREAKPOINT break instruction as SIGTRAP/TRAP_TRACE. All
other break instructions will be reported as SIGTRAP/TRAP_BRKPT
This fixes a mistake I made back in 2008.

PR/56866: hppa: kernel gets confused between actual breakpoints and
single-step breakpoints</content>
<content type='xhtml'>
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<pre>
	sys/arch/hppa/hppa/trap.c: revision 1.120
	sys/arch/hppa/include/ptrace.h: revision 1.11-1.12 (via patch)

Define a PTRACE_ILLEGAL_ASM

Match up PTRACE_BREAKPOINT_ASM with PTRACE_BREAKPOINT which is the
gdb breakpoint instruction.

Only report the SSBREAKPOINT break instruction as SIGTRAP/TRAP_TRACE. All
other break instructions will be reported as SIGTRAP/TRAP_BRKPT
This fixes a mistake I made back in 2008.

PR/56866: hppa: kernel gets confused between actual breakpoints and
single-step breakpoints</pre>
</div>
</content>
</entry>
</feed>
