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authormartin <martin@NetBSD.org>2021-12-08 15:44:16 +0000
committermartin <martin@NetBSD.org>2021-12-08 15:44:16 +0000
commitffca8cf2c8cf3ef5c67f208265d20c117ce2872b (patch)
tree38e9ccc96d431f4f0d49007e4b3c3685a6f46710 /sys/dev
parentbef619f5c745f259dc3444b0382b3b402540f510 (diff)
Pull up the following revisions, requested by msaitoh in ticket #1391:
sys/arch/x86/include/specialreg.h 1.171, 1.173-1.178 sys/arch/x86/x86/identcpu.c 1.106, 1.117, 1.122 via patch sys/dev/nvmm/x86/nvmm_x86.c 1.18 sys/external/bsd/drm2/drm/drm_cache.c 1.14 sys/external/bsd/drm2/include/asm/cpufeature.h 1.5 usr.sbin/cpuctl/arch/i386.c 1.114-1.117 - Add LA57, PKE, PKS, CET, CET_U, CET_S, HWP, KL, AVX512_BF16, TME_EN and PCONFIG. - Rename some macros to match the x86 specification and the other OSes. - Print CPUID 0x8000008 %ebx on Intel, too. - Print CPUID leaf 7 subleaf 1. - Identify Tiger Lake, 3rd gen Xeon Scalable (Ice Lake), Elkhart Lake and Jasper Lake. - Add comment. - KNF. Whitespace fix.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/nvmm/x86/nvmm_x86.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/sys/dev/nvmm/x86/nvmm_x86.c b/sys/dev/nvmm/x86/nvmm_x86.c
index 6aea365bff8..69001f259f8 100644
--- a/sys/dev/nvmm/x86/nvmm_x86.c
+++ b/sys/dev/nvmm/x86/nvmm_x86.c
@@ -1,4 +1,4 @@
-/* $NetBSD: nvmm_x86.c,v 1.7.4.6 2020/09/13 11:54:10 martin Exp $ */
+/* $NetBSD: nvmm_x86.c,v 1.7.4.7 2021/12/08 15:44:16 martin Exp $ */
/*
* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.7.4.6 2020/09/13 11:54:10 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.7.4.7 2021/12/08 15:44:16 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -234,7 +234,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cpuid_00000001 = {
.ebx = ~0,
.ecx =
CPUID2_SSE3 |
- CPUID2_PCLMUL |
+ CPUID2_PCLMULQDQ |
/* CPUID2_DTES64 excluded */
/* CPUID2_MONITOR excluded */
/* CPUID2_DS_CPL excluded */
@@ -243,11 +243,11 @@ const struct nvmm_x86_cpuid_mask nvmm_cpuid_00000001 = {
/* CPUID2_EST excluded */
/* CPUID2_TM2 excluded */
CPUID2_SSSE3 |
- /* CPUID2_CID excluded */
+ /* CPUID2_CNXTID excluded */
/* CPUID2_SDBG excluded */
CPUID2_FMA |
CPUID2_CX16 |
- /* CPUID2_xTPR excluded */
+ /* CPUID2_XTPR excluded */
/* CPUID2_PDCM excluded */
/* CPUID2_PCID excluded, but re-included in VMX */
/* CPUID2_DCA excluded */
@@ -257,7 +257,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cpuid_00000001 = {
CPUID2_MOVBE |
CPUID2_POPCNT |
/* CPUID2_DEADLINE excluded */
- CPUID2_AES |
+ CPUID2_AESNI |
CPUID2_XSAVE |
CPUID2_OSXSAVE |
/* CPUID2_AVX excluded */
@@ -282,8 +282,8 @@ const struct nvmm_x86_cpuid_mask nvmm_cpuid_00000001 = {
CPUID_CMOV |
CPUID_PAT |
CPUID_PSE36 |
- /* CPUID_PN excluded */
- CPUID_CFLUSH |
+ /* CPUID_PSN excluded */
+ CPUID_CLFSH |
/* CPUID_DS excluded */
/* CPUID_ACPI excluded */
CPUID_MMX |
@@ -293,7 +293,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cpuid_00000001 = {
CPUID_SS |
CPUID_HTT |
/* CPUID_TM excluded */
- CPUID_SBF
+ CPUID_PBE
};
const struct nvmm_x86_cpuid_mask nvmm_cpuid_00000007 = {
@@ -381,7 +381,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cpuid_80000001 = {
/* CPUID_SVM excluded */
/* CPUID_EAPIC excluded */
CPUID_ALTMOVCR0 |
- CPUID_LZCNT |
+ CPUID_ABM |
CPUID_SSE4A |
CPUID_MISALIGNSSE |
CPUID_3DNOWPF |
@@ -408,10 +408,10 @@ const struct nvmm_x86_cpuid_mask nvmm_cpuid_80000001 = {
CPUID_MPC |
CPUID_XD |
CPUID_MMXX |
- CPUID_MMX |
+ CPUID_MMX |
CPUID_FXSR |
CPUID_FFXSR |
- CPUID_P1GB |
+ CPUID_PAGE1GB |
/* CPUID_RDTSCP excluded */
CPUID_EM64T |
CPUID_3DNOW2 |