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authorsommerfeld <sommerfeld@NetBSD.org>2000-01-01 21:57:45 +0000
committersommerfeld <sommerfeld@NetBSD.org>2000-01-01 21:57:45 +0000
commitb38548c58de48cd3bc75f50196ca3388812d56cc (patch)
tree89b9145b6b1a3443759abe5a82ebcd3a29d8aaf2 /sys/dev
parentc1d02ec5a320600b69c6325faf5241029e3d2d83 (diff)
On a cold suspend to disk, the Sony VAIO Z505 BIOS appears to not
preserve enough of the state of the PCIC to keep it interrupting on card insertion/removal.. Add a power hook to notice if the CSC_INTR device register is zeroed on resume, and if so, reset it to a sane value.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/ic/i82365.c38
-rw-r--r--sys/dev/ic/i82365reg.h8
2 files changed, 44 insertions, 2 deletions
diff --git a/sys/dev/ic/i82365.c b/sys/dev/ic/i82365.c
index d9f1880a5bd..084251f881a 100644
--- a/sys/dev/ic/i82365.c
+++ b/sys/dev/ic/i82365.c
@@ -1,4 +1,4 @@
-/* $NetBSD: i82365.c,v 1.25 1999/10/15 06:07:27 haya Exp $ */
+/* $NetBSD: i82365.c,v 1.26 2000/01/01 21:57:45 sommerfeld Exp $ */
#define PCICDEBUG
@@ -91,6 +91,7 @@ void pcic_create_event_thread __P((void *));
void pcic_event_thread __P((void *));
void pcic_queue_event __P((struct pcic_handle *, int));
+void pcic_power __P((int, void *));
static void pcic_wait_ready __P((struct pcic_handle *));
@@ -341,6 +342,33 @@ pcic_attach_sockets(sc)
}
void
+pcic_power (why, arg)
+ int why;
+ void *arg;
+{
+ struct pcic_handle *h = (struct pcic_handle *)arg;
+ struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
+
+ if (h->flags & PCIC_FLAG_SOCKETP) {
+ if ((why == PWR_RESUME) &&
+ (pcic_read(h, PCIC_CSC_INTR) == 0)) {
+#ifdef PCICDEBUG
+ char bitbuf[64];
+#endif
+ pcic_write(h, PCIC_CSC_INTR,
+ (sc->irq << PCIC_CSC_INTR_IRQ_SHIFT) |
+ PCIC_CSC_INTR_CD_ENABLE);
+ DPRINTF(("%s: CSC_INTR was zero; reset to %s\n",
+ sc->dev.dv_xname,
+ bitmask_snprintf(pcic_read(h, PCIC_CSC_INTR),
+ PCIC_CSC_INTR_FORMAT,
+ bitbuf, sizeof(bitbuf))));
+ }
+ }
+}
+
+
+void
pcic_attach_socket(h)
struct pcic_handle *h;
{
@@ -514,6 +542,14 @@ pcic_init_socket(h)
pcic_write(h, PCIC_INTR, 0);
pcic_read(h, PCIC_CSC);
+ /*
+ * Set up a powerhook to ensure it continues to interrupt on
+ * card detect even after suspend.
+ * (this works around a bug seen in suspend-to-disk on the
+ * Sony VAIO Z505; on resume, the CSC_INTR state is not preserved).
+ */
+ powerhook_establish(pcic_power, h);
+
/* unsleep the cirrus controller */
if ((h->vendor == PCIC_VENDOR_CIRRUS_PD6710) ||
diff --git a/sys/dev/ic/i82365reg.h b/sys/dev/ic/i82365reg.h
index 1963dc37bb6..2c1f0d57811 100644
--- a/sys/dev/ic/i82365reg.h
+++ b/sys/dev/ic/i82365reg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: i82365reg.h,v 1.3 1998/12/20 17:53:28 nathanw Exp $ */
+/* $NetBSD: i82365reg.h,v 1.4 2000/01/01 21:57:46 sommerfeld Exp $ */
/*
* Copyright (c) 1997 Marc Horowitz. All rights reserved.
@@ -181,6 +181,12 @@
#define PCIC_CSC_INTR_BATTDEAD_ENABLE 0x01 /* for memory cards */
#define PCIC_CSC_INTR_RI_ENABLE 0x01 /* for I/O cards */
+#define PCIC_CSC_INTR_FORMAT "\177\020" "f\4\4CSC_INTR_IRQ\0" \
+ "b\0RI\0" \
+ "b\1BATTWARN\0" \
+ "b\2READY\0" \
+ "b\3CD\0"
+
#define PCIC_CSC_INTR_IRQ_VALIDMASK 0xDEB8 /* 1101 1110 1011 1000 */
/* I/O registers */