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authormsaitoh <msaitoh@NetBSD.org>2014-11-24 07:53:43 +0000
committermsaitoh <msaitoh@NetBSD.org>2014-11-24 07:53:43 +0000
commitbd718c5b7d724fd57dcafa686c87f2b346745271 (patch)
treea802e8fa37b102c941140cdf80797b12f57744e8 /sys/dev
parentd767743e1d34b80439da8ed7a99fd88bec90e46f (diff)
Add PCIe CRS Software Visibility bit.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/pci_subr.c5
-rw-r--r--sys/dev/pci/pcireg.h3
2 files changed, 5 insertions, 3 deletions
diff --git a/sys/dev/pci/pci_subr.c b/sys/dev/pci/pci_subr.c
index 7ee1bbe22c0..1c07b58d3e1 100644
--- a/sys/dev/pci/pci_subr.c
+++ b/sys/dev/pci/pci_subr.c
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $ */
+/* $NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -1634,6 +1634,7 @@ pci_conf_print_pcie_cap(const pcireg_t *regs, int capoff)
/* Root Capability Register */
printf(" Root Capability Register: %04x\n",
reg >> 16);
+ onoff("CRS Software Visibility", reg, PCIE_RCR_CRS_SV);
/* Root Status Register */
reg = regs[o2i(capoff + PCIE_RSR)];
diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h
index d54032d7823..ccc935bf6cc 100644
--- a/sys/dev/pci/pcireg.h
+++ b/sys/dev/pci/pcireg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.99 2014/10/23 13:45:41 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.100 2014/11/24 07:53:43 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -976,6 +976,7 @@ typedef u_int8_t pci_revision_t;
#define PCIE_RCR_SERR_FER __BIT(2) /* SERR on Fatal Error Enable */
#define PCIE_RCR_PME_IE __BIT(3) /* PME Interrupt Enable */
#define PCIE_RCR_CRS_SVE __BIT(4) /* CRS Software Visibility En */
+#define PCIE_RCR_CRS_SV __BIT(16) /* CRS Software Visibility */
#define PCIE_RSR 0x20 /* Root Status Register */
#define PCIE_RSR_PME_REQESTER __BITS(15, 0) /* PME Requester ID */
#define PCIE_RSR_PME_STAT __BIT(16) /* PME Status */