summaryrefslogtreecommitdiff
path: root/sys/arch/arm/include
AgeCommit message (Collapse)Author
2014-03-04Remove duplicate END(y) macromatt
2014-03-03More control bits.matt
SYNCHPRIM defines.
2014-03-03Add most of the cpu_* variables to <arm/locore.h>matt
Add and initialize cpu_synchprim_present
2014-03-01Fix typosmatt
2014-03-01Add db_show_tlb_cmd prototypematt
2014-03-01defines/inlines for cortex a5/a7 tlbdata opsmatt
2014-02-26Revert previous - will fix userland with new sysctls for VM_MIN_ADDRESS/martin
VM_MAXADDESS.
2014-02-26Include param.h here - userland expects VM_* defines to work with justmartin
this include, but PAGE_SIZE relies on PGSHIFT now, which is not defined here. Matt: please rearrange/cleanup differently if you prefer (but test build src/tests/lib/libc/sys/t_mlock for example.)
2014-02-26Add more MMU registersmatt
2014-02-26Move some static/global variables to here.matt
2014-02-26Remove KERNEL_LOCK/KERNEL_UNLOCKmatt
2014-02-26Use PAGE_SIZE instead of 1000matt
2014-02-26Add arm_cpu_maxmatt
2014-02-26ci_cpu_id -> ci_arm_cpuidmatt
2014-02-26Add XN bit L2 large pages.matt
2014-02-26Remove duplicate PMAP_PTEmatt
2014-02-26Replace 1000 with PAGE_SIZEmatt
2014-02-26Add PMAP_PTE flag. (map page so it can be used as a PDE or PTE page)matt
2014-02-25Fix thinko.matt
2014-02-25Default ARM11 to ARM_MMU_V6Nmatt
2014-02-24If we are dumping a EABI coredump, set the version to EABI5.matt
If we are dumping a BE coredump on a BE8 system, set the BE8 flag.
2014-02-24consistency in include protectionchristos
2014-02-24Add more inlines. Default FSR ARMv6+ bits. Add A7/A15 L2CTRL defs.matt
2014-02-22Add way_size to arm_cache_infomatt
Fix arm67_tlb_purge prototype
2014-02-22Add L1_TABLE_SIZE_REALmatt
2014-02-22Define __HAVE_ATOMIC64_OPS if EABI && ARMv6 or later.matt
2014-02-21Remove unnecessary include of sys/simplelock.hskrll
2014-02-20Keep track of what each cache is (VIVT/VIPT/PIPT).matt
cpu0: 32KB/32B 2-way L1 VIPT Instruction cache cpu0: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache cpu0: 256KB/64B 8-way write-through L2 PIPT Unified cache
2014-02-20Make the tlb_flush*SE take a vaddr_t, not a u_int.matt
2014-02-04_setsoftintr is long dead. reap any leftovers from arm.matt
2014-02-01Typos.joerg
2014-02-01Fix RCS ID.joerg
2014-02-01Be nice to LLVM and use an explicit immediate.joerg
2014-01-31Consolidate the 128-bit long double defintions to <sys/ieee754.h>matt
Each arch that uses it now defines __HAVE_LONG_DOUBLE to 128. <machine/ieee.h> is now just include the machine's math.h followed by <sys/ieee754.h>
2014-01-31Fix the naked char __INT8_TYPE__ and unsigned char case.matt
2014-01-30ldrht is v6t2 or later so use ldrt and extract the right halfword.matt
2014-01-29Deal with the case when __UINT<N>_TYPE__ is defined as wellmatt
__INT<N>_TYPE__ is defined. We make the assumption that if the former is defined, the latter is also defined.
2014-01-29Remove AArch64 stuff.matt
2014-01-29Make {,u}int{8,16,32} be of type int.matt
2014-01-29Add read_insn and read_thumb_insn inlines to hide the endianness ofmatt
instructions and use them as appropriate.
2014-01-29Take advantage of compiler predefines for types.matt
Add _LP64 support.
2014-01-29Add latent AArch64 support.matt
2014-01-29If __ARM_PCS_AAPCS64 is defined, define struct ieee_ext and union ieee_ext_u.matt
Use uint64_t so we can just have ext_frach and ext_fracl.
2014-01-29Fix inverted GCC version testmatt
2014-01-29if __ARM_PCS_AAPCS64 is defined, expose LDBL_* and DECIMAL_DIGITmatt
2014-01-29Also test for __AARCH64EB__ as well as __ARMEB__ for big-endian.matt
2014-01-29AAPCS64 supports 16-byte long doublesmatt
2014-01-29Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ ormatt
_MACHINE_).
2014-01-29replace spaces in SHRT_MIN definition with tabsmatt
2014-01-29SIZE_T is unsigned so SIZE_T_MAX needs to be ULONG_MAXmatt