| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2014-03-03 | support ppc601 | macallan | |
| from scole_mail, ok matt@ | |||
| 2014-02-28 | Make this 64-bit aware. | matt | |
| 2014-02-28 | Add pmap_ste_spill | matt | |
| 2014-02-28 | Make this work. | matt | |
| 2014-02-28 | Add trapframe32 for COMPAT_NETBSD32 | matt | |
| 2014-02-28 | Add ALIGNBYTES32 for COMPAT_NETBSD32 | matt | |
| 2014-02-28 | Use uintptr_t for bus_size_t, bus_addr_t, bus_space_handler_t since uint32_t | matt | |
| doesn't really work too 64-bit platforms. | |||
| 2014-02-28 | support PPC_OEA64 | matt | |
| 2014-02-28 | Add mcontext32_t | matt | |
| 2014-02-28 | Add cmp{ptr,long,reg}{,l}{,i} | matt | |
| 2014-02-27 | Use ## for concatenation | matt | |
| 2014-02-27 | Add P2SZREG to be usign with .p2align | matt | |
| 2014-01-25 | delete VM_DEFAULT_ADDRESS; some of those should be GC'ed because they match | christos | |
| the default definition. | |||
| 2013-11-25 | Use __syncicache() in sljit on powerpc. | alnsn | |
| 2013-11-21 | Support Synopsys DesigneWave OTG on PowerPC 405EX. | kiyohara | |
| 2013-11-17 | Enable sljit and bpfjit on powerpc. | alnsn | |
| 2013-11-08 | resort the sys/cpu.h way for unused cii iterator in !MULTIPROCESSOR case. | nisimura | |
| 2013-09-22 | Define HID1_{SYNCBE,ABE} for the 7450 | matt | |
| 2013-09-12 | Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small | joerg | |
| vs big PIC mode. Retire -DPIC and -DBIGPIC. | |||
| 2013-08-24 | struct cpu_info; | matt | |
| 2013-08-23 | Get rid of MDLWP_USED{FPU,VEC} | matt | |
| 2013-08-23 | Fix kern_softint.c errors (tested with WALNUT & EV64260) | matt | |
| 2013-08-22 | -extend the pcu(9) API by a function which saves all context on the | drochner | |
| current CPU, and use it if a CPU is taken offline -add a bool argument to pcu_discard which tells whether the internal "LWP has used the coprocessor" flag should be set or reset. The flag is reported by pcu_used_p(). If set, future accesses should use the state stored in the PCB. If reset, it should be reset to default. The former case is useful for setmcontext(). With that, it should not be necessary anymore to manage the "FPU used" state by an additional MD variable. approved by matt | |||
| 2013-07-17 | kcpuset_t changes for the pmap and removal of __cpuset_t | matt | |
| 2013-07-05 | Fix header guard. | joerg | |
| 2013-04-25 | we can read the timebase register as a 64bit chunk when _ARCH_PPC64 is defined, | macallan | |
| not necessarily LP64 | |||
| 2013-04-11 | add missing SSIZE_MIN | christos | |
| 2013-01-29 | More stack for ibm4xx slow machines. | kiyohara | |
| 2013-01-29 | Support 16bits over stack size. | kiyohara | |
| 2012-11-27 | Make the 85xx get closer to spinning up the secondary CPUs. | matt | |
| Don't assume TLB1[0] has the mapping for VA/PA 0. Make sure the TLB1 entries that map physical memory have the M (memory coherent) bit set. | |||
| 2012-11-25 | provide _ENTRY(x) because some code needs it. | christos | |
| 2012-10-27 | split device_t/softc for all remaining drivers. | chs | |
| replace "struct device *" with "device_t". use device_xname(), device_unit(), etc. | |||
| 2012-10-20 | Support Cache Protocol 'MEI' with MULTIPROCESSOR. | kiyohara | |
| 2012-10-02 | move common tlb stuff to uvm | christos | |
| 2012-09-23 | increase powerpc NKMEMPAGES_MAX_DEFAULT to 256MB. remove the macppc | mrg | |
| overrides that are now the same as the powerpc default. | |||
| 2012-09-11 | Add support for _UC_TLSBASE. Make sure to preserve backwards compat for | matt | |
| programs built before TLS support was added. | |||
| 2012-08-01 | Add a machine splhist command to give (a incomplete) spl history. | matt | |
| (only the most recent are going to be accurate). splraise(6) from 0 at 549214603 splraise(7) from 6 at 549214643 (+40) splx(6) from 7 at 549214691 (+48) splx(0) from 6 at 549214730 (+39) | |||
| 2012-08-01 | Export dump_trapframe. | matt | |
| 2012-08-01 | Fix a problem where the kernel could randomly reset due to a watchdog event. | matt | |
| When an exception happens, the srr0 (exception PC) was being saved in the normal location of the current callframe. This was fine except when the routine was in its prologue after it had saved LR but had not yet updated the stack pointer or when the routine was in its epilogue after it has restored the stack pointer but not yet loaded the LR. In either case this would cause the LR to be corrupted (either running the routine forever or by branching to itself forever). Now we save and restore the contents of that memory location so the corruption can't happen. | |||
| 2012-08-01 | Fix some copy&paste bugs. | matt | |
| 2012-07-29 | Add command line processing from uboot | matt | |
| bootm $loadaddr [opts] [device] where opts is -[advqs] and device is the boot device. cpu_rootconf will now wait a bit for devices to appear until the boot device appears. | |||
| 2012-07-28 | Fix -fno-common fallout. | matt | |
| 2012-07-27 | Fix -fno-common fallout. | matt | |
| 2012-07-27 | Fix some -fno-common fallout | matt | |
| 2012-07-26 | Add ESDHC DCR definitions | matt | |
| 2012-07-18 | Add some more PVRs and SVRs | matt | |
| 2012-07-18 | Add P1025 support to the PCI truth tables. | matt | |
| P1025 only has two PCIe ports, not 3. | |||
| 2012-07-18 | Define the MPC8XX traps | matt | |
| 2012-07-17 | MPC8xx SPR defintions | matt | |
| 2012-07-17 | The ETSEC on the P1025 has been moved/split so the MDIO stayed in the same | matt | |
| place but each ETSEC has been split into two virtual halves (G0 and G1) and each one has a new different base address. For some reason, tsec1 connects to phy 2 and tsec2 connects to phy 1. Adjust config file to match | |||
