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path: root/sys/dev/marvell
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2014-02-25Ensure that the top level sysctl nodes (kern, vfs, net, ...) exist beforepooka
the sysctl link sets are processed, and remove redundancy. Shaves >13kB off of an amd64 GENERIC, not to mention >1k duplicate lines of code.
2014-02-17Add MARVELL_TAG_DDR3_CS[0-3] for latest SoC.kiyohara
2014-02-03 Carefully set IFF_OACTIVE in mvgbe_start(). Even if mvgbe_encap()msaitoh
returns other than 0, the TX ring might not full. Check whether the TX ring has one or more packets. If the ring is empty, dont' set IFF_OACTIVE because an TX complete interrupt never occur and IFF_OACTIVE flags is left. The interface's timer isn't reset, so a device timeout desn't occur. Fixes a bug that IFF_OACTIVE flag is left on heavy load. Part of PR#48568.
2013-12-23Support Basic Mode for Armada XP.kiyohara
2013-11-06move some variables inside their #ifdef use.mrg
2013-10-03Revirt 'Move the Marvell extension to com_mv.c' at Sun Sep 1 04:51:24 UTC 2013.kiyohara
build test only.
2013-09-28Change address/size of CESA Registers.kiyohara
2013-09-28Add ARMADAXP IDs.kiyohara
2013-09-28Add ARMADAXP MV78{13,16,23,26}0.kiyohara
2013-09-08Fix size of EHCI register space.kiyohara
2013-09-06Make gttswi MI and usuable from non-Marvell SoCs.matt
(should rename to mvi2c but ...)
2013-09-05Make sc_started bool and true/false instead of 1/0matt
2013-09-01Move the Marvell extension to com_mv.c.kiyohara
2013-08-29Fix build failed with ofppc.kiyohara
Move 'attach mvspi at mvsoc' to arch/arm/marvell/files.marvell.
2013-08-25Move mvspi defines into sys/dev/marvell/files.discovery.kiyohara
2013-08-03Issue the STOP-bit if needed.kiyohara
And remove #ifdef ARMADAXP.
2013-05-13There is no opt_mvsoc.h; the #ifdef ARMADAXP should be changed to somechristos
inherited device property.
2013-05-06Removed an unused variable.khorben
"go ahead" rkujawa@
2013-05-01Support Marvell Armada XP.rkujawa
Obtained from Marvell, Semihalf.
2013-05-01TWSI controller on Armada XP is a bit different. Support that.rkujawa
Obtained from Marvell, Semihalf.
2013-05-01Add IDs for Marvell Armada XP and ATTR_SDRAM registers used with IO cache ↵rkujawa
coherency. Obtained from Marvell, Semihalf.
2013-05-01Avoid configuring root complex on MV78460.rkujawa
Obtained from Marvell, Semihalf.
2013-05-01Support SATA on Marvell Armada XP.rkujawa
Obtained from Marvell, Semihalf.
2013-05-01Add support for Marvell's SPI controller as found on Armada XP.rkujawa
Obtained from Semihalf.
2012-12-28Fix a bug that a multicast filter entry is incorrectly overrodemsaitoh
on some cases.
2012-12-20Check wheter an MII PHY is really connected or not.msaitoh
This change privents panic if MII PHY port is not used.
2012-11-09Add MVGBE_EVENT_COUNTERS for debugging. Count rxoverrrun and wdogsoft.msaitoh
2012-11-08Fix a bug that MVGBE_JLEN is miscalculated.msaitoh
2012-11-08When an interrput is link change, notify link change to mii layer usingmsaitoh
mii_pollstat().
2012-11-08Don't use M_HASFCS flag.msaitoh
2012-11-01No functional change.msaitoh
- Change style a bit. - use "csc" for the variable name of struct mvgbec_softc in mvgbec_attach() for consistency.
2012-10-27split device_t/softc for all remaining drivers.chs
replace "struct device *" with "device_t". use device_xname(), device_unit(), etc.
2012-10-26Add missing mii_tick() call.msaitoh
2012-10-17Fix a bug that kernel panics when the system get a packet while callingmsaitoh
mvgbe_stop (via ifconfig down).
2012-10-16Add code to modify interrupt coalescing with sysctl.msaitoh
- both TX side an RX side. - different setting for each port - TX side is hw.mvgbe.mvgbe*.ipginttx - RX side is hw.mvgbe.mvgbe*.ipgintrx - The default value is 768. - The lowest value is 0 - For highest value, 0x3777 is used for V1, and 0xffff is used for V2.
2012-10-14Add Interrupt Coalescing setting by Robert Swindells.msaitoh
2012-10-12- The MVGBE_RX_MAX_FRAME_LEN_ERROR bit is used to check whether a packetmsaitoh
is fragmented or not, so define new MVGBE_RX_IP_FRAGMENT with the same value and use it. - Remove the checking whether a packet length is lower than 72 octet. This check is not used in Linux and FreeBSD. Tested with me (for Kirkwood) and Kiyohara (for DiscoveryII).
2012-10-04Fix udpcsum-rx bug on fragmented case this time.msaitoh
- Fix the usage of a local variable for csum_flags. - It seemd that sometimes MVGBE_RX_L4_CHECKSUM_OK bit were set to 0 even if the checksum is correct and the packet was not fragmented. So we don't set M_CSUM_TCP_UDP_BAD even if csum bit is 0.
2012-10-02- Fix a bug that a fragmented packet is marked as bad checksum. It causesmsaitoh
a real bug when HW checksum offload function is used. It was easy to reproduce with NFS UDP mount. - Fix a potential bug that a packet other than TCP and UDP is marked as bad checksum.
2012-09-21Fix device timeout problem.msaitoh
- Change the synching order of descriptors. First, sync descriptors except first and then sync the first descriptor. - To recover from an race condition, reduce the if_timer from 5 to 1 and when timeout occur write MVGBE_TQC_ENQ bit again.
2012-09-10Add "static".msaitoh
2012-09-07Fix pci_conf_hook/interrupt for ARM.matt
2012-09-06Add missing bus_dmamap_sync() for the RX buffer.msaitoh
2012-07-27Add Marvell CESA(Cryptographic Engines and Security Accelerator) module driver.kiyohara
But support only PIO-mode now. Also AES-CBC not supported. Don't know how to process to AES CBC in PIO-mode. I haven't found IV registers.
2012-07-23Support Kirkwoods. Kirkwoods has 4ch for XORE and not has IDMAC. tested on ↵kiyohara
OpenBlockS A6 with ch0 only.
2012-07-22Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixesmatt
problem with a common MDIO bus used for multiple interfaces. Some drivers converted to CFATTACL_DECL_NEW.
2012-07-21TWSI size is 0x100. Not 0x1000.kiyohara
2012-07-21Don't send a stop bit immediately after start bit transmission.kiyohara
2012-07-18Add 88F6282. tested only OpenBlockS A6.kiyohara
Also fix irq 11 to 15. irq of 2nd NIC is 15. Remove white-space.
2012-07-18Add 88F6282. tested only OpenBlockS A6.kiyohara