From f2c4e7f8bdf254fdcf64a2d451f1bf4355dd05ca Mon Sep 17 00:00:00 2001 From: mycroft Date: Thu, 18 Feb 1999 23:41:40 +0000 Subject: Use the correct interrupt sharing type, and set PCIC_INTR_ENABLE(!). --- sys/dev/isa/i82365_isasubr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'sys/dev') diff --git a/sys/dev/isa/i82365_isasubr.c b/sys/dev/isa/i82365_isasubr.c index b14e64aea90..ffc6dc07131 100644 --- a/sys/dev/isa/i82365_isasubr.c +++ b/sys/dev/isa/i82365_isasubr.c @@ -1,4 +1,4 @@ -/* $NetBSD: i82365_isasubr.c,v 1.1 1998/06/07 18:28:31 sommerfe Exp $ */ +/* $NetBSD: i82365_isasubr.c,v 1.2 1999/02/18 23:41:40 mycroft Exp $ */ #define PCICISADEBUG @@ -227,7 +227,7 @@ pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg) else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE) ist = IST_PULSE; else - ist = IST_LEVEL; + ist = IST_EDGE; if (isa_intr_alloc(ic, PCIC_INTR_IRQ_VALIDMASK & pcic_isa_intr_alloc_mask, ist, &irq)) @@ -238,7 +238,7 @@ pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg) reg = pcic_read(h, PCIC_INTR); reg &= ~PCIC_INTR_IRQ_MASK; - reg |= irq; + reg |= irq | PCIC_INTR_ENABLE; pcic_write(h, PCIC_INTR, reg); h->ih_irq = irq; -- cgit