summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authoris <is@NetBSD.org>1996-03-05 18:08:33 +0000
committeris <is@NetBSD.org>1996-03-05 18:08:33 +0000
commit3020e66dd5881ffef4e22eae21932dbde06a37dd (patch)
treebe57fc9af14de5826f121a8e05888e6bb4fc0022
parente77f3c0a272b49f05484e26a81e3afc4ff24a3b0 (diff)
Fix problems with fast CPUs and Picasso boards. Patches originally by,
Klaus Burkert <crest@arkon.dontpanic.sub.org>, sent in by Ezra Story. Closes port-amiga/2135. k
-rw-r--r--sys/arch/amiga/dev/grf_cl.c21
-rw-r--r--sys/arch/amiga/dev/grf_clreg.h25
2 files changed, 27 insertions, 19 deletions
diff --git a/sys/arch/amiga/dev/grf_cl.c b/sys/arch/amiga/dev/grf_cl.c
index 9220f05824e..f4e1f315f62 100644
--- a/sys/arch/amiga/dev/grf_cl.c
+++ b/sys/arch/amiga/dev/grf_cl.c
@@ -1,4 +1,4 @@
-/* $NetBSD: grf_cl.c,v 1.5 1995/10/09 03:47:44 chopps Exp $ */
+/* $NetBSD: grf_cl.c,v 1.6 1996/03/05 18:08:33 is Exp $ */
/*
* Copyright (c) 1995 Ezra Story
@@ -48,6 +48,7 @@
* Lutz Vieweg's retina driver by Kari Mettinen 08/94
* Contributions by Ill, ScottE, MiL
* Extensively hacked and rewritten by Ezra Story (Ezy) 01/95
+ * Picasso/040 patches (wee!) by crest 01/96
*
* Thanks to Village Tronic Marketing Gmbh for providing me with
* a Picasso-II board.
@@ -924,7 +925,7 @@ cl_getcmap(gfp, cmap)
ba = gfp->g_regkva;
/* first read colors out of the chip, then copyout to userspace */
- vgaw(ba, VDAC_ADDRESS_W, cmap->index);
+ vgaw(ba, VDAC_ADDRESS_R, cmap->index);
x = cmap->count - 1;
/* Some sort 'o Magic. Spectrum has some changes on the board to speed
@@ -1310,7 +1311,14 @@ cl_load_mon(gp, md)
(clkdiv << 1));
delay(200000);
- vgaw(ba, VDAC_MASK, 0xff);
+
+ /* write 0x00 to VDAC_MASK before accessing HDR this helps
+ sometimes, out of "secret" application note (crest) */
+ vgaw(ba, VDAC_MASK, 0);
+ delay(200000);
+ /* reset HDR "magic" access counter (crest) */
+ vgar(ba, VDAC_ADDRESS);
+
delay(200000);
vgar(ba, VDAC_MASK);
delay(200000);
@@ -1343,7 +1351,14 @@ cl_load_mon(gp, md)
HDE = (gv->disp_width / 8) * 3;
break;
}
+ delay(20000);
+
+ /* reset HDR "magic" access counter (crest) */
+ vgar(ba, VDAC_ADDRESS);
delay(200000);
+ /* then enable all bit in VDAC_MASK afterwards (crest) */
+ vgaw(ba, VDAC_MASK, 0xff);
+ delay(20000);
WCrt(ba, CRT_ID_OFFSET, HDE);
WCrt(ba, CRT_ID_EXT_DISP_CNTL,
diff --git a/sys/arch/amiga/dev/grf_clreg.h b/sys/arch/amiga/dev/grf_clreg.h
index 39a26e30443..a4321d1340d 100644
--- a/sys/arch/amiga/dev/grf_clreg.h
+++ b/sys/arch/amiga/dev/grf_clreg.h
@@ -257,13 +257,13 @@ struct grfcltext_mode {
#define PASS_ADDRESS_WP 0x9000
/* Video DAC */
-#define VDAC_ADDRESS 0x03c8
-#define VDAC_ADDRESS_W 0x03c8
-#define VDAC_ADDRESS_R 0x03c7
-#define VDAC_STATE 0x03c7
-#define VDAC_DATA 0x03c9
-#define VDAC_MASK 0x03c6
-#define HDR 0x03c6 /* Hidden DAC register, 4 reads to access */
+#define VDAC_ADDRESS 0x03c8
+#define VDAC_ADDRESS_W 0x03c8
+#define VDAC_ADDRESS_R ((cltype==PICASSO)?0x03c7+0xfff:0x3c7)
+#define VDAC_STATE 0x03c7
+#define VDAC_DATA ((cltype==PICASSO)?0x03c9+0xfff:0x3c9)
+#define VDAC_MASK 0x03c6
+#define HDR 0x03c6 /* Hidden DAC register, 4 reads to access */
#define WGfx(ba, idx, val) \
@@ -277,10 +277,7 @@ struct grfcltext_mode {
#define WAttr(ba, idx, val) \
do { \
- unsigned char tmp;\
- vgaw(ba, CRT_ADDRESS, CRT_ID_ACT_TOGGLE_RBACK);\
- tmp = vgar(ba, CRT_ADDRESS_R);\
- if(tmp & 0x80)vgaw(ba,ACT_ADDRESS_W,vgar(ba,ACT_ADDRESS_R));\
+ vgar(ba, ACT_ADDRESS_RESET);\
vgaw(ba, ACT_ADDRESS_W, idx);\
vgaw(ba, ACT_ADDRESS_W, val);\
} while (0)
@@ -354,11 +351,7 @@ static inline void RegOffpass(volatile void *ba) {
}
static inline unsigned char RAttr(volatile void * ba, short idx) {
-
- unsigned char tmp;
- vgaw(ba, CRT_ADDRESS, CRT_ID_ACT_TOGGLE_RBACK);
- tmp = vgar(ba, CRT_ADDRESS_R);
- if(tmp & 0x80)vgar(ba,ACT_ADDRESS_R);
+ vgar(ba, ACT_ADDRESS_RESET);
vgaw(ba, ACT_ADDRESS_W, idx);
return vgar (ba, ACT_ADDRESS_R);
}