diff options
| author | joerg <joerg@NetBSD.org> | 2019-11-11 22:44:56 +0000 |
|---|---|---|
| committer | joerg <joerg@NetBSD.org> | 2019-11-11 22:44:56 +0000 |
| commit | 918c74ea12c6bac6ca9bd2147337c0e4fec5010e (patch) | |
| tree | 3ef5212d84042aedbd5e0629e2c7dc2de1751526 /external/apache2/llvm/lib/libLLVMX86CodeGen | |
| parent | 5578004b9757994411ac0c8b959a53c2063844d1 (diff) | |
Update LLVM to 10.0.0git (01f3a59fb3e2542fce74c768718f594d0debd0da)
Diffstat (limited to 'external/apache2/llvm/lib/libLLVMX86CodeGen')
| -rw-r--r-- | external/apache2/llvm/lib/libLLVMX86CodeGen/Makefile | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/external/apache2/llvm/lib/libLLVMX86CodeGen/Makefile b/external/apache2/llvm/lib/libLLVMX86CodeGen/Makefile new file mode 100644 index 00000000000..e75f4a70950 --- /dev/null +++ b/external/apache2/llvm/lib/libLLVMX86CodeGen/Makefile @@ -0,0 +1,80 @@ +# $NetBSD: Makefile,v 1.1 2019/11/11 22:45:13 joerg Exp $ + +LIB= LLVMX86CodeGen + +.include <bsd.init.mk> + +.PATH: ${LLVM_SRCDIR}/lib/Target/X86 + +SRCS+= X86AsmPrinter.cpp \ + X86AvoidStoreForwardingBlocks.cpp \ + X86AvoidTrailingCall.cpp \ + X86CallFrameOptimization.cpp \ + X86CallingConv.cpp \ + X86CallLowering.cpp \ + X86CmovConversion.cpp \ + X86CondBrFolding.cpp \ + X86DiscriminateMemOps.cpp \ + X86DomainReassignment.cpp \ + X86EvexToVex.cpp\ + X86ExpandPseudo.cpp \ + X86FastISel.cpp \ + X86FixupBWInsts.cpp \ + X86FixupLEAs.cpp \ + X86FixupSetCC.cpp \ + X86FlagsCopyLowering.cpp \ + X86FloatingPoint.cpp \ + X86FrameLowering.cpp \ + X86IndirectBranchTracking.cpp \ + X86InsertPrefetch.cpp \ + X86InstrFMA3Info.cpp \ + X86InstrFoldTables.cpp \ + X86InstrInfo.cpp \ + X86InstructionSelector.cpp \ + X86InterleavedAccess.cpp \ + X86ISelDAGToDAG.cpp \ + X86ISelLowering.cpp \ + X86LegalizerInfo.cpp \ + X86MachineFunctionInfo.cpp \ + X86MacroFusion.cpp \ + X86MCInstLower.cpp \ + X86OptimizeLEAs.cpp \ + X86PadShortFunction.cpp \ + X86RegisterBankInfo.cpp \ + X86RegisterInfo.cpp \ + X86RetpolineThunks.cpp \ + X86SelectionDAGInfo.cpp \ + X86ShuffleDecodeConstantPool.cpp \ + X86SpeculativeLoadHardening.cpp \ + X86Subtarget.cpp \ + X86TargetMachine.cpp \ + X86TargetObjectFile.cpp \ + X86TargetTransformInfo.cpp \ + X86VZeroUpper.cpp \ + X86WinAllocaExpander.cpp \ + X86WinEHState.cpp + +TABLEGEN_SRC= X86.td +TABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/X86 +TABLEGEN_OUTPUT= \ + X86GenAsmMatcher.inc|-gen-asm-matcher \ + X86GenAsmWriter.inc|-gen-asm-writer \ + X86GenAsmWriter1.inc|-gen-asm-writer^-asmwriternum=1 \ + X86GenCallingConv.inc|-gen-callingconv \ + X86GenDAGISel.inc|-gen-dag-isel \ + X86GenDisassemblerTables.inc|-gen-disassembler \ + X86GenEVEX2VEXTables.inc|-gen-x86-EVEX2VEX-tables \ + X86GenFastISel.inc|-gen-fast-isel \ + X86GenGlobalISel.inc|-gen-global-isel \ + X86GenInstrInfo.inc|-gen-instr-info \ + X86GenRegisterBank.inc|-gen-register-bank \ + X86GenRegisterInfo.inc|-gen-register-info \ + X86GenSubtargetInfo.inc|-gen-subtarget + +.include "${.PARSEDIR}/../../tablegen.mk" + +.if defined(HOSTLIB) +.include <bsd.hostlib.mk> +.else +.include <bsd.lib.mk> +.endif |
