summaryrefslogtreecommitdiff
path: root/gnu/dist/include/opcode
diff options
context:
space:
mode:
authorgwr <gwr@NetBSD.org>1997-09-24 18:54:18 +0000
committergwr <gwr@NetBSD.org>1997-09-24 18:54:18 +0000
commit31fbffdc2eb71c5ae60f97b681f4619b6ccc6f8c (patch)
tree599268fb10a1327c7723e110ac67c7add99d29c2 /gnu/dist/include/opcode
parent9287cd69a35da0368dc0458c1bfbb512e8db7244 (diff)
stock binutils-2.8.1
Diffstat (limited to 'gnu/dist/include/opcode')
-rw-r--r--gnu/dist/include/opcode/ChangeLog15
-rw-r--r--gnu/dist/include/opcode/i386.h100
2 files changed, 98 insertions, 17 deletions
diff --git a/gnu/dist/include/opcode/ChangeLog b/gnu/dist/include/opcode/ChangeLog
index 34923e2de14..8a1b7d75f2b 100644
--- a/gnu/dist/include/opcode/ChangeLog
+++ b/gnu/dist/include/opcode/ChangeLog
@@ -1,3 +1,18 @@
+Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
+
+ * i386.h (movd): only Reg32 is allowed.
+
+ * i386.h: add fcomp and ud2. From Wayne Scott
+ <wscott@ichips.intel.com>.
+
+Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Add MMX instructions.
+
+Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
+
+ * i386.h: Remove W modifier from conditional move instructions.
+
Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
* i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
diff --git a/gnu/dist/include/opcode/i386.h b/gnu/dist/include/opcode/i386.h
index a8fe6c864d6..c74d2d6a270 100644
--- a/gnu/dist/include/opcode/i386.h
+++ b/gnu/dist/include/opcode/i386.h
@@ -535,6 +535,7 @@ static const template i386_optab[] = {
/* comparison (with pop) */
{"fcomp", 1, 0xd8d8, _, ShortForm, { FloatReg, 0, 0} },
+{"fcomp", 0, 0xd8d9, _, NoModrm, {0, 0, 0} }, /* fcomp %st, %st(1) */
{"fcomps", 1, 0xd8, 3, Modrm, { Mem, 0, 0} }, /* compare %st0, mem float */
{"ficompl", 1, 0xda, 3, Modrm, { Mem, 0, 0} }, /* compare %st0, mem word */
{"fcompl", 1, 0xdc, 3, Modrm, { Mem, 0, 0} }, /* compare %st0, mem double */
@@ -777,22 +778,24 @@ static const template i386_optab[] = {
/* Pentium Pro extensions */
{"rdpmc", 0, 0x0f33, _, NoModrm, { 0, 0, 0} },
-{"cmovo", 2, 0x0f40, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovno", 2, 0x0f41, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovb", 2, 0x0f42, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovae", 2, 0x0f43, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmove", 2, 0x0f44, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovne", 2, 0x0f45, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovbe", 2, 0x0f46, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmova", 2, 0x0f47, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovs", 2, 0x0f48, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovns", 2, 0x0f49, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovp", 2, 0x0f4a, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovnp", 2, 0x0f4b, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovl", 2, 0x0f4c, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovge", 2, 0x0f4d, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovle", 2, 0x0f4e, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovg", 2, 0x0f4f, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"ud2", 0, 0x0fff, _, NoModrm, {0, 0, 0} }, /* official undefined instr. */
+
+{"cmovo", 2, 0x0f40, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovno", 2, 0x0f41, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovb", 2, 0x0f42, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovae", 2, 0x0f43, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmove", 2, 0x0f44, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovne", 2, 0x0f45, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovbe", 2, 0x0f46, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmova", 2, 0x0f47, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovs", 2, 0x0f48, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovns", 2, 0x0f49, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovp", 2, 0x0f4a, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovnp", 2, 0x0f4b, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovl", 2, 0x0f4c, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovge", 2, 0x0f4d, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovle", 2, 0x0f4e, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovg", 2, 0x0f4f, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
{"fcmovb", 2, 0xdac0, _, ShortForm, { FloatReg, FloatAcc, 0} },
{"fcmove", 2, 0xdac8, _, ShortForm, { FloatReg, FloatAcc, 0} },
@@ -808,6 +811,66 @@ static const template i386_optab[] = {
{"fcomip", 2, 0xdff0, _, ShortForm, { FloatReg, FloatAcc, 0} },
{"fucomip",2, 0xdfe8, _, ShortForm, { FloatReg, FloatAcc, 0} },
+/* MMX instructions. */
+
+{"emms", 0, 0x0f77, _, NoModrm, { 0, 0, 0 } },
+{"movd", 2, 0x0f6e, _, Modrm, { Reg32|WordMem, RegMMX, 0 } },
+{"movd", 2, 0x0f7e, _, Modrm, { RegMMX, Reg32|WordMem, 0 } },
+{"movq", 2, 0x0f6f, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"movq", 2, 0x0f7f, _, Modrm, { RegMMX, RegMMX|WordMem, 0 } },
+{"packssdw", 2, 0x0f6b, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"packsswb", 2, 0x0f63, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"packuswb", 2, 0x0f67, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"paddb", 2, 0x0ffc, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"paddw", 2, 0x0ffd, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"paddd", 2, 0x0ffe, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"paddsb", 2, 0x0fec, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"paddsw", 2, 0x0fed, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"paddusb", 2, 0x0fdc, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"paddusw", 2, 0x0fdd, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pand", 2, 0x0fda, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pandn", 2, 0x0fdf, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pcmpeqb", 2, 0x0f74, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pcmpeqw", 2, 0x0f75, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pcmpeqd", 2, 0x0f76, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pcmpgtb", 2, 0x0f64, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pcmpgtw", 2, 0x0f65, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pcmpgtd", 2, 0x0f66, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pmaddwd", 2, 0x0ff5, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pmulhw", 2, 0x0fe5, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pmullw", 2, 0x0fd5, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"por", 2, 0x0feb, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psllw", 2, 0x0ff1, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psllw", 2, 0x0f71, 6, Modrm, { Imm8, RegMMX, 0 } },
+{"pslld", 2, 0x0ff2, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pslld", 2, 0x0f72, 6, Modrm, { Imm8, RegMMX, 0 } },
+{"psllq", 2, 0x0ff3, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psllq", 2, 0x0f73, 6, Modrm, { Imm8, RegMMX, 0 } },
+{"psraw", 2, 0x0fe1, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psraw", 2, 0x0f71, 4, Modrm, { Imm8, RegMMX, 0 } },
+{"psrad", 2, 0x0fe2, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psrad", 2, 0x0f72, 4, Modrm, { Imm8, RegMMX, 0 } },
+{"psrlw", 2, 0x0fd1, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psrlw", 2, 0x0f71, 2, Modrm, { Imm8, RegMMX, 0 } },
+{"psrld", 2, 0x0fd2, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psrld", 2, 0x0f72, 2, Modrm, { Imm8, RegMMX, 0 } },
+{"psrlq", 2, 0x0fd3, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psrlq", 2, 0x0f73, 2, Modrm, { Imm8, RegMMX, 0 } },
+{"psubb", 2, 0x0ff8, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psubw", 2, 0x0ff9, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psubd", 2, 0x0ffa, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psubsb", 2, 0x0fe8, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psubsw", 2, 0x0fe9, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psubusb", 2, 0x0fd8, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"psubusw", 2, 0x0fd9, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"punpckhbw", 2, 0x0f68, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"punpckhwd", 2, 0x0f69, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"punpckhdq", 2, 0x0f6a, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"punpcklbw", 2, 0x0f60, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"punpcklwd", 2, 0x0f61, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"punpckldq", 2, 0x0f62, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+{"pxor", 2, 0x0fef, _, Modrm, { RegMMX|WordMem, RegMMX, 0 } },
+
{"", 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */
};
#undef _
@@ -847,7 +910,10 @@ static const reg_entry i386_regtab[] = {
{"st", FloatReg|FloatAcc, 0},
{"st(1)", FloatReg, 1}, {"st(2)", FloatReg, 2},
{"st(3)", FloatReg, 3}, {"st(4)", FloatReg, 4}, {"st(5)", FloatReg, 5},
- {"st(6)", FloatReg, 6}, {"st(7)", FloatReg, 7}
+ {"st(6)", FloatReg, 6}, {"st(7)", FloatReg, 7},
+ {"mm0", RegMMX, 0}, {"mm1", RegMMX, 1}, {"mm2", RegMMX, 2},
+ {"mm3", RegMMX, 3}, {"mm4", RegMMX, 4}, {"mm5", RegMMX, 5},
+ {"mm6", RegMMX, 6}, {"mm7", RegMMX, 7}
};
#define MAX_REG_NAME_SIZE 8 /* for parsing register names from input */