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authormaxv <maxv@NetBSD.org>2019-05-14 16:59:25 +0000
committermaxv <maxv@NetBSD.org>2019-05-14 16:59:25 +0000
commit1b253443816202cb8a01ed5e4b641255238e2c01 (patch)
treeab239f792367ca7decdaeaa5fe1c4b7b651fe6ac /lib/lua/sqlite/sqlite.c
parent67ee8d25837864b50ff35e7c0e141a72a8726b9a (diff)
Mitigation for INTEL-SA-00233: Microarchitectural Data Sampling (MDS).
It requires a microcode update, now available on the Intel website. The microcode modifies the behavior of the VERW instruction, and makes it flush internal CPU buffers. We hotpatch the return-to-userland path to add VERW. Two sysctls are added: machdep.mds.mitigated = {0/1} user-settable machdep.mds.method = {string} constructed by the kernel The kernel will automatically enable the mitigation if the updated microcode is present. If the new microcode is not present, the user can load it via cpuctl, and set machdep.mds.mitigated=1.
Diffstat (limited to 'lib/lua/sqlite/sqlite.c')
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