diff options
| author | maxv <maxv@NetBSD.org> | 2019-05-29 16:54:41 +0000 |
|---|---|---|
| committer | maxv <maxv@NetBSD.org> | 2019-05-29 16:54:41 +0000 |
| commit | a237bd4282967c978ed60e7e57bb8bb8fdd72ee1 (patch) | |
| tree | 870adc3d088a7a29de4f1d6ca9b2258efa279404 /sys/arch/amd64 | |
| parent | 6b6e0205bc185e9bbddc453d2be4aa22700e57df (diff) | |
Add PCID support in SVS. This avoids TLB flushes during kernel<->user
transitions, which greatly reduces the performance penalty introduced by
SVS.
We use two ASIDs, 0 (kern) and 1 (user), and use invpcid to flush pages
in both ASIDs.
The read-only machdep.svs.pcid={0,1} sysctl is added, and indicates whether
SVS+PCID is in use.
Diffstat (limited to 'sys/arch/amd64')
| -rw-r--r-- | sys/arch/amd64/amd64/cpufunc.S | 31 | ||||
| -rw-r--r-- | sys/arch/amd64/amd64/genassym.cf | 10 | ||||
| -rw-r--r-- | sys/arch/amd64/include/pmap.h | 3 |
3 files changed, 38 insertions, 6 deletions
diff --git a/sys/arch/amd64/amd64/cpufunc.S b/sys/arch/amd64/amd64/cpufunc.S index 5a162e5c24a..0461bdee687 100644 --- a/sys/arch/amd64/amd64/cpufunc.S +++ b/sys/arch/amd64/amd64/cpufunc.S @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc.S,v 1.40 2019/05/19 08:17:02 maxv Exp $ */ +/* $NetBSD: cpufunc.S,v 1.41 2019/05/29 16:54:41 maxv Exp $ */ /* * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc. @@ -41,6 +41,7 @@ #include <machine/segments.h> #include "opt_xen.h" +#include "opt_svs.h" #include "assym.h" @@ -65,6 +66,17 @@ END(x86_mfence) #ifndef XENPV ENTRY(invlpg) +#ifdef SVS + movb _C_LABEL(svs_pcid),%al + testb %al,%al + jz 1f + pushq %rdi + pushq $PMAP_PCID_USER + movq $INVPCID_ADDRESS,%rax + invpcid (%rsp),%rax + addq $16,%rsp +1: /* FALLTHROUGH */ +#endif invlpg (%rdi) ret END(invlpg) @@ -112,7 +124,7 @@ END(ltr) ENTRY(tlbflushg) movq %cr4, %rax testq $CR4_PGE, %rax - jz 1f + jz tlbflush movq %rax, %rdx andq $~CR4_PGE, %rdx movq %rdx, %cr4 @@ -121,8 +133,19 @@ ENTRY(tlbflushg) END(tlbflushg) ENTRY(tlbflush) -1: - movq %cr3, %rax +#ifdef SVS + movb _C_LABEL(svs_pcid),%al + testb %al,%al + jz 1f + xorq %rax,%rax + pushq %rax + pushq %rax + movq $INVPCID_ALL_NONGLOBAL,%rax + invpcid (%rsp),%rax + addq $16,%rsp + ret +#endif +1: movq %cr3, %rax movq %rax, %cr3 ret END(tlbflush) diff --git a/sys/arch/amd64/amd64/genassym.cf b/sys/arch/amd64/amd64/genassym.cf index 9014f0bf63d..168cae5cb8b 100644 --- a/sys/arch/amd64/amd64/genassym.cf +++ b/sys/arch/amd64/amd64/genassym.cf @@ -1,4 +1,4 @@ -# $NetBSD: genassym.cf,v 1.75 2019/05/27 17:32:36 maxv Exp $ +# $NetBSD: genassym.cf,v 1.76 2019/05/29 16:54:41 maxv Exp $ # # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc. @@ -276,6 +276,14 @@ define ACPI_SUSPEND_CR3 offsetof(struct cpu_info, ci_suspend_cr3) define ACPI_SUSPEND_CR4 offsetof(struct cpu_info, ci_suspend_cr4) define ACPI_SUSPEND_CR8 offsetof(struct cpu_info, ci_suspend_cr8) +define INVPCID_ADDRESS INVPCID_ADDRESS +define INVPCID_CONTEXT INVPCID_CONTEXT +define INVPCID_ALL INVPCID_ALL +define INVPCID_ALL_NONGLOBAL INVPCID_ALL_NONGLOBAL + +define PMAP_PCID_USER PMAP_PCID_USER +define PMAP_PCID_KERN PMAP_PCID_KERN + if NIOAPIC > 0 define PIC_IOAPIC offsetof(struct pic, pic_ioapic) define IOAPIC_SC_REG offsetof(struct ioapic_softc, sc_reg) diff --git a/sys/arch/amd64/include/pmap.h b/sys/arch/amd64/include/pmap.h index c1b2e7fda22..b0b1d921d8e 100644 --- a/sys/arch/amd64/include/pmap.h +++ b/sys/arch/amd64/include/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.60 2019/03/09 09:09:56 maxv Exp $ */ +/* $NetBSD: pmap.h,v 1.61 2019/05/29 16:54:41 maxv Exp $ */ /* * Copyright (c) 1997 Charles D. Cranor and Washington University. @@ -179,6 +179,7 @@ void svs_lwp_switch(struct lwp *, struct lwp *); void svs_pdir_switch(struct pmap *); void svs_init(void); extern bool svs_enabled; +extern bool svs_pcid; #include <x86/pmap.h> |
