diff options
| author | jmcneill <jmcneill@NetBSD.org> | 2018-10-21 00:42:05 +0000 |
|---|---|---|
| committer | jmcneill <jmcneill@NetBSD.org> | 2018-10-21 00:42:05 +0000 |
| commit | cba61ca09fc65b734fcd548b8bb40602efc62fa0 (patch) | |
| tree | 60006300ba0de45e92cc1b22f34bcf75687b5cd1 /sys/arch/arm/include | |
| parent | acae09ddcb1c0a4531f728459bbcfd2f63452d39 (diff) | |
Add support for PCI MSI using ARM GICv2m.
Diffstat (limited to 'sys/arch/arm/include')
| -rw-r--r-- | sys/arch/arm/include/pci_machdep.h | 64 |
1 files changed, 62 insertions, 2 deletions
diff --git a/sys/arch/arm/include/pci_machdep.h b/sys/arch/arm/include/pci_machdep.h index e3d1fd14baf..1e04310c52a 100644 --- a/sys/arch/arm/include/pci_machdep.h +++ b/sys/arch/arm/include/pci_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: pci_machdep.h,v 1.13 2018/09/06 22:30:34 jmcneill Exp $ */ +/* $NetBSD: pci_machdep.h,v 1.14 2018/10/21 00:42:06 jmcneill Exp $ */ /* * Modified for arm32 by Mark Brinicombe @@ -48,7 +48,29 @@ */ typedef struct arm32_pci_chipset *pci_chipset_tag_t; typedef u_long pcitag_t; -typedef u_long pci_intr_handle_t; +typedef uint64_t pci_intr_handle_t; + +/* + * pci_intr_handle_t fields + */ +#define ARM_PCI_INTR_MSI_VEC 0x000007ff00000000ULL +#define ARM_PCI_INTR_MPSAFE 0x0000000080000000ULL +#define ARM_PCI_INTR_MSIX 0x0000000040000000ULL +#define ARM_PCI_INTR_MSI 0x0000000020000000ULL +#define ARM_PCI_INTR_FRAME 0x0000000000ff0000ULL +#define ARM_PCI_INTR_IRQ 0x000000000000ffffULL + +#ifdef __HAVE_PCI_MSI_MSIX +/* + * PCI MSI/MSI-X support + */ +typedef enum { + PCI_INTR_TYPE_INTX = 0, + PCI_INTR_TYPE_MSI, + PCI_INTR_TYPE_MSIX, + PCI_INTR_TYPE_SIZE, +} pci_intr_type_t; +#endif /* __HAVE_PCI_MSI_MSIX */ /* * Forward declarations. @@ -87,6 +109,26 @@ struct arm32_pci_chipset { #endif void (*pc_conf_interrupt)(void *, int, int, int, int, int *); +#ifdef __HAVE_PCI_MSI_MSIX + void *pc_msi_v; + pci_intr_type_t (*pc_intr_type)(void *, pci_intr_handle_t); + int (*pc_intr_alloc)(const struct pci_attach_args *, + pci_intr_handle_t **, int *, pci_intr_type_t); + void (*pc_intr_release)(void *, pci_intr_handle_t *, int); + int (*pc_intx_alloc)(const struct pci_attach_args *, + pci_intr_handle_t **); + int (*pc_msi_alloc)(const struct pci_attach_args *, + pci_intr_handle_t **, int *); + int (*pc_msi_alloc_exact)(const struct pci_attach_args *, + pci_intr_handle_t **, int); + int (*pc_msix_alloc)(const struct pci_attach_args *, + pci_intr_handle_t **, int *); + int (*pc_msix_alloc_exact)(const struct pci_attach_args *, + pci_intr_handle_t **, int); + int (*pc_msix_alloc_map)(const struct pci_attach_args *, + pci_intr_handle_t **, u_int *, int); +#endif + uint32_t pc_cfg_cmd; }; @@ -131,4 +173,22 @@ pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ihp, return pc->pc_intr_setattr(pc, ihp, attr, data); } +#ifdef __HAVE_PCI_MSI_MSIX +pci_intr_type_t pci_intr_type(pci_chipset_tag_t, pci_intr_handle_t); +int pci_intr_alloc(const struct pci_attach_args *, pci_intr_handle_t **, + int *, pci_intr_type_t); +void pci_intr_release(pci_chipset_tag_t, pci_intr_handle_t *, int); +int pci_intx_alloc(const struct pci_attach_args *, pci_intr_handle_t **); +int pci_msi_alloc(const struct pci_attach_args *, pci_intr_handle_t **, + int *); +int pci_msi_alloc_exact(const struct pci_attach_args *, + pci_intr_handle_t **, int); +int pci_msix_alloc(const struct pci_attach_args *, pci_intr_handle_t **, + int *); +int pci_msix_alloc_exact(const struct pci_attach_args *, + pci_intr_handle_t **, int); +int pci_msix_alloc_map(const struct pci_attach_args *, pci_intr_handle_t **, + u_int *, int); +#endif /* __HAVE_PCI_MSI_MSIX */ + #endif /* _ARM_PCI_MACHDEP_H_ */ |
