diff options
| author | leo <leo@NetBSD.org> | 1995-03-26 07:12:03 +0000 |
|---|---|---|
| committer | leo <leo@NetBSD.org> | 1995-03-26 07:12:03 +0000 |
| commit | 8b0113cfceadf3ee3bc427c4680b6b46bb57ceea (patch) | |
| tree | 2a5b7db0400149a733175c4b1a56774b2d4c1eb7 /sys/arch/atari/include/cpu.h | |
| parent | 282052c7a8346370f47965457329f3b0b3fa01b7 (diff) | |
NetBSD/Atari, port by Leo Weppelman.
Diffstat (limited to 'sys/arch/atari/include/cpu.h')
| -rw-r--r-- | sys/arch/atari/include/cpu.h | 219 |
1 files changed, 219 insertions, 0 deletions
diff --git a/sys/arch/atari/include/cpu.h b/sys/arch/atari/include/cpu.h new file mode 100644 index 00000000000..d748378f37e --- /dev/null +++ b/sys/arch/atari/include/cpu.h @@ -0,0 +1,219 @@ +/* $NetBSD: cpu.h,v 1.1.1.1 1995/03/26 07:12:07 leo Exp $ */ + +/* + * Copyright (c) 1988 University of Utah. + * Copyright (c) 1982, 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * the Systems Programming Group of the University of Utah Computer + * Science Department. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: Utah $Hdr: cpu.h 1.16 91/03/25$ + * + * @(#)cpu.h 7.7 (Berkeley) 6/27/91 + */ + +#ifndef _MACHINE_CPU_H_ +#define _MACHINE_CPU_H_ + +/* + * Exported definitions unique to atari/68k cpu support. + */ + +/* + * definitions of cpu-dependent requirements + * referenced in generic code + */ +#define COPY_SIGCODE /* copy sigcode above user stack in exec */ + +#define cpu_exec(p) /* nothing */ +#define cpu_swapin(p) /* nothing */ +#define cpu_wait(p) /* nothing */ +#define cpu_setstack(p, ap) (p)->p_md.md_regs[SP] = ap +#define cpu_set_init_frame(p, fp) (p)->p_md.md_regs = fp + +/* + * Arguments to hardclock and gatherstats encapsulate the previous + * machine state in an opaque clockframe. On the hp300, we use + * what the hardware pushes on an interrupt (frame format 0). + */ +struct clockframe { + u_short sr; /* sr at time of interrupt */ + u_long pc; /* pc at time of interrupt */ + u_short vo; /* vector offset (4-word frame) */ +}; + +#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0) +#define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0) +#define CLKF_PC(framep) ((framep)->pc) +#if 0 +/* We would like to do it this way... */ +#define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0) +#else +/* but until we start using PSL_M, we have to do this instead */ +#define CLKF_INTR(framep) (0) /* XXX */ +#endif + + +/* + * Preempt the current process if in interrupt from user mode, + * or after the current trap/syscall if in system mode. + */ +#define need_resched() {want_resched = 1; setsoftast();} + +/* + * Give a profiling tick to the current process from the softclock + * interrupt. On hp300, request an ast to send us through trap(), + * marking the proc as needing a profiling tick. + */ +#define profile_tick(p, framep) ((p)->p_flag |= P_OWEUPC, setsoftast()) +#define need_proftick(p) ((p)->p_flag |= P_OWEUPC, setsoftast()) + +/* + * Notify the current process (p) that it has a signal pending, + * process as soon as possible. + */ +#define signotify(p) setsoftast() + +#define setsoftast() (astpending = 1) + +extern int astpending; /* need trap before returning to user mode */ +extern int want_resched; /* resched() was called */ + +/* + * simulated software interrupt register + */ +extern unsigned char ssir; + +#define SIR_NET 0x1 +#define SIR_CLOCK 0x2 + +#define siroff(x) ssir &= ~(x) +#define setsoftnet() ssir |= SIR_NET +#define setsoftclock() ssir |= SIR_CLOCK + + +/* + * The rest of this should probably be moved to ../atari/ataricpu.h, + * although some of it could probably be put into generic 68k headers. + */ +#define BASEPRI(sr) ((sr & PSL_IPL) == 0) + +/* + * Values for machineid. + */ +#define ATARI_68020 (1L<<2) +#define ATARI_68030 (1L<<3) +#define ATARI_68040 (1L<<4) +#define ATARI_68881 (1L<<8) +#define ATARI_68882 (1L<<9) +#define ATARI_FPU40 (1L<<10) + + +/* + * Values for mmutype (assigned for quick testing) + */ +#define MMU_68030 -1 /* 68030 on-chip subset of 68851 */ +#define MMU_68851 1 /* Motorola 68851 */ +#define MMU_68040 -2 /* 68040 on-chip subsubset */ + +/* values for cpuspeed (not really related to clock speed due to caches) */ +#define MHZ_8 1 +#define MHZ_16 2 +#define MHZ_25 3 +#define MHZ_33 4 +#define MHZ_50 6 + +#ifdef KERNEL +extern int machineid, mmutype, cpu040; +#endif + +/* + * 68851 and 68030 MMU + */ +#define PMMU_LVLMASK 0x0007 +#define PMMU_INV 0x0400 +#define PMMU_WP 0x0800 +#define PMMU_ALV 0x1000 +#define PMMU_SO 0x2000 +#define PMMU_LV 0x4000 +#define PMMU_BE 0x8000 +#define PMMU_FAULT (PMMU_WP|PMMU_INV) + +/* 680X0 function codes */ +#define FC_USERD 1 /* user data space */ +#define FC_USERP 2 /* user program space */ +#define FC_SUPERD 5 /* supervisor data space */ +#define FC_SUPERP 6 /* supervisor program space */ +#define FC_CPU 7 /* CPU space */ + +/* fields in the 68020 cache control register */ +#define IC_ENABLE 0x0001 /* enable instruction cache */ +#define IC_FREEZE 0x0002 /* freeze instruction cache */ +#define IC_CE 0x0004 /* clear instruction cache entry */ +#define IC_CLR 0x0008 /* clear entire instruction cache */ + +/* additional fields in the 68030 cache control register */ +#define IC_BE 0x0010 /* instruction burst enable */ +#define DC_ENABLE 0x0100 /* data cache enable */ +#define DC_FREEZE 0x0200 /* data cache freeze */ +#define DC_CE 0x0400 /* clear data cache entry */ +#define DC_CLR 0x0800 /* clear entire data cache */ +#define DC_BE 0x1000 /* data burst enable */ +#define DC_WA 0x2000 /* write allocate */ + +/* fields in the 68040 cache control register */ +#define IC40_ENABLE 0x00008000 /* enable instruction cache */ +#define DC40_ENABLE 0x80000000 /* enable data cache */ + +#define CACHE_ON (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE) +#define CACHE_OFF (DC_CLR|IC_CLR) +#define CACHE_CLR (CACHE_ON) +#define IC_CLEAR (DC_WA|DC_BE|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE) +#define DC_CLEAR (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_ENABLE) + +/* 68040 cache control */ +#define CACHE40_ON (IC40_ENABLE|DC40_ENABLE) +#define CACHE40_OFF 0x00000000 + +/* + * CTL_MACHDEP definitions. + */ +#define CPU_CONSDEV 1 /* dev_t: console terminal device */ +#define CPU_MAXID 2 /* number of valid machdep ids */ + +#define CTL_MACHDEP_NAMES { \ + { 0, 0 }, \ + { "console_device", CTLTYPE_STRUCT }, \ +} + +#endif /* !_MACHINE_CPU_H_ */ |
