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authormsaitoh <msaitoh@NetBSD.org>2013-11-15 08:47:55 +0000
committermsaitoh <msaitoh@NetBSD.org>2013-11-15 08:47:55 +0000
commitb1bcfb8009819cc093d9a2f7c84d38f405ea046d (patch)
tree4ccc83da4d4724af6caa6d3efccb0d3f5cfdfc0e /sys/arch/x86/include
parentd77d258119a86b80ff86aa434cab8d452eac169f (diff)
Modify some macros and add some new macros for CPU family and model
to reduce code duplication and to avoid bug. CPUID_TO_STEPPING(cpuid) (not changed) CPUID_TO_FAMILY(cpuid) (new) CPUID_TO_MODEL(cpuid) (new) Return the display family and the display model. The macro names are the same as FreeBSD. CPUID_TO_BASEFAMILY(cpuid) (The old name was CPUID2FAMILY) CPUID_TO_BASEMODEL(cpuid) (The old name was CPUID2MODEL) Only for the base field. CPUID_TO_EXTFAMILY(cpuid) (The old name was CPUID2EXTFAMILY) CPUID_TO_EXTMODEL(cpuid) (The old name was CPUID2EXTMODEL) Only for the extended field. See http://mail-index.netbsd.org/port-amd64/2013/11/12/msg001978.html
Diffstat (limited to 'sys/arch/x86/include')
-rw-r--r--sys/arch/x86/include/specialreg.h27
1 files changed, 19 insertions, 8 deletions
diff --git a/sys/arch/x86/include/specialreg.h b/sys/arch/x86/include/specialreg.h
index 8cfcbad3071..4d673529333 100644
--- a/sys/arch/x86/include/specialreg.h
+++ b/sys/arch/x86/include/specialreg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.71 2013/10/21 06:11:49 msaitoh Exp $ */
+/* $NetBSD: specialreg.h,v 1.72 2013/11/15 08:47:55 msaitoh Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -192,19 +192,30 @@
"\31" "DEADLINE" "\32" "AES" "\33" "XSAVE" "\34" "OSXSAVE" \
"\35" "AVX" "\36" "F16C" "\37" "RDRAND" "\40" "RAZ"
-#define CPUID2FAMILY(cpuid) (((cpuid) >> 8) & 0xf)
-#define CPUID2MODEL(cpuid) (((cpuid) >> 4) & 0xf)
-#define CPUID2STEPPING(cpuid) ((cpuid) & 0xf)
+/* CPUID Fn00000001 %eax */
+
+#define CPUID_TO_BASEFAMILY(cpuid) (((cpuid) >> 8) & 0xf)
+#define CPUID_TO_BASEMODEL(cpuid) (((cpuid) >> 4) & 0xf)
+#define CPUID_TO_STEPPING(cpuid) ((cpuid) & 0xf)
/*
- * The Extended family bits should only be inspected when CPUID2FAMILY()
+ * The Extended family bits should only be inspected when CPUID_TO_BASEFAMILY()
* returns 15. They are use to encode family value 16 to 270 (add 15).
- * The Extended model hits are the high 4 bits of the model.
+ * The Extended model bits are the high 4 bits of the model.
* They are only valid for family >= 15 or family 6 (intel, but all amd
* family 6 are documented to return zero bits for them).
*/
-#define CPUID2EXTFAMILY(cpuid) (((cpuid) >> 20) & 0xff)
-#define CPUID2EXTMODEL(cpuid) (((cpuid) >> 16) & 0xf)
+#define CPUID_TO_EXTFAMILY(cpuid) (((cpuid) >> 20) & 0xff)
+#define CPUID_TO_EXTMODEL(cpuid) (((cpuid) >> 16) & 0xf)
+
+/* The macros for the Display Family and the Display Model */
+#define CPUID_TO_FAMILY(cpuid) (CPUID_TO_BASEFAMILY(cpuid) \
+ + ((CPUID_TO_BASEFAMILY(cpuid) != 0x0f) \
+ ? 0 : CPUID_TO_EXTFAMILY(cpuid)))
+#define CPUID_TO_MODEL(cpuid) (CPUID_TO_BASEMODEL(cpuid) \
+ | ((CPUID_TO_BASEFAMILY(cpuid) != 0x0f) \
+ && (CPUID_TO_BASEFAMILY(cpuid) != 0x06) \
+ ? 0 : (CPUID_TO_EXTMODEL(cpuid) << 4)))
/*
* Intel Deterministic Cache Parameter Leaf