diff options
| author | andvar <andvar@NetBSD.org> | 2021-12-10 20:36:02 +0000 |
|---|---|---|
| committer | andvar <andvar@NetBSD.org> | 2021-12-10 20:36:02 +0000 |
| commit | ec0fc95dd18bb0e67dfbb1e4c92f0d5dcc5a8a43 (patch) | |
| tree | cadd32f9c2c615b79b2b0b7fc1ae2de385601faf /sys/arch | |
| parent | 2c650dfce1d11c9d2b90557108902fac4c2f6baf (diff) | |
s/occured/occurred/ in comments, log messages and man pages.
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/aarch64/aarch64/locore.S | 6 | ||||
| -rw-r--r-- | sys/arch/aarch64/aarch64/pmap.c | 6 | ||||
| -rw-r--r-- | sys/arch/arm/xscale/ixp425_qmgr.c | 6 | ||||
| -rw-r--r-- | sys/arch/ews4800mips/sbd/kbms_sbdio.c | 6 | ||||
| -rw-r--r-- | sys/arch/luna68k/stand/boot/sc.c | 4 | ||||
| -rw-r--r-- | sys/arch/mips/ingenic/ingenic_regs.h | 8 | ||||
| -rw-r--r-- | sys/arch/sparc/dev/sxreg.h | 14 | ||||
| -rw-r--r-- | sys/arch/sparc64/dev/psmreg.h | 2 | ||||
| -rw-r--r-- | sys/arch/xen/xen/privcmd.c | 6 |
9 files changed, 29 insertions, 29 deletions
diff --git a/sys/arch/aarch64/aarch64/locore.S b/sys/arch/aarch64/aarch64/locore.S index 5da4861b7ef..23c2d985976 100644 --- a/sys/arch/aarch64/aarch64/locore.S +++ b/sys/arch/aarch64/aarch64/locore.S @@ -1,4 +1,4 @@ -/* $NetBSD: locore.S,v 1.83 2021/11/14 16:56:32 riastradh Exp $ */ +/* $NetBSD: locore.S,v 1.84 2021/12/10 20:36:02 andvar Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu <ryo@nerv.org> @@ -38,7 +38,7 @@ #include <aarch64/hypervisor.h> #include "assym.h" -RCSID("$NetBSD: locore.S,v 1.83 2021/11/14 16:56:32 riastradh Exp $") +RCSID("$NetBSD: locore.S,v 1.84 2021/12/10 20:36:02 andvar Exp $") #ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED #define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE @@ -148,7 +148,7 @@ ASENTRY_NP(aarch64_start) br x20 /* jump to the kernel virtual address */ aarch64_fatal: - PRINT("fatal error occured while booting\n") + PRINT("fatal error occurred while booting\n") /* return to bootloader. if switched from EL2 to EL1, It might fail */ mov lr, x27 mov sp, x28 diff --git a/sys/arch/aarch64/aarch64/pmap.c b/sys/arch/aarch64/aarch64/pmap.c index 500d936401c..3214bdcb610 100644 --- a/sys/arch/aarch64/aarch64/pmap.c +++ b/sys/arch/aarch64/aarch64/pmap.c @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.120 2021/12/07 21:37:36 andvar Exp $ */ +/* $NetBSD: pmap.c,v 1.121 2021/12/10 20:36:02 andvar Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu <ryo@nerv.org> @@ -27,7 +27,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.120 2021/12/07 21:37:36 andvar Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.121 2021/12/10 20:36:02 andvar Exp $"); #include "opt_arm_debug.h" #include "opt_ddb.h" @@ -2495,7 +2495,7 @@ pmap_fault_fixup(struct pmap *pm, vaddr_t va, vm_prot_t accessprot, bool user) goto done; } - /* pte is readable and writable, but occured fault? probably copy(9) */ + /* pte is readable and writable, but occurred fault? probably copy(9) */ if ((pte & LX_BLKPAG_AF) && ((pte & LX_BLKPAG_AP) == LX_BLKPAG_AP_RW)) goto done; diff --git a/sys/arch/arm/xscale/ixp425_qmgr.c b/sys/arch/arm/xscale/ixp425_qmgr.c index 93a801f610e..4a55c9b2b3e 100644 --- a/sys/arch/arm/xscale/ixp425_qmgr.c +++ b/sys/arch/arm/xscale/ixp425_qmgr.c @@ -1,4 +1,4 @@ -/* $NetBSD: ixp425_qmgr.c,v 1.10 2019/12/27 09:25:57 msaitoh Exp $ */ +/* $NetBSD: ixp425_qmgr.c,v 1.11 2021/12/10 20:36:02 andvar Exp $ */ /*- * Copyright (c) 2006 Sam Leffler, Errno Consulting @@ -60,7 +60,7 @@ */ #include <sys/cdefs.h> /*__FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/ixp425_qmgr.c,v 1.1 2006/11/19 23:55:23 sam Exp $");*/ -__KERNEL_RCSID(0, "$NetBSD: ixp425_qmgr.c,v 1.10 2019/12/27 09:25:57 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ixp425_qmgr.c,v 1.11 2021/12/10 20:36:02 andvar Exp $"); /* * Intel XScale Queue Manager support. @@ -436,7 +436,7 @@ ixpqmgr_qwrite(int qId, uint32_t entry) return ENOSPC; } /* - * No overflow occured : someone is draining the queue + * No overflow occurred : someone is draining the queue * and the current counter needs to be * updated from the current number of entries in the queue */ diff --git a/sys/arch/ews4800mips/sbd/kbms_sbdio.c b/sys/arch/ews4800mips/sbd/kbms_sbdio.c index a6f60e7f080..6e7f71467de 100644 --- a/sys/arch/ews4800mips/sbd/kbms_sbdio.c +++ b/sys/arch/ews4800mips/sbd/kbms_sbdio.c @@ -1,4 +1,4 @@ -/* $NetBSD: kbms_sbdio.c,v 1.14 2021/09/18 15:14:40 tsutsui Exp $ */ +/* $NetBSD: kbms_sbdio.c,v 1.15 2021/12/10 20:36:02 andvar Exp $ */ /*- * Copyright (c) 2004, 2005 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: kbms_sbdio.c,v 1.14 2021/09/18 15:14:40 tsutsui Exp $"); +__KERNEL_RCSID(0, "$NetBSD: kbms_sbdio.c,v 1.15 2021/12/10 20:36:02 andvar Exp $"); #include <sys/param.h> #include <sys/systm.h> @@ -203,7 +203,7 @@ kbms_sbdio_intr(void *arg) *reg->mouse_csr = 1; if (((v = *reg->mouse_csr) & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) != 0) { - /* Error occured. re-initialize */ + /* Error occurred. re-initialize */ printf("initialize mouse. error=%02x\n", v); mouse_init(sc); } else { diff --git a/sys/arch/luna68k/stand/boot/sc.c b/sys/arch/luna68k/stand/boot/sc.c index d27ead9e3c8..c48d9de6b88 100644 --- a/sys/arch/luna68k/stand/boot/sc.c +++ b/sys/arch/luna68k/stand/boot/sc.c @@ -1,4 +1,4 @@ -/* $NetBSD: sc.c,v 1.18 2021/06/15 17:16:16 tsutsui Exp $ */ +/* $NetBSD: sc.c,v 1.19 2021/12/10 20:36:02 andvar Exp $ */ /* * Copyright (c) 1992 OMRON Corporation. @@ -651,7 +651,7 @@ scintr(void) goto get_intr; } - /* Unknown Interrupt occured */ + /* Unknown interrupt occurred */ return -1; diff --git a/sys/arch/mips/ingenic/ingenic_regs.h b/sys/arch/mips/ingenic/ingenic_regs.h index f051f597e30..e75b53c0bcd 100644 --- a/sys/arch/mips/ingenic/ingenic_regs.h +++ b/sys/arch/mips/ingenic/ingenic_regs.h @@ -1,4 +1,4 @@ -/* $NetBSD: ingenic_regs.h,v 1.26 2020/08/09 07:08:29 skrll Exp $ */ +/* $NetBSD: ingenic_regs.h,v 1.27 2021/12/10 20:36:03 andvar Exp $ */ /*- * Copyright (c) 2014 Michael Lorenz @@ -536,9 +536,9 @@ gpio_as_input(uint32_t g, int pin) #define JZ_SMBFHCNT 0x1C /* Fast speed SMB SCL high count */ #define JZ_SMBFLCNT 0x20 /* Fast speed SMB SCL low count */ #define JZ_SMBINTST 0x2C /* SMB Interrupt Status */ - #define JZ_ISTT 0x400 /* START or RESTART occured */ - #define JZ_ISTP 0x200 /* STOP occured */ - #define JZ_TXABT 0x40 /* ABORT occured */ + #define JZ_ISTT 0x400 /* START or RESTART occurred */ + #define JZ_ISTP 0x200 /* STOP occurred */ + #define JZ_TXABT 0x40 /* ABORT occurred */ #define JZ_TXEMP 0x10 /* TX FIFO is low */ #define JZ_TXOF 0x08 /* TX FIFO is high */ #define JZ_RXFL 0x04 /* RX FIFO is at JZ_SMBRXTL*/ diff --git a/sys/arch/sparc/dev/sxreg.h b/sys/arch/sparc/dev/sxreg.h index 05b14ff4961..f496323ba32 100644 --- a/sys/arch/sparc/dev/sxreg.h +++ b/sys/arch/sparc/dev/sxreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: sxreg.h,v 1.20 2021/12/08 17:03:38 macallan Exp $ */ +/* $NetBSD: sxreg.h,v 1.21 2021/12/10 20:36:03 andvar Exp $ */ /*- * Copyright (c) 2013 The NetBSD Foundation, Inc. @@ -82,13 +82,13 @@ */ #if 0 #define SX_PB 0x00001000 /* enable page bound checking */ -#define SX_WO 0x00002000 /* write occured ( by SX ) */ +#define SX_WO 0x00002000 /* write occurred ( by SX ) */ #define SX_GO 0x00004000 /* start/stop the processor */ #define SX_MT 0x00008000 /* instruction queue is empty */ #endif #define SX_PB 0x00000400 /* enable page bound checking */ -#define SX_WO 0x00000800 /* write occured ( by SX ) */ +#define SX_WO 0x00000800 /* write occurred ( by SX ) */ #define SX_GO 0x00001000 /* start/stop the processor */ #define SX_JB 0x00002000 /* Jammed/Busy specifies the type of events */ /* which increment the SX timer */ @@ -98,16 +98,16 @@ /* instruction is pending in the Q */ #define SX_B0MOD 0x00010000 /* When set by SX it indicates that a write */ /* to bank zero of the SX registers (0-31) */ - /* occured */ + /* occurred */ #define SX_B1MOD 0x00020000 /* When set by SX it indicates that a write */ /* to bank 1 of the SX registers (32-63) */ - /* occured */ + /* occurred */ #define SX_B2MOD 0x00040000 /* When set by SX it indicates that a write */ /* to bank 2 of the SX registers (64-95) */ - /* occured */ + /* occurred */ #define SX_B3MOD 0x00080000 /* When set by SX it indicates that a write */ /* to bank 3 of the SX registers (96-127) */ - /* occured */ + /* occurred */ /* SX_ERROR */ #define SX_SE1 0x00000001 /* illegal instruction */ diff --git a/sys/arch/sparc64/dev/psmreg.h b/sys/arch/sparc64/dev/psmreg.h index d5c059c1c74..24dd135ca8d 100644 --- a/sys/arch/sparc64/dev/psmreg.h +++ b/sys/arch/sparc64/dev/psmreg.h @@ -71,7 +71,7 @@ #define PSM_STAT_OVT 0x02 /* Over temperature condition */ #define PSM_STAT_UN1 0x04 /* Unused */ #define PSM_STAT_UN2 0x08 /* Unused */ -#define PSM_STAT_ERR 0x10 /* Hardware error occured */ +#define PSM_STAT_ERR 0x10 /* Hardware error occurred */ #define PSM_STAT_MCR 0x20 /* Master Command Register busy */ #define PSM_STAT_WBF 0x40 /* Write buffer full */ #define PSM_STAT_RDA 0x80 /* Read data available */ diff --git a/sys/arch/xen/xen/privcmd.c b/sys/arch/xen/xen/privcmd.c index 33a665aa6de..4f4be5973b3 100644 --- a/sys/arch/xen/xen/privcmd.c +++ b/sys/arch/xen/xen/privcmd.c @@ -1,4 +1,4 @@ -/* $NetBSD: privcmd.c,v 1.60 2020/11/30 17:06:02 bouyer Exp $ */ +/* $NetBSD: privcmd.c,v 1.61 2021/12/10 20:36:03 andvar Exp $ */ /*- * Copyright (c) 2004 Christian Limpach. @@ -27,7 +27,7 @@ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: privcmd.c,v 1.60 2020/11/30 17:06:02 bouyer Exp $"); +__KERNEL_RCSID(0, "$NetBSD: privcmd.c,v 1.61 2021/12/10 20:36:03 andvar Exp $"); #include <sys/param.h> #include <sys/systm.h> @@ -772,7 +772,7 @@ privcmd_ioctl(void *v) hc->retval = error; error = 0; } else { - /* error occured, return the errno */ + /* error occurred, return the errno */ error = privcmd_xen2bsd_errno(error); hc->retval = 0; } |
