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authorthorpej <thorpej@NetBSD.org>2000-06-29 16:53:48 +0000
committerthorpej <thorpej@NetBSD.org>2000-06-29 16:53:48 +0000
commit756aa08443b28da033365eea26585e07c8fb01cc (patch)
treeea7b50bb059ab38808329449dc75aad0ecb50c0f /sys/dev/ic
parentdd3a57931e28fee9f1dde6f09835886ad7739cdd (diff)
Since the RFA is allocated in a normal mbuf, as opposed to DMA-safe
memory that is explicitly mapped in a DMA-coherent manner, we must make sure to PREREAD sync the RFA after noticing a clear "complete" bit. Without this, the clear bit will linger in the cache, and the CPU will not notice when the chip updates the bit via DMA later. From Izumi Tsutsui on port-arm32@netbsd.org.
Diffstat (limited to 'sys/dev/ic')
-rw-r--r--sys/dev/ic/i82557.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/dev/ic/i82557.c b/sys/dev/ic/i82557.c
index 0db5e8afad0..72ad4e4810d 100644
--- a/sys/dev/ic/i82557.c
+++ b/sys/dev/ic/i82557.c
@@ -1,4 +1,4 @@
-/* $NetBSD: i82557.c,v 1.35 2000/06/28 17:12:57 mrg Exp $ */
+/* $NetBSD: i82557.c,v 1.36 2000/06/29 16:53:48 thorpej Exp $ */
/*-
* Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
@@ -923,6 +923,7 @@ fxp_intr(arg)
* We have processed all of the
* receive buffers.
*/
+ FXP_RFASYNC(sc, m, BUS_DMASYNC_PREREAD);
goto do_transmit;
}