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authorcgd <cgd@NetBSD.org>1995-08-17 18:04:55 +0000
committercgd <cgd@NetBSD.org>1995-08-17 18:04:55 +0000
commitc9dbf2d1d2036da30b6cf15cd28ea007a68bca62 (patch)
treee7a685fb138ce758f135b5cc79fa5e16508724ca /sys/dev/ic
parent7b8694c512e874545fb9b03fe6f310dd707817c9 (diff)
clean up 7/26 de snapshot import
Diffstat (limited to 'sys/dev/ic')
-rw-r--r--sys/dev/ic/dc21040reg.h22
1 files changed, 21 insertions, 1 deletions
diff --git a/sys/dev/ic/dc21040reg.h b/sys/dev/ic/dc21040reg.h
index b557967e5e8..58c9de9ab4e 100644
--- a/sys/dev/ic/dc21040reg.h
+++ b/sys/dev/ic/dc21040reg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: dc21040reg.h,v 1.4 1995/07/24 05:26:53 cgd Exp $ */
+/* $NetBSD: dc21040reg.h,v 1.5 1995/08/17 18:04:55 cgd Exp $ */
/*-
* Copyright (c) 1994, 1995 Matt Thomas (thomas@lkg.dec.com)
@@ -309,4 +309,24 @@ typedef struct {
#define SROMCMD_RD 6
#define SROM_BITWIDTH 6
+
+/*
+ * Definitions for the DE425.
+ */
+#define DE425_CFID 0x08 /* Configuration Id */
+#define DE425_CFCS 0x0C /* Configuration Command-Status */
+#define DE425_CFRV 0x18 /* Configuration Revision */
+#define DE425_CFLT 0x1C /* Configuration Latency Timer */
+#define DE425_CBIO 0x28 /* Configuration Base IO Address */
+#define DE425_CFDA 0x2C /* Configuration Driver Area */
+#define DE425_ENETROM_OFFSET 0xC90 /* Offset in I/O space for ENETROM */
+#define DE425_CFG0 0xC88 /* IRQ register */
+
+#define DEC_VENDORID 0x1011
+#define DC21040_CHIPID 0x0002
+#define DC21140_CHIPID 0x0009
+#define DC21041_CHIPID 0x0014
+#define PCI_VENDORID(x) ((x) & 0xFFFF)
+#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF)
+
#endif /* !defined(_DC21040_H) */