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authorjeffs <jeffs@NetBSD.org>2000-07-25 17:56:05 +0000
committerjeffs <jeffs@NetBSD.org>2000-07-25 17:56:05 +0000
commit3a90817270fc1e38fc082392f9122cae77d64418 (patch)
treeca9de37369889ca2729c330950f405d72742407e /sys/dev/microcode/isp
parent219910d2e60e002e8238d44d5d92c4bb918990c9 (diff)
Add option to apply additional mask to the SR at run-time for MIPS3 platforms.
By default this is off, and only slightly changes the code to load SR when a temp register is available. This can be used by the platform code to handle slow to clear interrupts (our case) or to mask off any interrupt any interrupt at run-time. This can be very useful for embedded platforms that have less than desirable interrupt properties.
Diffstat (limited to 'sys/dev/microcode/isp')
0 files changed, 0 insertions, 0 deletions