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authormrg <mrg@NetBSD.org>2022-01-09 00:36:28 +0000
committermrg <mrg@NetBSD.org>2022-01-09 00:36:28 +0000
commit475eeafa528aac55a5bf5a22da7bd55ceb7a4738 (patch)
tree7059e0089046f68a7425b66c568d43901adc4c9e /sys/dev/microcode/rum/microcode.h
parentc0ec70fa3bc559c815d8b8cab98b0f768a295ce9 (diff)
eqos: handle the GMAC_MTL_INTERRUPT_STATUS register having something
drain a couple of registers that want either a read or a write-1-to- clear bit, and keep track of how many happen via evcnt. i had this trigger one time, but not since adding instrumentation to see exactly it was saying (the GMAC_MTL_INTERRUPT_STATUS_Q0IS bit was set, and it requires some handling now implemented.) ok jmcneill
Diffstat (limited to 'sys/dev/microcode/rum/microcode.h')
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