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authorbouyer <bouyer@NetBSD.org>2008-06-28 17:42:53 +0000
committerbouyer <bouyer@NetBSD.org>2008-06-28 17:42:53 +0000
commitefe8b350b3919a7b862b0fec2094179f3c108a50 (patch)
tree02270a71f624d2e10feca43b821e44e7062e8b8c /sys/dev/microcode/tools
parentcaba2baea2a9e6173fa749da4e624817f44edf71 (diff)
Add appropriate bus_dmamap_sync() calls to uhci(4), ohci(4) and ehci(4),
as proposed on tech-kern@. While all DMA memory used in the USB framework is mapped BUS_DMAMAP_COHERENT (including data memory, which is memcpy'd from/to USB-private buffers), the CPU can reorder loads or stores from/to main memory, causing the controller to have an incoherent view of the DMA descriptors lists for a short time. bus_dmamap_sync() should contain memory barriers that prevents the CPU from reordering load/store. Note that BUS_DMAMAP_COHERENT is still required for the DMA descriptor lists - these can't work properly with software cache coherency. This fixes "host controller process error/host controller halted" errors I'm occasionally seeing with a umodem device on uhci on x86. Thanks to Michael Lorenz for testing it on his O2, and Izumi Tsutsui on his Cobalt Qube 2700.
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