diff options
| author | ad <ad@NetBSD.org> | 2008-05-10 16:12:32 +0000 |
|---|---|---|
| committer | ad <ad@NetBSD.org> | 2008-05-10 16:12:32 +0000 |
| commit | 75ada79f3302335edeef2e707e06fba5a818ea60 (patch) | |
| tree | 6f34deccfc533851474909668cb0951473c8eafd /sys/dev/microcode | |
| parent | 7734697b2f44ce0f4f7cc3b3225a9b6536caf56e (diff) | |
Improve x86 tsc handling:
- Ditch the cross-CPU calibration stuff. It didn't work properly, and it's
near impossible to synchronize the CPUs in a running system, because bus
traffic will interfere with any calibration attempt, messing up the
timings.
- Only enable the TSC on CPUs where we are sure it does not drift. If we are
On a known good CPU, give the TSC high timecounter quality, making it the
default.
- When booting CPUs, detect TSC skew and account for it. Most Intel MP
systems have synchronized counters, but that need not be true if the
system has a complicated bus structure. As far as I know, AMD systems
do not have synchronized TSCs and so we need to handle skew.
- While an AP is waiting to be set running, try and make the TSC drift by
entering a reduced power state. If we detect drift, ensure that the TSC
does not get a high timecounter quality. This should not happen and is
only for safety.
- Make cpu_counter() stuff LKM safe.
Diffstat (limited to 'sys/dev/microcode')
0 files changed, 0 insertions, 0 deletions
