summaryrefslogtreecommitdiff
path: root/sys/dev/pci/pucdata.c
diff options
context:
space:
mode:
authormsaitoh <msaitoh@NetBSD.org>2014-01-26 10:20:20 +0000
committermsaitoh <msaitoh@NetBSD.org>2014-01-26 10:20:20 +0000
commit35d5811c19ee0b72d342bb405c859d85df2d857e (patch)
tree75a3cac756dc8669a716db93c2dafb58e6658b1c /sys/dev/pci/pucdata.c
parent80eb48e27d711338b77ac7e0e129cdfc738e1bd8 (diff)
Add some OXPCIe952 devices.
Diffstat (limited to 'sys/dev/pci/pucdata.c')
-rw-r--r--sys/dev/pci/pucdata.c78
1 files changed, 74 insertions, 4 deletions
diff --git a/sys/dev/pci/pucdata.c b/sys/dev/pci/pucdata.c
index e6897e0484d..17c335809ad 100644
--- a/sys/dev/pci/pucdata.c
+++ b/sys/dev/pci/pucdata.c
@@ -1,4 +1,4 @@
-/* $NetBSD: pucdata.c,v 1.91 2014/01/23 17:21:06 msaitoh Exp $ */
+/* $NetBSD: pucdata.c,v 1.92 2014/01/26 10:20:20 msaitoh Exp $ */
/*
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.91 2014/01/23 17:21:06 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.92 2014/01/26 10:20:20 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -1020,15 +1020,85 @@ const struct puc_device_description puc_devices[] = {
},
/* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_0,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_1,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
{ "Oxford Semiconductor OXPCIe952 UARTs",
- { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952,
- PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952 },
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S,
+ PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S },
{ 0xffff, 0xffff, 0xffff, 0xffff },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
},
},
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_3,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_4,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_5,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_6,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
/* Oxford Semiconductor OXmPCI952 PCI UARTs */
{ "Oxford Semiconductor OXmPCI952 UARTs",
{ PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_EXSYS_EX41092,