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authorkiyohara <kiyohara@NetBSD.org>2007-07-11 07:53:29 +0000
committerkiyohara <kiyohara@NetBSD.org>2007-07-11 07:53:29 +0000
commit1f48268a370241bdca85c8ff985178746cdd28c8 (patch)
tree74bfaff49e2744b26f04d81a398d07dd175c16f5 /sys/dev
parent0fc9d7ee0dd5c5edbf4e1693ca6ca24bde1b4a37 (diff)
Add support for NVIDIA nForce 2/3/4 SMBus controller and SMBus driver.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/files.pci9
-rw-r--r--sys/dev/pci/nfsmb.c463
-rw-r--r--sys/dev/pci/nfsmbreg.h62
3 files changed, 533 insertions, 1 deletions
diff --git a/sys/dev/pci/files.pci b/sys/dev/pci/files.pci
index 5c62ab72480..b38c91aa550 100644
--- a/sys/dev/pci/files.pci
+++ b/sys/dev/pci/files.pci
@@ -1,4 +1,4 @@
-# $NetBSD: files.pci,v 1.293 2007/07/10 06:07:55 jklos Exp $
+# $NetBSD: files.pci,v 1.294 2007/07/11 07:53:29 kiyohara Exp $
#
# Config file and device description for machine-independent PCI code.
# Included by ports that need it. Requires that the SCSI files be
@@ -895,3 +895,10 @@ include "dev/pci/drm/files.pcidrm"
# generic framebuffer console driver, PCI frontend
attach genfb at pci with genfb_pci
file dev/pci/genfb_pci.c genfb_pci
+
+# NVIDIA nForce2/3/4 SMBus controller
+device nfsmbc { }
+attach nfsmbc at pci
+device nfsmb: i2cbus
+attach nfsmb at nfsmbc
+file dev/pci/nfsmb.c nfsmbc | nfsmb
diff --git a/sys/dev/pci/nfsmb.c b/sys/dev/pci/nfsmb.c
new file mode 100644
index 00000000000..559c32528ee
--- /dev/null
+++ b/sys/dev/pci/nfsmb.c
@@ -0,0 +1,463 @@
+/* $NetBSD: nfsmb.c,v 1.1 2007/07/11 07:53:29 kiyohara Exp $ */
+/*
+ * Copyright (c) 2007 KIYOHARA Takashi
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: nfsmb.c,v 1.1 2007/07/11 07:53:29 kiyohara Exp $");
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/proc.h>
+
+#include <machine/bus.h>
+
+#include <dev/i2c/i2cvar.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcidevs.h>
+
+#include <dev/pci/nfsmbreg.h>
+
+
+struct nfsmbc_attach_args {
+ int nfsmb_num;
+ bus_space_tag_t nfsmb_iot;
+ int nfsmb_addr;
+};
+
+struct nfsmb_softc;
+struct nfsmbc_softc {
+ struct device sc_dev;
+
+ pci_chipset_tag_t sc_pc;
+ pcitag_t sc_tag;
+ struct pci_attach_args *sc_pa;
+
+ bus_space_tag_t sc_iot;
+ struct device *sc_nfsmb[2];
+};
+
+struct nfsmb_softc {
+ struct device sc_dev;
+ int sc_num;
+ struct device *sc_nfsmbc;
+
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+
+ struct i2c_controller sc_i2c; /* i2c controller info */
+ struct lock sc_lock;
+};
+
+
+static int nfsmbc_match(struct device *, struct cfdata *, void *);
+static void nfsmbc_attach(struct device *, struct device *, void *);
+static int nfsmbc_print(void *, const char *);
+
+static int nfsmb_match(struct device *, struct cfdata *, void *);
+static void nfsmb_attach(struct device *, struct device *, void *);
+static int nfsmb_acquire_bus(void *, int);
+static void nfsmb_release_bus(void *, int);
+static int nfsmb_exec(
+ void *, i2c_op_t, i2c_addr_t, const void *, size_t, void *, size_t, int);
+static int nfsmb_check_done(struct nfsmb_softc *);
+static int
+ nfsmb_send_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
+static int nfsmb_write_1(
+ struct nfsmb_softc *, uint8_t, uint8_t, i2c_addr_t, i2c_op_t, int);
+static int nfsmb_write_2(
+ struct nfsmb_softc *, uint8_t, uint16_t, i2c_addr_t, i2c_op_t, int);
+static int nfsmb_receive_1(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
+static int
+ nfsmb_read_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
+static int
+ nfsmb_read_2(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
+
+
+CFATTACH_DECL(nfsmbc, sizeof(struct nfsmbc_softc),
+ nfsmbc_match, nfsmbc_attach, NULL, NULL);
+
+static int
+nfsmbc_match(struct device *parent, struct cfdata *match, void *aux)
+{
+ struct pci_attach_args *pa = aux;
+
+ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
+ switch (PCI_PRODUCT(pa->pa_id)) {
+ case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
+ case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
+ case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
+ case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
+ case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
+ case PCI_PRODUCT_NVIDIA_MCP04_SMBUS:
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+static void
+nfsmbc_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct nfsmbc_softc *sc = (struct nfsmbc_softc *) self;
+ struct pci_attach_args *pa = aux;
+ struct nfsmbc_attach_args nfsmbca;
+ uint32_t reg;
+ char devinfo[256];
+
+ aprint_naive("\n");
+ pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
+ aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
+ PCI_REVISION(pa->pa_class));
+
+ sc->sc_pc = pa->pa_pc;
+ sc->sc_tag = pa->pa_tag;
+ sc->sc_pa = pa;
+ sc->sc_iot = pa->pa_iot;
+
+ nfsmbca.nfsmb_iot = sc->sc_iot;
+
+ reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB1);
+ nfsmbca.nfsmb_num = 1;
+ nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
+ sc->sc_nfsmb[0] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
+
+ reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB2);
+ nfsmbca.nfsmb_num = 2;
+ nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
+ sc->sc_nfsmb[1] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
+}
+
+static int
+nfsmbc_print(void *aux, const char *pnp)
+{
+ struct nfsmbc_attach_args *nfsmbcap = aux;
+
+ if (pnp)
+ aprint_normal("nfsmb SMBus %d at %s",
+ nfsmbcap->nfsmb_num, pnp);
+ else
+ aprint_normal(" SMBus %d", nfsmbcap->nfsmb_num);
+ return UNCONF;
+}
+
+
+CFATTACH_DECL(nfsmb, sizeof(struct nfsmb_softc),
+ nfsmb_match, nfsmb_attach, NULL, NULL);
+
+static int
+nfsmb_match(struct device *parent, struct cfdata *match, void *aux)
+{
+ struct nfsmbc_attach_args *nfsmbcap = aux;
+
+ if (nfsmbcap->nfsmb_num == 1 || nfsmbcap->nfsmb_num == 2)
+ return 1;
+ return 0;
+}
+
+static void
+nfsmb_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct nfsmb_softc *sc = (struct nfsmb_softc *) self;
+ struct nfsmbc_attach_args *nfsmbcap = aux;
+ struct i2cbus_attach_args iba;
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+ sc->sc_nfsmbc = parent;
+ sc->sc_num = nfsmbcap->nfsmb_num;
+ sc->sc_iot = nfsmbcap->nfsmb_iot;
+
+ /* register with iic */
+ sc->sc_i2c.ic_cookie = sc;
+ sc->sc_i2c.ic_acquire_bus = nfsmb_acquire_bus;
+ sc->sc_i2c.ic_release_bus = nfsmb_release_bus;
+ sc->sc_i2c.ic_send_start = NULL;
+ sc->sc_i2c.ic_send_stop = NULL;
+ sc->sc_i2c.ic_initiate_xfer = NULL;
+ sc->sc_i2c.ic_read_byte = NULL;
+ sc->sc_i2c.ic_write_byte = NULL;
+ sc->sc_i2c.ic_exec = nfsmb_exec;
+
+ lockinit(&sc->sc_lock, PZERO, "nfsmb", 0, 0);
+
+ if (bus_space_map(sc->sc_iot, nfsmbcap->nfsmb_addr, NFORCE_SMBSIZE, 0,
+ &sc->sc_ioh)) {
+ aprint_error("%s: failed to map SMBus space\n",
+ sc->sc_dev.dv_xname);
+ return;
+ }
+
+ iba.iba_tag = &sc->sc_i2c;
+ (void) config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print);
+}
+
+static int
+nfsmb_acquire_bus(void *cookie, int flags)
+{
+ struct nfsmb_softc *sc = cookie;
+ int err;
+
+ err = lockmgr(&sc->sc_lock, LK_EXCLUSIVE, NULL);
+
+ return err;
+}
+
+static void
+nfsmb_release_bus(void *cookie, int flags)
+{
+ struct nfsmb_softc *sc = cookie;
+
+ lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
+
+ return;
+}
+
+static int
+nfsmb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
+ size_t cmdlen, void *vbuf, size_t buflen, int flags)
+{
+ struct nfsmb_softc *sc = (struct nfsmb_softc *)cookie;
+ uint8_t *p = vbuf;
+ int rv;
+
+ if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
+ rv = nfsmb_receive_1(sc, addr, op, flags);
+ if (rv == -1)
+ return -1;
+ *p = (uint8_t)rv;
+ return 0;
+ }
+
+ if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
+ rv = nfsmb_read_1(sc, *(const uint8_t*)cmd, addr, op, flags);
+ if (rv == -1)
+ return -1;
+ *p = (uint8_t)rv;
+ return 0;
+ }
+ if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
+ rv = nfsmb_read_2(sc, *(const uint8_t*)cmd, addr, op, flags);
+ if (rv == -1)
+ return -1;
+ *p = (uint8_t)rv;
+ return 0;
+ }
+
+
+ if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
+ return nfsmb_send_1(sc, *(uint8_t*)vbuf, addr, op, flags);
+
+ if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1))
+ return nfsmb_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf,
+ addr, op, flags);
+
+ if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2))
+ return nfsmb_write_2(sc,
+ *(const uint8_t*)cmd, *((uint16_t *)vbuf), addr, op, flags);
+
+ return (-1);
+}
+
+static int
+nfsmb_check_done(struct nfsmb_softc *sc)
+{
+ uint8_t stat;
+
+ stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
+
+ if (~stat & NFORCE_SMB_STATUS_DONE) {
+ delay(500);
+ stat =
+ bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
+ }
+ if (~stat & NFORCE_SMB_STATUS_DONE) {
+ tsleep(sc, PCATCH, "nfsmb", hz / 100);
+ stat =
+ bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
+ }
+
+ if ((stat & NFORCE_SMB_STATUS_DONE) &&
+ !(stat & NFORCE_SMB_STATUS_STATUS))
+ return 0;
+ return -1;
+}
+
+/* ARGSUSED */
+static int
+nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,
+ int flags)
+{
+ uint8_t data;
+
+ /* store cmd */
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);
+
+ /* write smbus slave address to register */
+ data = addr << 1;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
+
+ /* write smbus protocol to register */
+ data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
+
+ return nfsmb_check_done(sc);
+}
+
+/* ARGSUSED */
+static int
+nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,
+ i2c_op_t op, int flags)
+{
+ uint8_t data;
+
+ /* store cmd */
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
+
+ /* store data */
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);
+
+ /* write smbus slave address to register */
+ data = addr << 1;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
+
+ /* write smbus protocol to register */
+ data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
+
+ return nfsmb_check_done(sc);
+}
+
+static int
+nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,
+ i2c_addr_t addr, i2c_op_t op, int flags)
+{
+ uint8_t data, low, high;
+
+ /* store cmd */
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
+
+ /* store data */
+ low = val;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, low);
+ high = val >> 8;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, high);
+
+ /* write smbus slave address to register */
+ data = addr << 1;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
+
+ /* write smbus protocol to register */
+ data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
+ if (flags & I2C_F_PEC)
+ data |= NFORCE_SMB_PROTOCOL_PEC;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
+
+ return nfsmb_check_done(sc);
+}
+
+/* ARGSUSED */
+static int
+nfsmb_receive_1(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
+{
+ uint8_t data;
+
+ /* write smbus slave address to register */
+ data = addr << 1;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
+
+ /* write smbus protocol to register */
+ data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
+
+ /* check for errors */
+ if (nfsmb_check_done(sc) < 0)
+ return -1;
+
+ /* read data */
+ return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
+}
+
+/* ARGSUSED */
+static int
+nfsmb_read_1(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
+ int flags)
+{
+ uint8_t data;
+
+ /* store cmd */
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
+
+ /* write smbus slave address to register */
+ data = addr << 1;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
+
+ /* write smbus protocol to register */
+ data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
+
+ /* check for errors */
+ if (nfsmb_check_done(sc) < 0)
+ return (-1);
+
+ /* read data */
+ return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
+}
+
+static int
+nfsmb_read_2(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
+ int flags)
+{
+ uint8_t data, low, high;
+
+ /* store cmd */
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
+
+ /* write smbus slave address to register */
+ data = addr << 1;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
+
+ /* write smbus protocol to register */
+ data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
+ if (flags & I2C_F_PEC)
+ data |= NFORCE_SMB_PROTOCOL_PEC;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
+
+ /* check for errors */
+ if (nfsmb_check_done(sc) < 0)
+ return (-1);
+
+ /* read data */
+ low = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
+ high = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
+ return low | high << 8;
+}
diff --git a/sys/dev/pci/nfsmbreg.h b/sys/dev/pci/nfsmbreg.h
new file mode 100644
index 00000000000..f5e6c2a2c02
--- /dev/null
+++ b/sys/dev/pci/nfsmbreg.h
@@ -0,0 +1,62 @@
+/* $NetBSD: nfsmbreg.h,v 1.1 2007/07/11 07:53:29 kiyohara Exp $ */
+/*
+ * Copyright (c) 2007 KIYOHARA Takashi
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef _NFSMB_H_
+#define _NFSMB_H_
+
+#define NFORCE_SMB1 0x50
+#define NFORCE_SMB2 0x54
+#define NFORCE_SMBBASE(x) ((x) & 0xfffc)
+#define NFORCE_SMBSIZE 8
+
+#define NFORCE_SMB_PROTOCOL 0x00
+#define NFORCE_SMB_STATUS 0x01
+#define NFORCE_SMB_ADDRESS 0x02
+#define NFORCE_SMB_COMMAND 0x03
+#define NFORCE_SMB_DATA 0x04 /* 32 data registers */
+#define NFORCE_SMB_BCNT 0x24 /* number of data bytes */
+#define NFORCE_SMB_ALRM_A 0x25 /* alarm address */
+#define NFORCE_SMB_ALRM_D 0x26 /* 2 bytes alarm data */
+
+#define NFORCE_SMB_PROTOCOL_WRITE 0x00
+#define NFORCE_SMB_PROTOCOL_READ 0x01
+#define NFORCE_SMB_PROTOCOL_QUICK 0x02
+#define NFORCE_SMB_PROTOCOL_BYTE 0x04
+#define NFORCE_SMB_PROTOCOL_BYTE_DATA 0x06
+#define NFORCE_SMB_PROTOCOL_WORD_DATA 0x08
+#define NFORCE_SMB_PROTOCOL_BLOCK_DATA 0x0a
+#define NFORCE_SMB_PROTOCOL_PROC_CALL 0x0c
+#define NFORCE_SMB_PROTOCOL_BLOCK_PROC_CALL 0x0d
+#define NFORCE_SMB_PROTOCOL_I2C_BLOCK_DATA 0x4a
+#define NFORCE_SMB_PROTOCOL_PEC 0x80
+
+#define NFORCE_SMB_STATUS_DONE 0x80
+#define NFORCE_SMB_STATUS_ALRM 0x40
+#define NFORCE_SMB_STATUS_RES 0x20
+#define NFORCE_SMB_STATUS_STATUS 0x1f
+
+#endif /* _NFSMB_H_ */