diff options
| author | sommerfe <sommerfe@NetBSD.org> | 1998-06-07 18:28:31 +0000 |
|---|---|---|
| committer | sommerfe <sommerfe@NetBSD.org> | 1998-06-07 18:28:31 +0000 |
| commit | 2b00a47b9e72e1caa8b1512eb5443ea9735abd19 (patch) | |
| tree | fc77b23b327dafa01382093f5eb05dba4601ff08 /sys/dev | |
| parent | 77a05c5b0061959624fa3f0bc7a9a60c223af312 (diff) | |
Add ISAPnP attachment for PCMCIA bus controller; reorganize ISA
attachment to let it share code with PnP attachment.
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/isa/i82365_isa.c | 194 | ||||
| -rw-r--r-- | sys/dev/isa/i82365_isasubr.c | 267 | ||||
| -rw-r--r-- | sys/dev/isa/i82365_isavar.h | 49 | ||||
| -rw-r--r-- | sys/dev/isapnp/i82365_isapnp.c | 212 |
4 files changed, 531 insertions, 191 deletions
diff --git a/sys/dev/isa/i82365_isa.c b/sys/dev/isa/i82365_isa.c index 991ce91b45a..a3d7f21909a 100644 --- a/sys/dev/isa/i82365_isa.c +++ b/sys/dev/isa/i82365_isa.c @@ -1,4 +1,4 @@ -/* $NetBSD: i82365_isa.c,v 1.9 1998/05/23 18:32:30 matt Exp $ */ +/* $NetBSD: i82365_isa.c,v 1.10 1998/06/07 18:28:31 sommerfe Exp $ */ #define PCICISADEBUG @@ -52,52 +52,7 @@ #include <dev/ic/i82365reg.h> #include <dev/ic/i82365var.h> - -/***************************************************************************** - * Configurable parameters. - *****************************************************************************/ - -#include "opt_pcic_isa_alloc_iobase.h" -#include "opt_pcic_isa_alloc_iosize.h" -#include "opt_pcic_isa_intr_alloc_mask.h" - -/* - * Default I/O allocation range. If both are set to non-zero, these - * values will be used instead. Otherwise, the code attempts to probe - * the bus width. Systems with 10 address bits should use 0x300 and 0xff. - * Systems with 12 address bits (most) should use 0x400 and 0xbff. - */ - -#ifndef PCIC_ISA_ALLOC_IOBASE -#define PCIC_ISA_ALLOC_IOBASE 0 -#endif - -#ifndef PCIC_ISA_ALLOC_IOSIZE -#define PCIC_ISA_ALLOC_IOSIZE 0 -#endif - -int pcic_isa_alloc_iobase = PCIC_ISA_ALLOC_IOBASE; -int pcic_isa_alloc_iosize = PCIC_ISA_ALLOC_IOSIZE; - -/* - * Default IRQ allocation bitmask. This defines the range of allowable - * IRQs for PCMCIA slots. Useful if order of probing would screw up other - * devices, or if PCIC hardware/cards have trouble with certain interrupt - * lines. - * - * We disable IRQ 10 by default, since some common laptops (namely, the - * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface. - */ - -#ifndef PCIC_ISA_INTR_ALLOC_MASK -#define PCIC_ISA_INTR_ALLOC_MASK 0xfbff -#endif - -int pcic_isa_intr_alloc_mask = PCIC_ISA_INTR_ALLOC_MASK; - -/***************************************************************************** - * End of configurable parameters. - *****************************************************************************/ +#include <dev/isa/i82365_isavar.h> #ifdef PCICISADEBUG int pcicisa_debug = 0 /* XXX */ ; @@ -229,8 +184,6 @@ pcic_isa_attach(parent, self, aux) bus_space_tag_t memt = ia->ia_memt; bus_space_handle_t ioh; bus_space_handle_t memh; - bus_space_handle_t ioh_high; - int i, iobuswidth, tmp1, tmp2; /* Map i/o space. */ if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh)) { @@ -275,91 +228,8 @@ pcic_isa_attach(parent, self, aux) pcic_attach(sc); - /* - * figure out how wide the isa bus is. Do this by checking if the - * pcic controller is mirrored 0x400 above where we expect it to be. - */ - - iobuswidth = 12; - - /* Map i/o space. */ - if (bus_space_map(iot, ia->ia_iobase + 0x400, ia->ia_iosize, 0, - &ioh_high)) { - printf("%s: can't map high i/o space\n", sc->dev.dv_xname); - return; - } - - for (i = 0; i < PCIC_NSLOTS; i++) { - if (sc->handle[i].flags & PCIC_FLAG_SOCKETP) { - /* - * read the ident flags from the normal space and - * from the mirror, and compare them - */ - - bus_space_write_1(iot, ioh, PCIC_REG_INDEX, - sc->handle[i].sock + PCIC_IDENT); - tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA); + pcic_isa_bus_width_probe (sc, iot, ioh, ia->ia_iobase, ia->ia_iosize); - bus_space_write_1(iot, ioh_high, PCIC_REG_INDEX, - sc->handle[i].sock + PCIC_IDENT); - tmp2 = bus_space_read_1(iot, ioh_high, PCIC_REG_DATA); - - if (tmp1 == tmp2) - iobuswidth = 10; - } - } - - bus_space_free(iot, ioh_high, ia->ia_iosize); - - /* - * XXX mycroft recommends I/O space range 0x400-0xfff . I should put - * this in a header somewhere - */ - - /* - * XXX some hardware doesn't seem to grok addresses in 0x400 range-- - * apparently missing a bit or more of address lines. (e.g. - * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI - * TravelMate 5000--not clear which is at fault) - * - * Add a kludge to detect 10 bit wide buses and deal with them, - * and also a config file option to override the probe. - */ - - if (iobuswidth == 10) { - sc->iobase = 0x300; - sc->iosize = 0x0ff; - } else { -#if 0 - /* - * This is what we'd like to use, but... - */ - sc->iobase = 0x400; - sc->iosize = 0xbff; -#else - /* - * ...the above bus width probe doesn't always work. - * So, experimentation has shown the following range - * to not lose on systems that 0x300-0x3ff loses on - * (e.g. the NEC Versa 6030X). - */ - sc->iobase = 0x330; - sc->iosize = 0x0cf; -#endif - } - - DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx (probed)\n", - sc->dev.dv_xname, (long) sc->iobase, - (long) sc->iobase + sc->iosize)); - - if (pcic_isa_alloc_iobase && pcic_isa_alloc_iosize) { - sc->iobase = pcic_isa_alloc_iobase; - sc->iosize = pcic_isa_alloc_iosize; - - DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx " - "(config override)\n", sc->dev.dv_xname, (long) sc->iobase, - (long) sc->iobase + sc->iosize)); - } sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY, pcic_intr, sc); if (sc->ih == NULL) { @@ -369,61 +239,3 @@ pcic_isa_attach(parent, self, aux) pcic_attach_sockets(sc); } - -void * -pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg) - pcmcia_chipset_handle_t pch; - struct pcmcia_function *pf; - int ipl; - int (*fct) __P((void *)); - void *arg; -{ - struct pcic_handle *h = (struct pcic_handle *) pch; - isa_chipset_tag_t ic = h->sc->intr_est; - int irq, ist; - void *ih; - int reg; - - if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL) - ist = IST_LEVEL; - else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE) - ist = IST_PULSE; - else - ist = IST_LEVEL; - - if (isa_intr_alloc(ic, - PCIC_INTR_IRQ_VALIDMASK & pcic_isa_intr_alloc_mask, ist, &irq)) - return (NULL); - if ((ih = isa_intr_establish(ic, irq, ist, ipl, - fct, arg)) == NULL) - return (NULL); - - reg = pcic_read(h, PCIC_INTR); - reg &= ~PCIC_INTR_IRQ_MASK; - reg |= irq; - pcic_write(h, PCIC_INTR, reg); - - h->ih_irq = irq; - - printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq); - - return (ih); -} - -void -pcic_isa_chip_intr_disestablish(pch, ih) - pcmcia_chipset_handle_t pch; - void *ih; -{ - struct pcic_handle *h = (struct pcic_handle *) pch; - isa_chipset_tag_t ic = h->sc->intr_est; - int reg; - - h->ih_irq = 0; - - reg = pcic_read(h, PCIC_INTR); - reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE); - pcic_write(h, PCIC_INTR, reg); - - isa_intr_disestablish(ic, ih); -} diff --git a/sys/dev/isa/i82365_isasubr.c b/sys/dev/isa/i82365_isasubr.c new file mode 100644 index 00000000000..b14e64aea90 --- /dev/null +++ b/sys/dev/isa/i82365_isasubr.c @@ -0,0 +1,267 @@ +/* $NetBSD: i82365_isasubr.c,v 1.1 1998/06/07 18:28:31 sommerfe Exp $ */ + +#define PCICISADEBUG + +/* + * Copyright (c) 1998 Bill Sommerfeld. All rights reserved. + * Copyright (c) 1997 Marc Horowitz. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Marc Horowitz. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include <sys/types.h> +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/device.h> +#include <sys/extent.h> +#include <sys/malloc.h> + +#include <vm/vm.h> + +#include <machine/bus.h> +#include <machine/intr.h> + +#include <dev/isa/isareg.h> +#include <dev/isa/isavar.h> + +#include <dev/pcmcia/pcmciareg.h> +#include <dev/pcmcia/pcmciavar.h> +#include <dev/pcmcia/pcmciachip.h> + +#include <dev/ic/i82365reg.h> +#include <dev/ic/i82365var.h> +#include <dev/isa/i82365_isavar.h> + +/***************************************************************************** + * Configurable parameters. + *****************************************************************************/ + +#include "opt_pcic_isa_alloc_iobase.h" +#include "opt_pcic_isa_alloc_iosize.h" +#include "opt_pcic_isa_intr_alloc_mask.h" + +/* + * Default I/O allocation range. If both are set to non-zero, these + * values will be used instead. Otherwise, the code attempts to probe + * the bus width. Systems with 10 address bits should use 0x300 and 0xff. + * Systems with 12 address bits (most) should use 0x400 and 0xbff. + */ + +#ifndef PCIC_ISA_ALLOC_IOBASE +#define PCIC_ISA_ALLOC_IOBASE 0 +#endif + +#ifndef PCIC_ISA_ALLOC_IOSIZE +#define PCIC_ISA_ALLOC_IOSIZE 0 +#endif + +int pcic_isa_alloc_iobase = PCIC_ISA_ALLOC_IOBASE; +int pcic_isa_alloc_iosize = PCIC_ISA_ALLOC_IOSIZE; + + +/* + * Default IRQ allocation bitmask. This defines the range of allowable + * IRQs for PCMCIA slots. Useful if order of probing would screw up other + * devices, or if PCIC hardware/cards have trouble with certain interrupt + * lines. + * + * We disable IRQ 10 by default, since some common laptops (namely, the + * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface. + */ + +#ifndef PCIC_ISA_INTR_ALLOC_MASK +#define PCIC_ISA_INTR_ALLOC_MASK 0xfbff +#endif + +int pcic_isa_intr_alloc_mask = PCIC_ISA_INTR_ALLOC_MASK; + +/***************************************************************************** + * End of configurable parameters. + *****************************************************************************/ + +#ifdef PCICISADEBUG +int pcicsubr_debug = 0 /* XXX */ ; +#define DPRINTF(arg) if (pcicsubr_debug) printf arg; +#else +#define DPRINTF(arg) +#endif + +void pcic_isa_bus_width_probe (sc, iot, ioh, base, length) + struct pcic_softc *sc; + bus_space_tag_t iot; + bus_space_handle_t ioh; + bus_addr_t base; + u_int32_t length; +{ + bus_space_handle_t ioh_high; + int i, iobuswidth, tmp1, tmp2; + + /* + * figure out how wide the isa bus is. Do this by checking if the + * pcic controller is mirrored 0x400 above where we expect it to be. + */ + + iobuswidth = 12; + + /* Map i/o space. */ + if (bus_space_map(iot, base + 0x400, length, 0, &ioh_high)) { + printf("%s: can't map high i/o space\n", sc->dev.dv_xname); + return; + } + + for (i = 0; i < PCIC_NSLOTS; i++) { + if (sc->handle[i].flags & PCIC_FLAG_SOCKETP) { + /* + * read the ident flags from the normal space and + * from the mirror, and compare them + */ + + bus_space_write_1(iot, ioh, PCIC_REG_INDEX, + sc->handle[i].sock + PCIC_IDENT); + tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA); + + bus_space_write_1(iot, ioh_high, PCIC_REG_INDEX, + sc->handle[i].sock + PCIC_IDENT); + tmp2 = bus_space_read_1(iot, ioh_high, PCIC_REG_DATA); + + if (tmp1 == tmp2) + iobuswidth = 10; + } + } + + bus_space_free(iot, ioh_high, length); + + /* + * XXX mycroft recommends I/O space range 0x400-0xfff . I should put + * this in a header somewhere + */ + + /* + * XXX some hardware doesn't seem to grok addresses in 0x400 range-- + * apparently missing a bit or more of address lines. (e.g. + * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI + * TravelMate 5000--not clear which is at fault) + * + * Add a kludge to detect 10 bit wide buses and deal with them, + * and also a config file option to override the probe. + */ + + if (iobuswidth == 10) { + sc->iobase = 0x300; + sc->iosize = 0x0ff; + } else { +#if 0 + /* + * This is what we'd like to use, but... + */ + sc->iobase = 0x400; + sc->iosize = 0xbff; +#else + /* + * ...the above bus width probe doesn't always work. + * So, experimentation has shown the following range + * to not lose on systems that 0x300-0x3ff loses on + * (e.g. the NEC Versa 6030X). + */ + sc->iobase = 0x330; + sc->iosize = 0x0cf; +#endif + } + + DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx (probed)\n", + sc->dev.dv_xname, (long) sc->iobase, + + (long) sc->iobase + sc->iosize)); + + if (pcic_isa_alloc_iobase && pcic_isa_alloc_iosize) { + sc->iobase = pcic_isa_alloc_iobase; + sc->iosize = pcic_isa_alloc_iosize; + + DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx " + "(config override)\n", sc->dev.dv_xname, (long) sc->iobase, + (long) sc->iobase + sc->iosize)); + } +} + + +void * +pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg) + pcmcia_chipset_handle_t pch; + struct pcmcia_function *pf; + int ipl; + int (*fct) __P((void *)); + void *arg; +{ + struct pcic_handle *h = (struct pcic_handle *) pch; + isa_chipset_tag_t ic = h->sc->intr_est; + int irq, ist; + void *ih; + int reg; + + if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL) + ist = IST_LEVEL; + else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE) + ist = IST_PULSE; + else + ist = IST_LEVEL; + + if (isa_intr_alloc(ic, + PCIC_INTR_IRQ_VALIDMASK & pcic_isa_intr_alloc_mask, ist, &irq)) + return (NULL); + if ((ih = isa_intr_establish(ic, irq, ist, ipl, + fct, arg)) == NULL) + return (NULL); + + reg = pcic_read(h, PCIC_INTR); + reg &= ~PCIC_INTR_IRQ_MASK; + reg |= irq; + pcic_write(h, PCIC_INTR, reg); + + h->ih_irq = irq; + + printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq); + + return (ih); +} + +void +pcic_isa_chip_intr_disestablish(pch, ih) + pcmcia_chipset_handle_t pch; + void *ih; +{ + struct pcic_handle *h = (struct pcic_handle *) pch; + isa_chipset_tag_t ic = h->sc->intr_est; + int reg; + + h->ih_irq = 0; + + reg = pcic_read(h, PCIC_INTR); + reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE); + pcic_write(h, PCIC_INTR, reg); + + isa_intr_disestablish(ic, ih); +} diff --git a/sys/dev/isa/i82365_isavar.h b/sys/dev/isa/i82365_isavar.h new file mode 100644 index 00000000000..af512941d34 --- /dev/null +++ b/sys/dev/isa/i82365_isavar.h @@ -0,0 +1,49 @@ +/* $NetBSD: i82365_isavar.h,v 1.1 1998/06/07 18:28:31 sommerfe Exp $ */ + +/* + * Copyright (c) 1998 Bill Sommerfeld. All rights reserved. + * Copyright (c) 1997 Marc Horowitz. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Marc Horowitz. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +extern int pcic_isa_intr_alloc_mask; + +/* + * Establish/disestablish interrupts for PCMCIA functions. + */ + +void *pcic_isa_chip_intr_establish __P((pcmcia_chipset_handle_t, + struct pcmcia_function *, int, int (*) (void *), void *)); +void pcic_isa_chip_intr_disestablish __P((pcmcia_chipset_handle_t, void *)); + +/* + * Figure out how wide the ISA bus is... + */ + +void pcic_isa_bus_width_probe __P((struct pcic_softc *, bus_space_tag_t, + bus_space_handle_t, bus_addr_t, u_int32_t)); + diff --git a/sys/dev/isapnp/i82365_isapnp.c b/sys/dev/isapnp/i82365_isapnp.c new file mode 100644 index 00000000000..0d7ae6e2800 --- /dev/null +++ b/sys/dev/isapnp/i82365_isapnp.c @@ -0,0 +1,212 @@ +/* $NetBSD: i82365_isapnp.c,v 1.1 1998/06/07 18:28:31 sommerfe Exp $ */ + +/* + * Copyright (c) 1998 Bill Sommerfeld. All rights reserved. + * Copyright (c) 1997 Marc Horowitz. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Marc Horowitz. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include <sys/types.h> +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/device.h> +#include <sys/extent.h> +#include <sys/malloc.h> + +#include <vm/vm.h> + +#include <machine/bus.h> +#include <machine/intr.h> + +#include <dev/isa/isareg.h> +#include <dev/isa/isavar.h> + +#include <dev/isapnp/isapnpreg.h> +#include <dev/isapnp/isapnpvar.h> + +#include <dev/pcmcia/pcmciareg.h> +#include <dev/pcmcia/pcmciavar.h> +#include <dev/pcmcia/pcmciachip.h> + +#include <dev/ic/i82365reg.h> +#include <dev/ic/i82365var.h> +#include <dev/isa/i82365_isavar.h> + +#undef DPRINTF +#ifdef PCICISADEBUG +int pcicisapnp_debug = 0 /* XXX */ ; +#define DPRINTF(arg) if (pcicisapnp_debug) printf arg; +#else +#define DPRINTF(arg) +#endif + +#ifdef __BROKEN_INDIRECT_CONFIG +int pcic_isapnp_match __P((struct device *, void *, void *)); +#else +int pcic_isapnp_match __P((struct device *, struct cfdata *, void *)); +#endif +void pcic_isapnp_attach __P((struct device *, struct device *, void *)); + +struct cfattach pcic_isapnp_ca = { + sizeof(struct pcic_softc), pcic_isapnp_match, pcic_isapnp_attach +}; + +static struct pcmcia_chip_functions pcic_isa_functions = { + pcic_chip_mem_alloc, + pcic_chip_mem_free, + pcic_chip_mem_map, + pcic_chip_mem_unmap, + + pcic_chip_io_alloc, + pcic_chip_io_free, + pcic_chip_io_map, + pcic_chip_io_unmap, + + pcic_isa_chip_intr_establish, + pcic_isa_chip_intr_disestablish, + + pcic_chip_socket_enable, + pcic_chip_socket_disable, +}; + +int +pcic_isapnp_match(parent, match, aux) + struct device *parent; +#ifdef __BROKEN_INDIRECT_CONFIG + void *match; +#else + struct cfdata *match; +#endif + void *aux; +{ + struct isapnp_attach_args *ipa = aux; + + if (strcmp(ipa->ipa_devlogic, "PNP0E00")) + return 0; + return 1; +} + +void +pcic_isapnp_attach(parent, self, aux) + struct device *parent, *self; + void *aux; +{ + struct pcic_softc *sc = (void *) self; + struct isapnp_attach_args *ipa = aux; + isa_chipset_tag_t ic = ipa->ipa_ic; + bus_space_tag_t iot = ipa->ipa_iot; + bus_space_tag_t memt = ipa->ipa_memt; + bus_space_handle_t ioh; + bus_space_handle_t memh; + bus_addr_t maddr; + int msize; + int tmp1; + + printf("\n"); + + if (isapnp_config(iot, memt, ipa)) { + printf("%s: error in region allocation\n", sc->dev.dv_xname); + return; + } + + printf("%s: %s %s", sc->dev.dv_xname, ipa->ipa_devident, + ipa->ipa_devclass); + + /* sanity check that we get at least one hunk of IO space.. */ + if (ipa->ipa_nio < 1) { + printf("%s: failed to get one chunk of i/o space\n", + sc->dev.dv_xname); + return; + } + + /* Find i/o space. */ + ioh = ipa->ipa_io[0].h; + + /* sanity check to make sure we have a real PCIC there.. */ + bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C0SA + PCIC_IDENT); + tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA); + printf("(ident 0x%x", tmp1); + if (pcic_ident_ok(tmp1)) { + printf(" OK)"); + } else { + printf(" Not OK)\n"); + return; + } + + msize = 0x4000; + if (isa_mem_alloc (memt, msize, msize, 0, 0, + &maddr, &memh)) { + printf(": can't alloc mem space\n"); + return; + } + printf(": using iobase 0x%lx iosize 0x%x", maddr, msize); + sc->membase = maddr; + sc->subregionmask = (1 << (msize / PCIC_MEM_PAGESIZE)) - 1; + + sc->intr_est = ic; + sc->pct = (pcmcia_chipset_tag_t) & pcic_isa_functions; + + sc->iot = iot; + sc->ioh = ioh; + sc->memt = memt; + sc->memh = memh; + + /* + * allocate an irq. it will be used by both controllers. I could + * use two different interrupts, but interrupts are relatively + * scarce, shareable, and for PCIC controllers, very infrequent. + */ + + if (ipa->ipa_nirq > 0) { + sc->irq = ipa->ipa_irq[0].num; + } else { + if (isa_intr_alloc(ic, + PCIC_CSC_INTR_IRQ_VALIDMASK & pcic_isa_intr_alloc_mask, + IST_EDGE, &sc->irq)) { + printf("\n%s: can't allocate interrupt\n", + sc->dev.dv_xname); + return; + } + printf(" irq %d", sc->irq); + } + printf("\n"); + + pcic_attach(sc); + + pcic_isa_bus_width_probe(sc, iot, ioh, ipa->ipa_io[0].base, ipa->ipa_io[0].length); + + sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY, + pcic_intr, sc); + if (sc->ih == NULL) { + printf("%s: can't establish interrupt\n", sc->dev.dv_xname); + return; + } + + pcic_attach_sockets(sc); + +} |
