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authormsaitoh <msaitoh@NetBSD.org>2019-11-18 15:09:58 +0000
committermsaitoh <msaitoh@NetBSD.org>2019-11-18 15:09:58 +0000
commit4ee38d05b1395f80ced50ff0c7c8536ba1a98e25 (patch)
treee8e0943000f47230785827528e5afe948a86ae55 /sys/dev
parent832bb5d4744b51d7b5e6148a19b241fbaf80dc2f (diff)
Remove extra 10ms delay in ihphy_reset(). The delay are in if_wm.c side.
It's required for hardware full reset and it't not requred on soft reset. When ihphy.c was added in 9 years ago, some workaround code were not in if_wm.c yet and the initialization code was not good.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/mii/ihphy.c12
1 files changed, 2 insertions, 10 deletions
diff --git a/sys/dev/mii/ihphy.c b/sys/dev/mii/ihphy.c
index 357f7482139..1e02c44cad0 100644
--- a/sys/dev/mii/ihphy.c
+++ b/sys/dev/mii/ihphy.c
@@ -1,4 +1,4 @@
-/* $NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $ */
+/* $NetBSD: ihphy.c,v 1.15 2019/11/18 15:09:58 msaitoh Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
@@ -60,7 +60,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.15 2019/11/18 15:09:58 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -291,14 +291,6 @@ ihphy_reset(struct mii_softc *sc)
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
- /*
- * Regarding reset, the data sheet specifies (page 55):
- *
- * "After PHY reset, a delay of 10 ms is required before
- * any register access using MDIO."
- */
- delay(10000);
-
/* Wait another 100ms for it to complete. */
for (i = 0; i < 100; i++) {
PHY_READ(sc, MII_BMCR, &reg);