diff options
| author | msaitoh <msaitoh@NetBSD.org> | 2018-04-10 08:18:38 +0000 |
|---|---|---|
| committer | msaitoh <msaitoh@NetBSD.org> | 2018-04-10 08:18:38 +0000 |
| commit | 63c8b607cc852aba5fa6449d2d5ef4d7ff75ee35 (patch) | |
| tree | 55ea19f6fe1f746cf9699ccac70bc9949de52ad5 /sys/dev | |
| parent | d1b4a5bed3e4f35e02ff35e514e0c9ba8695e3bd (diff) | |
SW PHY Config Enable bit for ICH8 B0 stepping is not bit 1 but bit 0.
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/pci/if_wmreg.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/dev/pci/if_wmreg.h b/sys/dev/pci/if_wmreg.h index 4a40855e47f..d9fcb0486bc 100644 --- a/sys/dev/pci/if_wmreg.h +++ b/sys/dev/pci/if_wmreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_wmreg.h,v 1.105 2017/11/22 02:36:52 msaitoh Exp $ */ +/* $NetBSD: if_wmreg.h,v 1.106 2018/04/10 08:18:38 msaitoh Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -590,8 +590,8 @@ struct livengood_tcpip_ctxdesc { #define FCAL_CONST 0x00c28001 /* Flow Control MAC addr low */ #define WMREG_FEXTNVM 0x0028 /* Future Extended NVM register */ -#define FEXTNVM_SW_CONFIG __BIT(1) -#define FEXTNVM_SW_CONFIG_ICH8M __BIT(27) +#define FEXTNVM_SW_CONFIG __BIT(0) /* SW PHY Config En (ICH8 B0) */ +#define FEXTNVM_SW_CONFIG_ICH8M __BIT(27) /* SW PHY Config En (>= ICH8 B1) */ #define WMREG_FCAH 0x002c /* Flow Control Address High */ #define FCAH_CONST 0x00000100 /* Flow Control MAC addr high */ |
