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authorjklos <jklos@NetBSD.org>2008-01-17 15:54:35 +0000
committerjklos <jklos@NetBSD.org>2008-01-17 15:54:35 +0000
commit740cd1ea877b4937409373122347df77092a3173 (patch)
tree9f76e45326248d56d0aac8e07e926cb63572af00 /sys/dev
parentd321737f6a6b6c99d496ab9378ffb59902598132 (diff)
More Chelsio 10 gigabit driver files to complete the ones checked in
yesterday.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/cxgb_adapter.h690
-rw-r--r--sys/dev/pci/cxgb_common.h826
-rw-r--r--sys/dev/pci/cxgb_config.h3
-rw-r--r--sys/dev/pci/cxgb_ctl_defs.h156
-rw-r--r--sys/dev/pci/cxgb_firmware_exports.h152
-rw-r--r--sys/dev/pci/cxgb_include.h55
-rw-r--r--sys/dev/pci/cxgb_ioctl.h261
-rw-r--r--sys/dev/pci/cxgb_jhash.h124
-rw-r--r--sys/dev/pci/cxgb_l2t.h124
-rw-r--r--sys/dev/pci/cxgb_mbuf.h40
-rw-r--r--sys/dev/pci/cxgb_mvec.h151
-rw-r--r--sys/dev/pci/cxgb_offload.h173
-rw-r--r--sys/dev/pci/cxgb_sge_defs.h6
-rw-r--r--sys/dev/pci/cxgb_t3_cpl.h1128
-rw-r--r--sys/dev/pci/cxgb_toedev.h110
15 files changed, 2105 insertions, 1894 deletions
diff --git a/sys/dev/pci/cxgb_adapter.h b/sys/dev/pci/cxgb_adapter.h
index d62d95cdd5d..1b1e4f89b83 100644
--- a/sys/dev/pci/cxgb_adapter.h
+++ b/sys/dev/pci/cxgb_adapter.h
@@ -26,7 +26,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/cxgb_adapter.h,v 1.10 2007/05/28 22:57:26 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/cxgb_adapter.h,v 1.20 2007/09/10 00:59:51 kmacy Exp $
***************************************************************************/
@@ -35,14 +35,10 @@ $FreeBSD: src/sys/dev/cxgb/cxgb_adapter.h,v 1.10 2007/05/28 22:57:26 kmacy Exp $
#ifndef _CXGB_ADAPTER_H_
#define _CXGB_ADAPTER_H_
-#include <sys/cdefs.h>
-#ifdef __FreeBSD__
-__FBSDID("$FreeBSD: src/sys/dev/cxgb/cxgb_adapter.h,v 1.10 2007/05/28 22:57:26 kmacy Exp $");
-#endif
-
#include <sys/lock.h>
#include <sys/mutex.h>
#ifdef __FreeBSD__
+#include <sys/sx.h>
#include <sys/rman.h>
#endif
#include <sys/mbuf.h>
@@ -52,13 +48,13 @@ __FBSDID("$FreeBSD: src/sys/dev/cxgb/cxgb_adapter.h,v 1.10 2007/05/28 22:57:26 k
#ifdef __FreeBSD__
#include <net/ethernet.h>
#endif
+#include <net/if.h>
#ifdef __NetBSD__
#include <net/if_ether.h>
#endif
-#include <net/if.h>
#include <net/if_media.h>
-#include <sys/bus.h>
+#include <machine/bus.h>
#ifdef __FreeBSD__
#include <machine/resource.h>
#include <sys/bus_dma.h>
@@ -67,56 +63,128 @@ __FBSDID("$FreeBSD: src/sys/dev/cxgb/cxgb_adapter.h,v 1.10 2007/05/28 22:57:26 k
#include <dev/pci/pcivar.h>
#ifdef CONFIG_DEFINED
-#include <cxgb_include.h>
-#include <cxgb_common.h>
+#include <cxgb_osdep.h>
+#include <ulp/toecore/toedev.h>
+#include <sys/mbufq.h>
#else
#ifdef __FreeBSD__
-#include <dev/cxgb/cxgb_include.h>
-#include <dev/cxgb/cxgb_common.h>
+#include <dev/cxgb/cxgb_osdep.h>
+#include <dev/cxgb/sys/mbufq.h>
+#include <dev/cxgb/ulp/toecore/toedev.h>
#endif
#ifdef __NetBSD__
-#include <dev/pci/cxgb_include.h>
-#include <dev/pci/cxgb_common.h>
+#include "cxgb_osdep.h"
+#include "cxgb_mbuf.h"
+#include "cxgb_toedev.h"
+#endif
#endif
+
+#ifdef __FreeBSD__
+#define USE_SX
#endif
struct adapter;
struct sge_qset;
extern int cxgb_debug;
+#ifdef DEBUG_LOCKING
+#define MTX_INIT(lock, lockname, class, flags) \
+ do { \
+ printf("initializing %s at %s:%d\n", lockname, __FILE__, __LINE__); \
+ mtx_init((lock), lockname, class, flags); \
+ } while (0)
+
+#define MTX_DESTROY(lock) \
+ do { \
+ printf("destroying %s at %s:%d\n", (lock)->lock_object.lo_name, __FILE__, __LINE__); \
+ mtx_destroy((lock)); \
+ } while (0)
+
+#define SX_INIT(lock, lockname) \
+ do { \
+ printf("initializing %s at %s:%d\n", lockname, __FILE__, __LINE__); \
+ sx_init((lock), lockname); \
+ } while (0)
+
+#define SX_DESTROY(lock) \
+ do { \
+ printf("destroying %s at %s:%d\n", (lock)->lock_object.lo_name, __FILE__, __LINE__); \
+ sx_destroy((lock)); \
+ } while (0)
+#else
+#define MTX_INIT mtx_init
+#define MTX_DESTROY mtx_destroy
+#define SX_INIT sx_init
+#define SX_DESTROY sx_destroy
+#endif
+
+#ifdef __NetBSD__
+struct port_device {
+ struct device original;
+ device_t dev;
+ struct adapter *parent;
+ int port_number;
+};
+#endif
+
struct port_info {
- struct adapter *adapter;
- struct ifnet *ifp;
- int if_flags;
- const struct port_type_info *port_type;
- struct cphy phy;
- struct cmac mac;
- struct link_config link_config;
- struct ifmedia media;
- struct mtx lock;
-
- int port;
- uint8_t hw_addr[ETHER_ADDR_LEN];
- uint8_t nqsets;
- uint8_t first_qset;
- struct taskqueue *tq;
- struct task start_task;
- struct cdev *port_cdev;
+ struct adapter *adapter;
+ struct ifnet *ifp;
+#ifdef __NetBSD__
+ struct port_device *pd;
+ int port;
+#endif
+ int if_flags;
+ const struct port_type_info *port_type;
+ struct cphy phy;
+ struct cmac mac;
+ struct link_config link_config;
+ struct ifmedia media;
+#ifdef USE_SX
+ struct sx lock;
+#else
+ struct mtx lock;
+#endif
+ uint8_t port_id;
+ uint8_t tx_chan;
+ uint8_t txpkt_intf;
+ uint8_t nqsets;
+ uint8_t first_qset;
+
+ uint8_t hw_addr[ETHER_ADDR_LEN];
+#ifdef __FreeBSD__
+ struct taskqueue *tq;
+ struct task start_task;
+ struct task timer_reclaim_task;
+#endif
+#ifdef __NetBSD__
+ struct cxgb_task start_task;
+ struct cxgb_task timer_reclaim_task;
+#endif
+ struct cdev *port_cdev;
+
+#define PORT_NAME_LEN 32
+#define TASKQ_NAME_LEN 32
+ char lockbuf[PORT_NAME_LEN];
+ char taskqbuf[TASKQ_NAME_LEN];
};
-enum { /* adapter flags */
- FULL_INIT_DONE = (1 << 0),
- USING_MSI = (1 << 1),
- USING_MSIX = (1 << 2),
- QUEUES_BOUND = (1 << 3),
- FW_UPTODATE = (1 << 4),
+enum { /* adapter flags */
+ FULL_INIT_DONE = (1 << 0),
+ USING_MSI = (1 << 1),
+ USING_MSIX = (1 << 2),
+ QUEUES_BOUND = (1 << 3),
+ FW_UPTODATE = (1 << 4),
+ TPS_UPTODATE = (1 << 5),
};
-#define FL_Q_SIZE 4096
-#define JUMBO_Q_SIZE 512
-#define RSPQ_Q_SIZE 1024
-#define TX_ETH_Q_SIZE 1024
+#define FL_Q_SIZE 4096
+#define JUMBO_Q_SIZE 512
+#define RSPQ_Q_SIZE 1024
+#define TX_ETH_Q_SIZE 1024
+
+
/*
* Types of Tx queues in each queue set. Order here matters, do not change.
@@ -129,26 +197,27 @@ enum { TXQ_ETH, TXQ_OFLD, TXQ_CTRL };
* IFF_ flags!
*/
enum {
- LRO_ACTIVE = (1 << 8),
+ LRO_ACTIVE = (1 << 8),
};
/* Max concurrent LRO sessions per queue set */
#define MAX_LRO_SES 8
struct t3_lro_session {
- struct mbuf *head;
- struct mbuf *tail;
- uint32_t seq;
- uint16_t ip_len;
- uint16_t vtag;
- uint8_t npkts;
+ struct mbuf *head;
+ struct mbuf *tail;
+ uint32_t seq;
+ uint16_t ip_len;
+ uint16_t mss;
+ uint16_t vtag;
+ uint8_t npkts;
};
struct lro_state {
- unsigned short enabled;
- unsigned short active_idx;
- unsigned int nactive;
- struct t3_lro_session sess[MAX_LRO_SES];
+ unsigned short enabled;
+ unsigned short active_idx;
+ unsigned int nactive;
+ struct t3_lro_session sess[MAX_LRO_SES];
};
#define RX_BUNDLE_SIZE 8
@@ -156,225 +225,302 @@ struct lro_state {
struct rsp_desc;
struct sge_rspq {
- uint32_t credits;
- uint32_t size;
- uint32_t cidx;
- uint32_t gen;
- uint32_t polling;
- uint32_t holdoff_tmr;
- uint32_t next_holdoff;
- uint32_t imm_data;
- struct rsp_desc *desc;
- uint32_t cntxt_id;
- struct mtx lock;
- struct mbuf *rx_head; /* offload packet receive queue head */
- struct mbuf *rx_tail; /* offload packet receive queue tail */
-
- uint32_t offload_pkts;
- uint32_t offload_bundles;
- uint32_t pure_rsps;
- uint32_t unhandled_irqs;
-
- bus_addr_t phys_addr;
- bus_dma_tag_t desc_tag;
- bus_dmamap_t desc_map;
- struct mbuf *m;
+ uint32_t credits;
+ uint32_t size;
+ uint32_t cidx;
+ uint32_t gen;
+ uint32_t polling;
+ uint32_t holdoff_tmr;
+ uint32_t next_holdoff;
+ uint32_t imm_data;
+ struct rsp_desc *desc;
+ uint32_t cntxt_id;
+ struct mtx lock;
+ struct mbuf *rx_head; /* offload packet receive queue head */
+ struct mbuf *rx_tail; /* offload packet receive queue tail */
+
+ uint32_t offload_pkts;
+ uint32_t offload_bundles;
+ uint32_t pure_rsps;
+ uint32_t unhandled_irqs;
+
+ bus_addr_t phys_addr;
+ bus_dma_tag_t desc_tag;
+ bus_dmamap_t desc_map;
+
+ struct t3_mbuf_hdr rspq_mh;
+#define RSPQ_NAME_LEN 32
+ char lockbuf[RSPQ_NAME_LEN];
+
};
+#ifndef DISABLE_MBUF_IOVEC
+#define rspq_mbuf rspq_mh.mh_head
+#endif
+
struct rx_desc;
struct rx_sw_desc;
struct sge_fl {
- uint32_t buf_size;
- uint32_t credits;
- uint32_t size;
- uint32_t cidx;
- uint32_t pidx;
- uint32_t gen;
- struct rx_desc *desc;
- struct rx_sw_desc *sdesc;
- bus_addr_t phys_addr;
- uint32_t cntxt_id;
- uint64_t empty;
- bus_dma_tag_t desc_tag;
- bus_dmamap_t desc_map;
- bus_dma_tag_t entry_tag;
+ uint32_t buf_size;
+ uint32_t credits;
+ uint32_t size;
+ uint32_t cidx;
+ uint32_t pidx;
+ uint32_t gen;
+ struct rx_desc *desc;
+ struct rx_sw_desc *sdesc;
+ bus_addr_t phys_addr;
+ uint32_t cntxt_id;
+ uint64_t empty;
+ bus_dma_tag_t desc_tag;
+ bus_dmamap_t desc_map;
+ bus_dma_tag_t entry_tag;
#ifdef __FreeBSD__
- uma_zone_t zone;
-#endif
-#ifdef __NetBSD__
- int zone;
+ uma_zone_t zone;
#endif
- int type;
+ int type;
};
struct tx_desc;
struct tx_sw_desc;
+#define TXQ_TRANSMITTING 0x1
+
struct sge_txq {
- uint64_t flags;
- uint32_t in_use;
- uint32_t size;
- uint32_t processed;
- uint32_t cleaned;
- uint32_t stop_thres;
- uint32_t cidx;
- uint32_t pidx;
- uint32_t gen;
- uint32_t unacked;
- struct tx_desc *desc;
- struct tx_sw_desc *sdesc;
- uint32_t token;
- bus_addr_t phys_addr;
- struct task qresume_tsk;
- uint32_t cntxt_id;
- uint64_t stops;
- uint64_t restarts;
- bus_dma_tag_t desc_tag;
- bus_dmamap_t desc_map;
- bus_dma_tag_t entry_tag;
- struct mbuf_head sendq;
- struct mtx lock;
+ uint64_t flags;
+ uint32_t in_use;
+ uint32_t size;
+ uint32_t processed;
+ uint32_t cleaned;
+ uint32_t stop_thres;
+ uint32_t cidx;
+ uint32_t pidx;
+ uint32_t gen;
+ uint32_t unacked;
+ struct tx_desc *desc;
+ struct tx_sw_desc *sdesc;
+ uint32_t token;
+ bus_addr_t phys_addr;
+#ifdef __FreeBSD__
+ struct task qresume_task;
+ struct task qreclaim_task;
+#endif
+#ifdef __NetBSD__
+ struct cxgb_task qresume_task;
+ struct cxgb_task qreclaim_task;
+#endif
+ struct port_info *port;
+ uint32_t cntxt_id;
+ uint64_t stops;
+ uint64_t restarts;
+ bus_dma_tag_t desc_tag;
+ bus_dmamap_t desc_map;
+ bus_dma_tag_t entry_tag;
+ struct mbuf_head sendq;
+ struct mtx lock;
+#define TXQ_NAME_LEN 32
+ char lockbuf[TXQ_NAME_LEN];
};
-
+
enum {
- SGE_PSTAT_TSO, /* # of TSO requests */
- SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
- SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
- SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
- SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
- SGE_PSTATS_LRO_QUEUED, /* # of LRO appended packets */
- SGE_PSTATS_LRO_FLUSHED, /* # of LRO flushed packets */
- SGE_PSTATS_LRO_X_STREAMS, /* # of exceeded LRO contexts */
+ SGE_PSTAT_TSO, /* # of TSO requests */
+ SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
+ SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
+ SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
+ SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
+ SGE_PSTATS_LRO_QUEUED, /* # of LRO appended packets */
+ SGE_PSTATS_LRO_FLUSHED, /* # of LRO flushed packets */
+ SGE_PSTATS_LRO_X_STREAMS, /* # of exceeded LRO contexts */
};
#define SGE_PSTAT_MAX (SGE_PSTATS_LRO_X_STREAMS+1)
struct sge_qset {
- struct sge_rspq rspq;
- struct sge_fl fl[SGE_RXQ_PER_SET];
- struct lro_state lro;
- struct sge_txq txq[SGE_TXQ_PER_SET];
- uint32_t txq_stopped; /* which Tx queues are stopped */
- uint64_t port_stats[SGE_PSTAT_MAX];
- struct port_info *port;
- int idx; /* qset # */
+ struct sge_rspq rspq;
+ struct sge_fl fl[SGE_RXQ_PER_SET];
+ struct lro_state lro;
+ struct sge_txq txq[SGE_TXQ_PER_SET];
+ uint32_t txq_stopped; /* which Tx queues are stopped */
+ uint64_t port_stats[SGE_PSTAT_MAX];
+ struct port_info *port;
+ int idx; /* qset # */
};
struct sge {
- struct sge_qset qs[SGE_QSETS];
- struct mtx reg_lock;
+ struct sge_qset qs[SGE_QSETS];
+ struct mtx reg_lock;
};
+struct filter_info;
+
struct adapter {
- device_t dev;
#ifdef __NetBSD__
- pci_chipset_tag_t chip;
- pcitag_t tag;
-#endif
- int flags;
- TAILQ_ENTRY(adapter) adapter_entry;
-
- /* PCI register resources */
- uint32_t regs_rid;
- struct resource *regs_res;
- bus_space_handle_t bh;
- bus_space_tag_t bt;
- bus_size_t mmio_len;
- uint32_t link_width;
-
- /* DMA resources */
- bus_dma_tag_t parent_dmat;
- bus_dma_tag_t rx_dmat;
- bus_dma_tag_t rx_jumbo_dmat;
- bus_dma_tag_t tx_dmat;
-
- /* Interrupt resources */
- struct resource *irq_res;
- int irq_rid;
- void *intr_tag;
-
- uint32_t msix_regs_rid;
- struct resource *msix_regs_res;
-
- struct resource *msix_irq_res[SGE_QSETS];
- int msix_irq_rid[SGE_QSETS];
- void *msix_intr_tag[SGE_QSETS];
-
- /* Tasks */
- struct task ext_intr_task;
- struct task timer_reclaim_task;
- struct task slow_intr_task;
- struct task process_responses_task;
- struct task mr_refresh_task;
- struct taskqueue *tq;
- struct callout cxgb_tick_ch;
- struct callout sge_timer_ch;
-
- /* Register lock for use by the hardware layer */
- struct mtx mdio_lock;
-
- /* Bookkeeping for the hardware layer */
- struct adapter_params params;
- unsigned int slow_intr_mask;
- unsigned long irq_stats[IRQ_NUM_STATS];
-
- struct sge sge;
- struct mc7 pmrx;
- struct mc7 pmtx;
- struct mc7 cm;
- struct mc5 mc5;
-
- struct port_info port[MAX_NPORTS];
- device_t portdev[MAX_NPORTS];
- struct toedev tdev;
- char fw_version[64];
- uint32_t open_device_map;
- uint32_t registered_device_map;
- struct mtx lock;
- void (*cxgb_intr)(void *);
- int msi_count;
+ struct device original;
+#endif
+ device_t dev; // so we have a compatible pointer
+ int flags;
+ TAILQ_ENTRY(adapter) adapter_entry;
+
+ /* PCI register resources */
+ int regs_rid;
+ struct resource *regs_res;
+ bus_space_handle_t bh;
+ bus_space_tag_t bt;
+ bus_size_t mmio_len;
+ uint32_t link_width;
+#ifdef __NetBSD__
+ struct pci_attach_args pa;
+ uint32_t bar0;
+ bus_space_handle_t bar0_handle;
+ pci_intr_handle_t intr_handle;
+ void *intr_cookie;
+#endif
+
+ /* DMA resources */
+ bus_dma_tag_t parent_dmat;
+ bus_dma_tag_t rx_dmat;
+ bus_dma_tag_t rx_jumbo_dmat;
+ bus_dma_tag_t tx_dmat;
+
+ /* Interrupt resources */
+#ifdef __FreeBSD__
+ struct resource *irq_res;
+#endif
+ int irq_rid;
+#ifdef __FreeBSD__
+ void *intr_tag;
+#endif
+
+ uint32_t msix_regs_rid;
+ struct resource *msix_regs_res;
+
+ struct resource *msix_irq_res[SGE_QSETS];
+ int msix_irq_rid[SGE_QSETS];
+ void *msix_intr_tag[SGE_QSETS];
+ uint8_t rxpkt_map[8]; /* maps RX_PKT interface values to port ids */
+ uint8_t rrss_map[SGE_QSETS]; /* revers RSS map table */
+
+ struct filter_info *filters;
+
+ /* Tasks */
+#ifdef __FreeBSD__
+ struct task ext_intr_task;
+ struct task slow_intr_task;
+ struct task tick_task;
+ struct task process_responses_task;
+ struct taskqueue *tq;
+#endif
+#ifdef __NetBSD__
+ struct cxgb_task ext_intr_task;
+ struct cxgb_task slow_intr_task;
+ struct cxgb_task tick_task;
+#endif
+ struct callout cxgb_tick_ch;
+ struct callout sge_timer_ch;
+
+ /* Register lock for use by the hardware layer */
+ struct mtx mdio_lock;
+ struct mtx elmer_lock;
+
+ /* Bookkeeping for the hardware layer */
+ struct adapter_params params;
+ unsigned int slow_intr_mask;
+ unsigned long irq_stats[IRQ_NUM_STATS];
+
+ struct sge sge;
+ struct mc7 pmrx;
+ struct mc7 pmtx;
+ struct mc7 cm;
+ struct mc5 mc5;
+
+ struct port_info port[MAX_NPORTS];
+ device_t portdev[MAX_NPORTS];
+ struct toedev tdev;
+ char fw_version[64];
+ uint32_t open_device_map;
+ uint32_t registered_device_map;
+#ifdef USE_SX
+ struct sx lock;
+#else
+ struct mtx lock;
+#endif
+#ifdef __FreeBSD__
+ driver_intr_t *cxgb_intr;
+#endif
+#ifdef __NetBSD__
+ int (*cxgb_intr)(void *);
+#endif
+ int msi_count;
+
+#define ADAPTER_LOCK_NAME_LEN 32
+ char lockbuf[ADAPTER_LOCK_NAME_LEN];
+ char reglockbuf[ADAPTER_LOCK_NAME_LEN];
+ char mdiolockbuf[ADAPTER_LOCK_NAME_LEN];
+ char elmerlockbuf[ADAPTER_LOCK_NAME_LEN];
};
struct t3_rx_mode {
-
- uint32_t idx;
- struct port_info *port;
+
+ uint32_t idx;
+ struct port_info *port;
};
-#define MDIO_LOCK(adapter) mtx_lock(&(adapter)->mdio_lock)
-#define MDIO_UNLOCK(adapter) mtx_unlock(&(adapter)->mdio_lock)
+#define MDIO_LOCK(adapter) mtx_lock(&(adapter)->mdio_lock)
+#define MDIO_UNLOCK(adapter) mtx_unlock(&(adapter)->mdio_lock)
+#define ELMR_LOCK(adapter) mtx_lock(&(adapter)->elmer_lock)
+#define ELMR_UNLOCK(adapter) mtx_unlock(&(adapter)->elmer_lock)
-#define PORT_LOCK(port) mtx_lock(&(port)->lock);
-#define PORT_UNLOCK(port) mtx_unlock(&(port)->lock);
-#define ADAPTER_LOCK(adap) mtx_lock(&(adap)->lock);
-#define ADAPTER_UNLOCK(adap) mtx_unlock(&(adap)->lock);
+#ifdef USE_SX
+#define PORT_LOCK(port) sx_xlock(&(port)->lock);
+#define PORT_UNLOCK(port) sx_xunlock(&(port)->lock);
+#define PORT_LOCK_INIT(port, name) SX_INIT(&(port)->lock, name)
+#define PORT_LOCK_DEINIT(port) SX_DESTROY(&(port)->lock)
+#define PORT_LOCK_ASSERT_OWNED(port) sx_assert(&(port)->lock, SA_LOCKED)
+#define ADAPTER_LOCK(adap) sx_xlock(&(adap)->lock);
+#define ADAPTER_UNLOCK(adap) sx_xunlock(&(adap)->lock);
+#define ADAPTER_LOCK_INIT(adap, name) SX_INIT(&(adap)->lock, name)
+#define ADAPTER_LOCK_DEINIT(adap) SX_DESTROY(&(adap)->lock)
+#define ADAPTER_LOCK_ASSERT_NOTOWNED(adap) sx_assert(&(adap)->lock, SA_UNLOCKED)
+#else
+#define PORT_LOCK(port) mtx_lock(&(port)->lock);
+#define PORT_UNLOCK(port) mtx_unlock(&(port)->lock);
+#define PORT_LOCK_INIT(port, name) mtx_init(&(port)->lock, name, 0, MTX_DEF)
+#define PORT_LOCK_DEINIT(port) mtx_destroy(&(port)->lock)
+#define PORT_LOCK_ASSERT_OWNED(port) mtx_assert(&(port)->lock, MA_OWNED)
+
+#define ADAPTER_LOCK(adap) mtx_lock(&(adap)->lock);
+#define ADAPTER_UNLOCK(adap) mtx_unlock(&(adap)->lock);
+#define ADAPTER_LOCK_INIT(adap, name) mtx_init(&(adap)->lock, name, 0, MTX_DEF)
+#define ADAPTER_LOCK_DEINIT(adap) mtx_destroy(&(adap)->lock)
+#define ADAPTER_LOCK_ASSERT_NOTOWNED(adap) mtx_assert(&(adap)->lock, MA_NOTOWNED)
+#endif
static __inline uint32_t
t3_read_reg(adapter_t *adapter, uint32_t reg_addr)
{
- return (bus_space_read_4(adapter->bt, adapter->bh, reg_addr));
+ return (bus_space_read_4(adapter->bt, adapter->bh, reg_addr));
}
static __inline void
t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val)
{
- bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val);
+ bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val);
}
static __inline void
t3_os_pci_read_config_4(adapter_t *adapter, int reg, uint32_t *val)
{
#ifdef __FreeBSD__
- *val = pci_read_config(adapter->dev, reg, 4);
+ *val = pci_read_config(adapter->dev, reg, 4);
#endif
#ifdef __NetBSD__
- *val = pci_conf_read(adapter->chip, adapter->tag, reg);
+ *val = pci_conf_read(adapter->pa.pa_pc, adapter->pa.pa_tag, reg);
#endif
}
@@ -382,10 +528,10 @@ static __inline void
t3_os_pci_write_config_4(adapter_t *adapter, int reg, uint32_t val)
{
#ifdef __FreeBSD__
- pci_write_config(adapter->dev, reg, val, 4);
+ pci_write_config(adapter->dev, reg, val, 4);
#endif
#ifdef __NetBSD__
- pci_conf_write(adapter->chip, adapter->tag, reg, val);
+ pci_conf_write(adapter->pa.pa_pc, adapter->pa.pa_tag, reg, val);
#endif
}
@@ -393,15 +539,15 @@ static __inline void
t3_os_pci_read_config_2(adapter_t *adapter, int reg, uint16_t *val)
{
#ifdef __FreeBSD__
- *val = pci_read_config(adapter->dev, reg, 2);
+ *val = pci_read_config(adapter->dev, reg, 2);
#endif
#ifdef __NetBSD__
- uint32_t temp;
- temp = pci_conf_read(adapter->chip, adapter->tag, reg&0xfc);
- if (reg&0x2)
- *val = (temp>>16)&0xffff;
- else
- *val = temp&0xffff;
+ uint32_t temp;
+ temp = pci_conf_read(adapter->pa.pa_pc, adapter->pa.pa_tag, reg&0xfc);
+ if (reg&0x2)
+ *val = (temp>>16)&0xffff;
+ else
+ *val = temp&0xffff;
#endif
}
@@ -409,48 +555,48 @@ static __inline void
t3_os_pci_write_config_2(adapter_t *adapter, int reg, uint16_t val)
{
#ifdef __FreeBSD__
- pci_write_config(adapter->dev, reg, val, 2);
+ pci_write_config(adapter->dev, reg, val, 2);
#endif
#ifdef __NetBSD__
- uint32_t temp = pci_conf_read(adapter->chip, adapter->tag, reg&0xfc);
- if (reg&0x2)
- temp = (temp&0xffff)|(val<<16);
- else
- temp = (temp&0xffff0000)|val;
- pci_conf_write(adapter->chip, adapter->tag, reg&0xfc, temp);
+ uint32_t temp = pci_conf_read(adapter->pa.pa_pc, adapter->pa.pa_tag, reg&0xfc);
+ if (reg&0x2)
+ temp = (temp&0xffff)|(val<<16);
+ else
+ temp = (temp&0xffff0000)|val;
+ pci_conf_write(adapter->pa.pa_pc, adapter->pa.pa_tag, reg&0xfc, temp);
#endif
}
static __inline uint8_t *
t3_get_next_mcaddr(struct t3_rx_mode *rm)
{
- uint8_t *macaddr = NULL;
-
- if (rm->idx == 0)
- macaddr = rm->port->hw_addr;
+ uint8_t *macaddr = NULL;
+
+ if (rm->idx == 0)
+ macaddr = rm->port->hw_addr;
- rm->idx++;
- return (macaddr);
+ rm->idx++;
+ return (macaddr);
}
static __inline void
t3_init_rx_mode(struct t3_rx_mode *rm, struct port_info *port)
{
- rm->idx = 0;
- rm->port = port;
+ rm->idx = 0;
+ rm->port = port;
}
static __inline struct port_info *
adap2pinfo(struct adapter *adap, int idx)
{
- return &adap->port[idx];
+ return &adap->port[idx];
}
int t3_os_find_pci_capability(adapter_t *adapter, int cap);
int t3_os_pci_save_state(struct adapter *adapter);
int t3_os_pci_restore_state(struct adapter *adapter);
void t3_os_link_changed(adapter_t *adapter, int port_id, int link_status,
- int speed, int duplex, int fc);
+ int speed, int duplex, int fc);
void t3_sge_err_intr_handler(adapter_t *adapter);
int t3_offload_tx(struct toedev *, struct mbuf *);
void t3_os_ext_intr_handler(adapter_t *adapter);
@@ -465,17 +611,25 @@ int t3_sge_alloc_qset(adapter_t *, uint32_t, int, int, const struct qset_params
void t3_free_sge_resources(adapter_t *);
void t3_sge_start(adapter_t *);
void t3_sge_stop(adapter_t *);
+#ifdef __FreeBSD__
void t3b_intr(void *data);
void t3_intr_msi(void *data);
void t3_intr_msix(void *data);
-int t3_encap(struct port_info *, struct mbuf **);
+#endif
+#ifdef __NetBSD__
+int t3b_intr(void *data);
+int t3_intr_msi(void *data);
+int t3_intr_msix(void *data);
+#endif
+int t3_encap(struct port_info *, struct mbuf **, int *free);
-int t3_sge_init_sw(adapter_t *);
+int t3_sge_init_adapter(adapter_t *);
+int t3_sge_init_port(struct port_info *);
void t3_sge_deinit_sw(adapter_t *);
void t3_rx_eth_lro(adapter_t *adap, struct sge_rspq *rq, struct mbuf *m,
int ethpad, uint32_t rss_hash, uint32_t rss_csum, int lro);
-void t3_rx_eth(struct port_info *p, struct sge_rspq *rq, struct mbuf *m, int ethpad);
+void t3_rx_eth(struct adapter *adap, struct sge_rspq *rq, struct mbuf *m, int ethpad);
void t3_lro_flush(adapter_t *adap, struct sge_qset *qs, struct lro_state *state);
void t3_add_sysctls(adapter_t *sc);
@@ -487,30 +641,30 @@ void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
*/
#define desc_reclaimable(q) ((int)((q)->processed - (q)->cleaned - TX_MAX_DESC))
-#define container_of(p, stype, field) ((stype *)(((uint8_t *)(p)) - offsetof(stype, field)))
+#define container_of(p, stype, field) ((stype *)(((uint8_t *)(p)) - offsetof(stype, field)))
static __inline struct sge_qset *
fl_to_qset(struct sge_fl *q, int qidx)
{
- return container_of(q, struct sge_qset, fl[qidx]);
+ return container_of(q, struct sge_qset, fl[qidx]);
}
static __inline struct sge_qset *
rspq_to_qset(struct sge_rspq *q)
{
- return container_of(q, struct sge_qset, rspq);
+ return container_of(q, struct sge_qset, rspq);
}
static __inline struct sge_qset *
txq_to_qset(struct sge_txq *q, int qidx)
{
- return container_of(q, struct sge_qset, txq[qidx]);
+ return container_of(q, struct sge_qset, txq[qidx]);
}
static __inline struct adapter *
tdev2adap(struct toedev *d)
{
- return container_of(d, struct adapter, tdev);
+ return container_of(d, struct adapter, tdev);
}
#undef container_of
@@ -521,43 +675,5 @@ static inline int offload_running(adapter_t *adapter)
return isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT);
}
-// moved from cxgb_common.h due to circular reference
-
-#define adapter_info(adap) ((adap)->params.info)
-
-static inline int uses_xaui(const adapter_t *adap)
-{
- return adapter_info(adap)->caps & SUPPORTED_AUI;
-}
-
-static inline int is_10G(const adapter_t *adap)
-{
- return adapter_info(adap)->caps & SUPPORTED_10000baseT_Full;
-}
-
-static inline int is_offload(const adapter_t *adap)
-{
-#ifdef CONFIG_CHELSIO_T3_CORE
- return adap->params.offload;
-#else
- return 0;
-#endif
-}
-
-static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
-{
- return adap->params.vpd.cclk / 1000;
-}
-
-static inline unsigned int dack_ticks_to_usec(const adapter_t *adap,
- unsigned int ticks)
-{
- return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
-}
-
-static inline unsigned int is_pcie(const adapter_t *adap)
-{
- return adap->params.pci.variant == PCI_VARIANT_PCIE;
-}
#endif
diff --git a/sys/dev/pci/cxgb_common.h b/sys/dev/pci/cxgb_common.h
index 4a91d2394d9..9f52ecc1b23 100644
--- a/sys/dev/pci/cxgb_common.h
+++ b/sys/dev/pci/cxgb_common.h
@@ -25,10 +25,9 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/common/cxgb_common.h,v 1.4 2007/05/28 22:57:26 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/common/cxgb_common.h,v 1.7 2007/09/09 01:28:03 kmacy Exp $
***************************************************************************/
-
#ifndef __CHELSIO_COMMON_H
#define __CHELSIO_COMMON_H
@@ -40,69 +39,97 @@ $FreeBSD: src/sys/dev/cxgb/common/cxgb_common.h,v 1.4 2007/05/28 22:57:26 kmacy
#endif
#ifdef __NetBSD__
#include <dev/pci/cxgb_osdep.h>
-#include "cxgb_toedev.h"
+// ??? #include <dev/pci/cxgb_toedev.h>
#endif
#endif
enum {
- MAX_NPORTS = 2, /* max # of ports */
- MAX_FRAME_SIZE = 10240, /* max MAC frame size, including header + FCS */
- EEPROMSIZE = 8192, /* Serial EEPROM size */
- RSS_TABLE_SIZE = 64, /* size of RSS lookup and mapping tables */
- TCB_SIZE = 128, /* TCB size */
- NMTUS = 16, /* size of MTU table */
- NCCTRL_WIN = 32, /* # of congestion control windows */
- NTX_SCHED = 8, /* # of HW Tx scheduling queues */
- TP_TMR_RES = 200, /* TP timer resolution in usec */
-};
-
-#define MAX_RX_COALESCING_LEN 16224U
+ MAX_FRAME_SIZE = 10240, /* max MAC frame size, includes header + FCS */
+ EEPROMSIZE = 8192, /* Serial EEPROM size */
+ SERNUM_LEN = 16, /* Serial # length */
+ RSS_TABLE_SIZE = 64, /* size of RSS lookup and mapping tables */
+ TCB_SIZE = 128, /* TCB size */
+ NMTUS = 16, /* size of MTU table */
+ NCCTRL_WIN = 32, /* # of congestion control windows */
+ NTX_SCHED = 8, /* # of HW Tx scheduling queues */
+ PROTO_SRAM_LINES = 128, /* size of protocol sram */
+ MAX_NPORTS = 4,
+ TP_TMR_RES = 200,
+ TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */
+ TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */
+};
+
+#define MAX_RX_COALESCING_LEN 12288U
enum {
- PAUSE_RX = 1 << 0,
- PAUSE_TX = 1 << 1,
- PAUSE_AUTONEG = 1 << 2
+ PAUSE_RX = 1 << 0,
+ PAUSE_TX = 1 << 1,
+ PAUSE_AUTONEG = 1 << 2
};
enum {
- SUPPORTED_IRQ = 1 << 25
+ SUPPORTED_IRQ = 1 << 24
};
enum { /* adapter interrupt-maintained statistics */
- STAT_ULP_CH0_PBL_OOB,
- STAT_ULP_CH1_PBL_OOB,
- STAT_PCI_CORR_ECC,
+ STAT_ULP_CH0_PBL_OOB,
+ STAT_ULP_CH1_PBL_OOB,
+ STAT_PCI_CORR_ECC,
- IRQ_NUM_STATS /* keep last */
+ IRQ_NUM_STATS /* keep last */
};
enum {
- FW_VERSION_MAJOR = 4,
- FW_VERSION_MINOR = 0,
- FW_VERSION_MICRO = 0
+ TP_VERSION_MAJOR = 1,
+ TP_VERSION_MINOR = 1,
+ TP_VERSION_MICRO = 0
+};
+
+#define S_TP_VERSION_MAJOR 16
+#define M_TP_VERSION_MAJOR 0xFF
+#define V_TP_VERSION_MAJOR(x) ((x) << S_TP_VERSION_MAJOR)
+#define G_TP_VERSION_MAJOR(x) \
+ (((x) >> S_TP_VERSION_MAJOR) & M_TP_VERSION_MAJOR)
+
+#define S_TP_VERSION_MINOR 8
+#define M_TP_VERSION_MINOR 0xFF
+#define V_TP_VERSION_MINOR(x) ((x) << S_TP_VERSION_MINOR)
+#define G_TP_VERSION_MINOR(x) \
+ (((x) >> S_TP_VERSION_MINOR) & M_TP_VERSION_MINOR)
+
+#define S_TP_VERSION_MICRO 0
+#define M_TP_VERSION_MICRO 0xFF
+#define V_TP_VERSION_MICRO(x) ((x) << S_TP_VERSION_MICRO)
+#define G_TP_VERSION_MICRO(x) \
+ (((x) >> S_TP_VERSION_MICRO) & M_TP_VERSION_MICRO)
+
+enum {
+ FW_VERSION_MAJOR = 4,
+ FW_VERSION_MINOR = 7,
+ FW_VERSION_MICRO = 0
};
enum {
- SGE_QSETS = 8, /* # of SGE Tx/Rx/RspQ sets */
- SGE_RXQ_PER_SET = 2, /* # of Rx queues per set */
- SGE_TXQ_PER_SET = 3 /* # of Tx queues per set */
+ SGE_QSETS = 8, /* # of SGE Tx/Rx/RspQ sets */
+ SGE_RXQ_PER_SET = 2, /* # of Rx queues per set */
+ SGE_TXQ_PER_SET = 3 /* # of Tx queues per set */
};
enum sge_context_type { /* SGE egress context types */
- SGE_CNTXT_RDMA = 0,
- SGE_CNTXT_ETH = 2,
- SGE_CNTXT_OFLD = 4,
- SGE_CNTXT_CTRL = 5
+ SGE_CNTXT_RDMA = 0,
+ SGE_CNTXT_ETH = 2,
+ SGE_CNTXT_OFLD = 4,
+ SGE_CNTXT_CTRL = 5
};
enum {
- AN_PKT_SIZE = 32, /* async notification packet size */
- IMMED_PKT_SIZE = 48 /* packet size for immediate data */
+ AN_PKT_SIZE = 32, /* async notification packet size */
+ IMMED_PKT_SIZE = 48 /* packet size for immediate data */
};
struct sg_ent { /* SGE scatter/gather entry */
- u32 len[2];
- u64 addr[2];
+ u32 len[2];
+ u64 addr[2];
};
#ifndef SGE_NUM_GENBITS
@@ -114,442 +141,455 @@ struct sg_ent { /* SGE scatter/gather entry */
#define WR_FLITS (TX_DESC_FLITS + 1 - SGE_NUM_GENBITS)
struct cphy;
-typedef struct adapter adapter_t;
struct mdio_ops {
- int (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
- int reg_addr, unsigned int *val);
+ int (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
+ int reg_addr, unsigned int *val);
int (*write)(adapter_t *adapter, int phy_addr, int mmd_addr,
- int reg_addr, unsigned int val);
+ int reg_addr, unsigned int val);
};
struct adapter_info {
- unsigned char nports; /* # of ports */
- unsigned char phy_base_addr; /* MDIO PHY base address */
- unsigned char mdien;
- unsigned char mdiinv;
- unsigned int gpio_out; /* GPIO output settings */
- unsigned int gpio_intr; /* GPIO IRQ enable mask */
- unsigned long caps; /* adapter capabilities */
- const struct mdio_ops *mdio_ops; /* MDIO operations */
- const char *desc; /* product description */
+ unsigned char nports0; /* # of ports on channel 0 */
+ unsigned char nports1; /* # of ports on channel 1 */
+ unsigned char phy_base_addr; /* MDIO PHY base address */
+ unsigned char mdien:1;
+ unsigned char mdiinv:1;
+ unsigned int gpio_out; /* GPIO output settings */
+ unsigned int gpio_intr; /* GPIO IRQ enable mask */
+ unsigned long caps; /* adapter capabilities */
+ const struct mdio_ops *mdio_ops; /* MDIO operations */
+ const char *desc; /* product description */
};
struct port_type_info {
- void (*phy_prep)(struct cphy *phy, adapter_t *adapter, int phy_addr,
- const struct mdio_ops *ops);
- unsigned int caps;
- const char *desc;
+ void (*phy_prep)(struct cphy *phy, adapter_t *adapter, int phy_addr,
+ const struct mdio_ops *ops);
+ unsigned int caps;
+ const char *desc;
};
struct mc5_stats {
- unsigned long parity_err;
- unsigned long active_rgn_full;
- unsigned long nfa_srch_err;
- unsigned long unknown_cmd;
- unsigned long reqq_parity_err;
- unsigned long dispq_parity_err;
- unsigned long del_act_empty;
+ unsigned long parity_err;
+ unsigned long active_rgn_full;
+ unsigned long nfa_srch_err;
+ unsigned long unknown_cmd;
+ unsigned long reqq_parity_err;
+ unsigned long dispq_parity_err;
+ unsigned long del_act_empty;
};
struct mc7_stats {
- unsigned long corr_err;
- unsigned long uncorr_err;
- unsigned long parity_err;
- unsigned long addr_err;
+ unsigned long corr_err;
+ unsigned long uncorr_err;
+ unsigned long parity_err;
+ unsigned long addr_err;
};
struct mac_stats {
- u64 tx_octets; /* total # of octets in good frames */
- u64 tx_octets_bad; /* total # of octets in error frames */
- u64 tx_frames; /* all good frames */
- u64 tx_mcast_frames; /* good multicast frames */
- u64 tx_bcast_frames; /* good broadcast frames */
- u64 tx_pause; /* # of transmitted pause frames */
- u64 tx_deferred; /* frames with deferred transmissions */
- u64 tx_late_collisions; /* # of late collisions */
- u64 tx_total_collisions; /* # of total collisions */
- u64 tx_excess_collisions; /* frame errors from excessive collissions */
- u64 tx_underrun; /* # of Tx FIFO underruns */
- u64 tx_len_errs; /* # of Tx length errors */
- u64 tx_mac_internal_errs; /* # of internal MAC errors on Tx */
- u64 tx_excess_deferral; /* # of frames with excessive deferral */
- u64 tx_fcs_errs; /* # of frames with bad FCS */
-
- u64 tx_frames_64; /* # of Tx frames in a particular range */
- u64 tx_frames_65_127;
- u64 tx_frames_128_255;
- u64 tx_frames_256_511;
- u64 tx_frames_512_1023;
- u64 tx_frames_1024_1518;
- u64 tx_frames_1519_max;
-
- u64 rx_octets; /* total # of octets in good frames */
- u64 rx_octets_bad; /* total # of octets in error frames */
- u64 rx_frames; /* all good frames */
- u64 rx_mcast_frames; /* good multicast frames */
- u64 rx_bcast_frames; /* good broadcast frames */
- u64 rx_pause; /* # of received pause frames */
- u64 rx_fcs_errs; /* # of received frames with bad FCS */
- u64 rx_align_errs; /* alignment errors */
- u64 rx_symbol_errs; /* symbol errors */
- u64 rx_data_errs; /* data errors */
- u64 rx_sequence_errs; /* sequence errors */
- u64 rx_runt; /* # of runt frames */
- u64 rx_jabber; /* # of jabber frames */
- u64 rx_short; /* # of short frames */
- u64 rx_too_long; /* # of oversized frames */
- u64 rx_mac_internal_errs; /* # of internal MAC errors on Rx */
-
- u64 rx_frames_64; /* # of Rx frames in a particular range */
- u64 rx_frames_65_127;
- u64 rx_frames_128_255;
- u64 rx_frames_256_511;
- u64 rx_frames_512_1023;
- u64 rx_frames_1024_1518;
- u64 rx_frames_1519_max;
-
- u64 rx_cong_drops; /* # of Rx drops due to SGE congestion */
-
- unsigned long tx_fifo_parity_err;
- unsigned long rx_fifo_parity_err;
- unsigned long tx_fifo_urun;
- unsigned long rx_fifo_ovfl;
- unsigned long serdes_signal_loss;
- unsigned long xaui_pcs_ctc_err;
- unsigned long xaui_pcs_align_change;
-
- unsigned long num_toggled; /* # times toggled TxEn due to stuck TX */
- unsigned long num_resets; /* # times reset due to stuck TX */
+ u64 tx_octets; /* total # of octets in good frames */
+ u64 tx_octets_bad; /* total # of octets in error frames */
+ u64 tx_frames; /* all good frames */
+ u64 tx_mcast_frames; /* good multicast frames */
+ u64 tx_bcast_frames; /* good broadcast frames */
+ u64 tx_pause; /* # of transmitted pause frames */
+ u64 tx_deferred; /* frames with deferred transmissions */
+ u64 tx_late_collisions; /* # of late collisions */
+ u64 tx_total_collisions; /* # of total collisions */
+ u64 tx_excess_collisions; /* frame errors from excessive collissions */
+ u64 tx_underrun; /* # of Tx FIFO underruns */
+ u64 tx_len_errs; /* # of Tx length errors */
+ u64 tx_mac_internal_errs; /* # of internal MAC errors on Tx */
+ u64 tx_excess_deferral; /* # of frames with excessive deferral */
+ u64 tx_fcs_errs; /* # of frames with bad FCS */
+
+ u64 tx_frames_64; /* # of Tx frames in a particular range */
+ u64 tx_frames_65_127;
+ u64 tx_frames_128_255;
+ u64 tx_frames_256_511;
+ u64 tx_frames_512_1023;
+ u64 tx_frames_1024_1518;
+ u64 tx_frames_1519_max;
+
+ u64 rx_octets; /* total # of octets in good frames */
+ u64 rx_octets_bad; /* total # of octets in error frames */
+ u64 rx_frames; /* all good frames */
+ u64 rx_mcast_frames; /* good multicast frames */
+ u64 rx_bcast_frames; /* good broadcast frames */
+ u64 rx_pause; /* # of received pause frames */
+ u64 rx_fcs_errs; /* # of received frames with bad FCS */
+ u64 rx_align_errs; /* alignment errors */
+ u64 rx_symbol_errs; /* symbol errors */
+ u64 rx_data_errs; /* data errors */
+ u64 rx_sequence_errs; /* sequence errors */
+ u64 rx_runt; /* # of runt frames */
+ u64 rx_jabber; /* # of jabber frames */
+ u64 rx_short; /* # of short frames */
+ u64 rx_too_long; /* # of oversized frames */
+ u64 rx_mac_internal_errs; /* # of internal MAC errors on Rx */
+
+ u64 rx_frames_64; /* # of Rx frames in a particular range */
+ u64 rx_frames_65_127;
+ u64 rx_frames_128_255;
+ u64 rx_frames_256_511;
+ u64 rx_frames_512_1023;
+ u64 rx_frames_1024_1518;
+ u64 rx_frames_1519_max;
+
+ u64 rx_cong_drops; /* # of Rx drops due to SGE congestion */
+
+ unsigned long tx_fifo_parity_err;
+ unsigned long rx_fifo_parity_err;
+ unsigned long tx_fifo_urun;
+ unsigned long rx_fifo_ovfl;
+ unsigned long serdes_signal_loss;
+ unsigned long xaui_pcs_ctc_err;
+ unsigned long xaui_pcs_align_change;
+
+ unsigned long num_toggled; /* # times toggled TxEn due to stuck TX */
+ unsigned long num_resets; /* # times reset due to stuck TX */
};
struct tp_mib_stats {
- u32 ipInReceive_hi;
- u32 ipInReceive_lo;
- u32 ipInHdrErrors_hi;
- u32 ipInHdrErrors_lo;
- u32 ipInAddrErrors_hi;
- u32 ipInAddrErrors_lo;
- u32 ipInUnknownProtos_hi;
- u32 ipInUnknownProtos_lo;
- u32 ipInDiscards_hi;
- u32 ipInDiscards_lo;
- u32 ipInDelivers_hi;
- u32 ipInDelivers_lo;
- u32 ipOutRequests_hi;
- u32 ipOutRequests_lo;
- u32 ipOutDiscards_hi;
- u32 ipOutDiscards_lo;
- u32 ipOutNoRoutes_hi;
- u32 ipOutNoRoutes_lo;
- u32 ipReasmTimeout;
- u32 ipReasmReqds;
- u32 ipReasmOKs;
- u32 ipReasmFails;
-
- u32 reserved[8];
-
- u32 tcpActiveOpens;
- u32 tcpPassiveOpens;
- u32 tcpAttemptFails;
- u32 tcpEstabResets;
- u32 tcpOutRsts;
- u32 tcpCurrEstab;
- u32 tcpInSegs_hi;
- u32 tcpInSegs_lo;
- u32 tcpOutSegs_hi;
- u32 tcpOutSegs_lo;
- u32 tcpRetransSeg_hi;
- u32 tcpRetransSeg_lo;
- u32 tcpInErrs_hi;
- u32 tcpInErrs_lo;
- u32 tcpRtoMin;
- u32 tcpRtoMax;
+ u32 ipInReceive_hi;
+ u32 ipInReceive_lo;
+ u32 ipInHdrErrors_hi;
+ u32 ipInHdrErrors_lo;
+ u32 ipInAddrErrors_hi;
+ u32 ipInAddrErrors_lo;
+ u32 ipInUnknownProtos_hi;
+ u32 ipInUnknownProtos_lo;
+ u32 ipInDiscards_hi;
+ u32 ipInDiscards_lo;
+ u32 ipInDelivers_hi;
+ u32 ipInDelivers_lo;
+ u32 ipOutRequests_hi;
+ u32 ipOutRequests_lo;
+ u32 ipOutDiscards_hi;
+ u32 ipOutDiscards_lo;
+ u32 ipOutNoRoutes_hi;
+ u32 ipOutNoRoutes_lo;
+ u32 ipReasmTimeout;
+ u32 ipReasmReqds;
+ u32 ipReasmOKs;
+ u32 ipReasmFails;
+
+ u32 reserved[8];
+
+ u32 tcpActiveOpens;
+ u32 tcpPassiveOpens;
+ u32 tcpAttemptFails;
+ u32 tcpEstabResets;
+ u32 tcpOutRsts;
+ u32 tcpCurrEstab;
+ u32 tcpInSegs_hi;
+ u32 tcpInSegs_lo;
+ u32 tcpOutSegs_hi;
+ u32 tcpOutSegs_lo;
+ u32 tcpRetransSeg_hi;
+ u32 tcpRetransSeg_lo;
+ u32 tcpInErrs_hi;
+ u32 tcpInErrs_lo;
+ u32 tcpRtoMin;
+ u32 tcpRtoMax;
};
struct tp_params {
- unsigned int nchan; /* # of channels */
- unsigned int pmrx_size; /* total PMRX capacity */
- unsigned int pmtx_size; /* total PMTX capacity */
- unsigned int cm_size; /* total CM capacity */
- unsigned int chan_rx_size; /* per channel Rx size */
- unsigned int chan_tx_size; /* per channel Tx size */
- unsigned int rx_pg_size; /* Rx page size */
- unsigned int tx_pg_size; /* Tx page size */
- unsigned int rx_num_pgs; /* # of Rx pages */
- unsigned int tx_num_pgs; /* # of Tx pages */
- unsigned int ntimer_qs; /* # of timer queues */
- unsigned int dack_re; /* DACK timer resolution */
+ unsigned int nchan; /* # of channels */
+ unsigned int pmrx_size; /* total PMRX capacity */
+ unsigned int pmtx_size; /* total PMTX capacity */
+ unsigned int cm_size; /* total CM capacity */
+ unsigned int chan_rx_size; /* per channel Rx size */
+ unsigned int chan_tx_size; /* per channel Tx size */
+ unsigned int rx_pg_size; /* Rx page size */
+ unsigned int tx_pg_size; /* Tx page size */
+ unsigned int rx_num_pgs; /* # of Rx pages */
+ unsigned int tx_num_pgs; /* # of Tx pages */
+ unsigned int ntimer_qs; /* # of timer queues */
+ unsigned int tre; /* log2 of core clocks per TP tick */
+ unsigned int dack_re; /* DACK timer resolution */
};
struct qset_params { /* SGE queue set parameters */
- unsigned int polling; /* polling/interrupt service for rspq */
- unsigned int coalesce_nsecs; /* irq coalescing timer */
- unsigned int rspq_size; /* # of entries in response queue */
- unsigned int fl_size; /* # of entries in regular free list */
- unsigned int jumbo_size; /* # of entries in jumbo free list */
- unsigned int txq_size[SGE_TXQ_PER_SET]; /* Tx queue sizes */
- unsigned int cong_thres; /* FL congestion threshold */
- unsigned int vector; /* Interrupt (line or vector) number */
+ unsigned int polling; /* polling/interrupt service for rspq */
+ unsigned int lro; /* large receive offload */
+ unsigned int coalesce_nsecs; /* irq coalescing timer */
+ unsigned int rspq_size; /* # of entries in response queue */
+ unsigned int fl_size; /* # of entries in regular free list */
+ unsigned int jumbo_size; /* # of entries in jumbo free list */
+ unsigned int txq_size[SGE_TXQ_PER_SET]; /* Tx queue sizes */
+ unsigned int cong_thres; /* FL congestion threshold */
+ unsigned int vector; /* Interrupt (line or vector) number */
};
struct sge_params {
- unsigned int max_pkt_size; /* max offload pkt size */
- struct qset_params qset[SGE_QSETS];
+ unsigned int max_pkt_size; /* max offload pkt size */
+ struct qset_params qset[SGE_QSETS];
};
struct mc5_params {
- unsigned int mode; /* selects MC5 width */
- unsigned int nservers; /* size of server region */
- unsigned int nfilters; /* size of filter region */
- unsigned int nroutes; /* size of routing region */
+ unsigned int mode; /* selects MC5 width */
+ unsigned int nservers; /* size of server region */
+ unsigned int nfilters; /* size of filter region */
+ unsigned int nroutes; /* size of routing region */
};
/* Default MC5 region sizes */
enum {
- DEFAULT_NSERVERS = 512,
- DEFAULT_NFILTERS = 128
+ DEFAULT_NSERVERS = 512,
+ DEFAULT_NFILTERS = 128
};
/* MC5 modes, these must be non-0 */
enum {
- MC5_MODE_144_BIT = 1,
- MC5_MODE_72_BIT = 2
+ MC5_MODE_144_BIT = 1,
+ MC5_MODE_72_BIT = 2
};
/* MC5 min active region size */
enum { MC5_MIN_TIDS = 16 };
struct vpd_params {
- unsigned int cclk;
- unsigned int mclk;
- unsigned int uclk;
- unsigned int mdc;
- unsigned int mem_timing;
- u8 eth_base[6];
- u8 port_type[MAX_NPORTS];
- unsigned short xauicfg[2];
+ unsigned int cclk;
+ unsigned int mclk;
+ unsigned int uclk;
+ unsigned int mdc;
+ unsigned int mem_timing;
+ u8 sn[SERNUM_LEN + 1];
+ u8 eth_base[6];
+ u8 port_type[MAX_NPORTS];
+ unsigned short xauicfg[2];
};
struct pci_params {
- unsigned int vpd_cap_addr;
- unsigned int pcie_cap_addr;
- unsigned short speed;
- unsigned char width;
- unsigned char variant;
+ unsigned int vpd_cap_addr;
+ unsigned int pcie_cap_addr;
+ unsigned short speed;
+ unsigned char width;
+ unsigned char variant;
};
enum {
- PCI_VARIANT_PCI,
- PCI_VARIANT_PCIX_MODE1_PARITY,
- PCI_VARIANT_PCIX_MODE1_ECC,
- PCI_VARIANT_PCIX_266_MODE2,
- PCI_VARIANT_PCIE
+ PCI_VARIANT_PCI,
+ PCI_VARIANT_PCIX_MODE1_PARITY,
+ PCI_VARIANT_PCIX_MODE1_ECC,
+ PCI_VARIANT_PCIX_266_MODE2,
+ PCI_VARIANT_PCIE
};
struct adapter_params {
- struct sge_params sge;
- struct mc5_params mc5;
- struct tp_params tp;
- struct vpd_params vpd;
- struct pci_params pci;
+ struct sge_params sge;
+ struct mc5_params mc5;
+ struct tp_params tp;
+ struct vpd_params vpd;
+ struct pci_params pci;
- const struct adapter_info *info;
+ const struct adapter_info *info;
#ifdef CONFIG_CHELSIO_T3_CORE
- unsigned short mtus[NMTUS];
- unsigned short a_wnd[NCCTRL_WIN];
- unsigned short b_wnd[NCCTRL_WIN];
+ unsigned short mtus[NMTUS];
+ unsigned short a_wnd[NCCTRL_WIN];
+ unsigned short b_wnd[NCCTRL_WIN];
#endif
- unsigned int nports; /* # of ethernet ports */
- unsigned int stats_update_period; /* MAC stats accumulation period */
- unsigned int linkpoll_period; /* link poll period in 0.1s */
- unsigned int rev; /* chip revision */
- unsigned int offload;
+ unsigned int nports; /* # of ethernet ports */
+ unsigned int chan_map; /* bitmap of in-use Tx channels */
+ unsigned int stats_update_period; /* MAC stats accumulation period */
+ unsigned int linkpoll_period; /* link poll period in 0.1s */
+ unsigned int rev; /* chip revision */
+ unsigned int offload;
};
-enum { /* chip revisions */
- T3_REV_A = 0,
- T3_REV_B = 2,
- T3_REV_B2 = 3,
+enum { /* chip revisions */
+ T3_REV_A = 0,
+ T3_REV_B = 2,
+ T3_REV_B2 = 3,
+ T3_REV_C = 4,
};
struct trace_params {
- u32 sip;
- u32 sip_mask;
- u32 dip;
- u32 dip_mask;
- u16 sport;
- u16 sport_mask;
- u16 dport;
- u16 dport_mask;
- u32 vlan:12;
- u32 vlan_mask:12;
- u32 intf:4;
- u32 intf_mask:4;
- u8 proto;
- u8 proto_mask;
+ u32 sip;
+ u32 sip_mask;
+ u32 dip;
+ u32 dip_mask;
+ u16 sport;
+ u16 sport_mask;
+ u16 dport;
+ u16 dport_mask;
+ u32 vlan:12;
+ u32 vlan_mask:12;
+ u32 intf:4;
+ u32 intf_mask:4;
+ u8 proto;
+ u8 proto_mask;
};
struct link_config {
- unsigned int supported; /* link capabilities */
- unsigned int advertising; /* advertised capabilities */
+ unsigned int supported; /* link capabilities */
+ unsigned int advertising; /* advertised capabilities */
unsigned short requested_speed; /* speed user has requested */
- unsigned short speed; /* actual link speed */
+ unsigned short speed; /* actual link speed */
unsigned char requested_duplex; /* duplex user has requested */
- unsigned char duplex; /* actual link duplex */
- unsigned char requested_fc; /* flow control user has requested */
- unsigned char fc; /* actual link flow control */
- unsigned char autoneg; /* autonegotiating? */
- unsigned int link_ok; /* link up? */
+ unsigned char duplex; /* actual link duplex */
+ unsigned char requested_fc; /* flow control user has requested */
+ unsigned char fc; /* actual link flow control */
+ unsigned char autoneg; /* autonegotiating? */
+ unsigned int link_ok; /* link up? */
};
#define SPEED_INVALID 0xffff
#define DUPLEX_INVALID 0xff
struct mc5 {
- adapter_t *adapter;
- unsigned int tcam_size;
- unsigned char part_type;
- unsigned char parity_enabled;
- unsigned char mode;
- struct mc5_stats stats;
+ adapter_t *adapter;
+ unsigned int tcam_size;
+ unsigned char part_type;
+ unsigned char parity_enabled;
+ unsigned char mode;
+ struct mc5_stats stats;
};
static inline unsigned int t3_mc5_size(const struct mc5 *p)
{
- return p->tcam_size;
+ return p->tcam_size;
}
struct mc7 {
- adapter_t *adapter; /* backpointer to adapter */
- unsigned int size; /* memory size in bytes */
- unsigned int width; /* MC7 interface width */
- unsigned int offset; /* register address offset for MC7 instance */
- const char *name; /* name of MC7 instance */
- struct mc7_stats stats; /* MC7 statistics */
+ adapter_t *adapter; /* backpointer to adapter */
+ unsigned int size; /* memory size in bytes */
+ unsigned int width; /* MC7 interface width */
+ unsigned int offset; /* register address offset for MC7 instance */
+ const char *name; /* name of MC7 instance */
+ struct mc7_stats stats; /* MC7 statistics */
};
static inline unsigned int t3_mc7_size(const struct mc7 *p)
{
- return p->size;
+ return p->size;
}
struct cmac {
- adapter_t *adapter;
- unsigned int offset;
- unsigned int nucast; /* # of address filters for unicast MACs */
- unsigned int tx_tcnt;
- unsigned int tx_xcnt;
- u64 tx_mcnt;
- unsigned int rx_xcnt;
- u64 rx_mcnt;
- unsigned int toggle_cnt;
- unsigned int txen;
- struct mac_stats stats;
+ adapter_t *adapter;
+ unsigned int offset;
+ unsigned char nucast; /* # of address filters for unicast MACs */
+ unsigned char multiport; /* multiple ports connected to this MAC */
+ unsigned char ext_port; /* external MAC port */
+ unsigned char promisc_map; /* which external ports are promiscuous */
+ unsigned int tx_tcnt;
+ unsigned int tx_xcnt;
+ u64 tx_mcnt;
+ unsigned int rx_xcnt;
+ unsigned int rx_ocnt;
+ u64 rx_mcnt;
+ unsigned int toggle_cnt;
+ unsigned int txen;
+ u64 rx_pause;
+ struct mac_stats stats;
};
enum {
- MAC_DIRECTION_RX = 1,
- MAC_DIRECTION_TX = 2,
- MAC_RXFIFO_SIZE = 32768
+ MAC_DIRECTION_RX = 1,
+ MAC_DIRECTION_TX = 2,
+ MAC_RXFIFO_SIZE = 32768
};
/* IEEE 802.3ae specified MDIO devices */
enum {
- MDIO_DEV_PMA_PMD = 1,
- MDIO_DEV_WIS = 2,
- MDIO_DEV_PCS = 3,
- MDIO_DEV_XGXS = 4
+ MDIO_DEV_PMA_PMD = 1,
+ MDIO_DEV_WIS = 2,
+ MDIO_DEV_PCS = 3,
+ MDIO_DEV_XGXS = 4
};
/* PHY loopback direction */
enum {
- PHY_LOOPBACK_TX = 1,
- PHY_LOOPBACK_RX = 2
+ PHY_LOOPBACK_TX = 1,
+ PHY_LOOPBACK_RX = 2
};
/* PHY interrupt types */
enum {
- cphy_cause_link_change = 1,
- cphy_cause_fifo_error = 2
+ cphy_cause_link_change = 1,
+ cphy_cause_fifo_error = 2
};
/* PHY operations */
struct cphy_ops {
- void (*destroy)(struct cphy *phy);
- int (*reset)(struct cphy *phy, int wait);
+ void (*destroy)(struct cphy *phy);
+ int (*reset)(struct cphy *phy, int wait);
- int (*intr_enable)(struct cphy *phy);
- int (*intr_disable)(struct cphy *phy);
- int (*intr_clear)(struct cphy *phy);
- int (*intr_handler)(struct cphy *phy);
+ int (*intr_enable)(struct cphy *phy);
+ int (*intr_disable)(struct cphy *phy);
+ int (*intr_clear)(struct cphy *phy);
+ int (*intr_handler)(struct cphy *phy);
- int (*autoneg_enable)(struct cphy *phy);
- int (*autoneg_restart)(struct cphy *phy);
+ int (*autoneg_enable)(struct cphy *phy);
+ int (*autoneg_restart)(struct cphy *phy);
- int (*advertise)(struct cphy *phy, unsigned int advertise_map);
- int (*set_loopback)(struct cphy *phy, int mmd, int dir, int enable);
- int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
- int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
- int *duplex, int *fc);
- int (*power_down)(struct cphy *phy, int enable);
+ int (*advertise)(struct cphy *phy, unsigned int advertise_map);
+ int (*set_loopback)(struct cphy *phy, int mmd, int dir, int enable);
+ int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
+ int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
+ int *duplex, int *fc);
+ int (*power_down)(struct cphy *phy, int enable);
};
/* A PHY instance */
struct cphy {
- int addr; /* PHY address */
- adapter_t *adapter; /* associated adapter */
- unsigned long fifo_errors; /* FIFO over/under-flows */
- const struct cphy_ops *ops; /* PHY operations */
- int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
- int reg_addr, unsigned int *val);
- int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
- int reg_addr, unsigned int val);
+ int addr; /* PHY address */
+ adapter_t *adapter; /* associated adapter */
+ unsigned long fifo_errors; /* FIFO over/under-flows */
+ const struct cphy_ops *ops; /* PHY operations */
+ int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
+ int reg_addr, unsigned int *val);
+ int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
+ int reg_addr, unsigned int val);
};
/* Convenience MDIO read/write wrappers */
static inline int mdio_read(struct cphy *phy, int mmd, int reg,
- unsigned int *valp)
+ unsigned int *valp)
{
return phy->mdio_read(phy->adapter, phy->addr, mmd, reg, valp);
}
static inline int mdio_write(struct cphy *phy, int mmd, int reg,
- unsigned int val)
+ unsigned int val)
{
return phy->mdio_write(phy->adapter, phy->addr, mmd, reg, val);
}
/* Convenience initializer */
static inline void cphy_init(struct cphy *phy, adapter_t *adapter,
- int phy_addr, struct cphy_ops *phy_ops,
- const struct mdio_ops *mdio_ops)
+ int phy_addr, struct cphy_ops *phy_ops,
+ const struct mdio_ops *mdio_ops)
{
- phy->adapter = adapter;
- phy->addr = phy_addr;
- phy->ops = phy_ops;
- if (mdio_ops) {
- phy->mdio_read = mdio_ops->read;
- phy->mdio_write = mdio_ops->write;
- }
+ phy->adapter = adapter;
+ phy->addr = phy_addr;
+ phy->ops = phy_ops;
+ if (mdio_ops) {
+ phy->mdio_read = mdio_ops->read;
+ phy->mdio_write = mdio_ops->write;
+ }
}
/* Accumulate MAC statistics every 180 seconds. For 1G we multiply by 10. */
#define MAC_STATS_ACCUM_SECS 180
+/* The external MAC needs accumulation every 30 seconds */
+#define VSC_STATS_ACCUM_SECS 30
+
#define XGM_REG(reg_addr, idx) \
- ((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR))
+ ((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR))
struct addr_val_pair {
- unsigned int reg_addr;
- unsigned int val;
+ unsigned int reg_addr;
+ unsigned int val;
};
#ifdef CONFIG_DEFINED
#include <cxgb_adapter.h>
#else
-#ifdef __FreeBSD
+#ifdef __FreeBSD__
#include <dev/cxgb/cxgb_adapter.h>
#endif
#ifdef __NetBSD__
@@ -562,26 +602,60 @@ struct addr_val_pair {
#endif
#define for_each_port(adapter, iter) \
- for (iter = 0; iter < (adapter)->params.nports; ++iter)
+ for (iter = 0; iter < (adapter)->params.nports; ++iter)
+
+#define adapter_info(adap) ((adap)->params.info)
+
+static inline int uses_xaui(const adapter_t *adap)
+{
+ return adapter_info(adap)->caps & SUPPORTED_AUI;
+}
+
+static inline int is_10G(const adapter_t *adap)
+{
+ return adapter_info(adap)->caps & SUPPORTED_10000baseT_Full;
+}
+
+static inline int is_offload(const adapter_t *adap)
+{
+#ifdef CONFIG_CHELSIO_T3_CORE
+ return adap->params.offload;
+#else
+ return 0;
+#endif
+}
+
+static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
+{
+ return adap->params.vpd.cclk / 1000;
+}
+
+static inline unsigned int dack_ticks_to_usec(const adapter_t *adap,
+ unsigned int ticks)
+{
+ return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
+}
+
+static inline unsigned int is_pcie(const adapter_t *adap)
+{
+ return adap->params.pci.variant == PCI_VARIANT_PCIE;
+}
void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);
-void t3_read_indirect(adapter_t *adap, unsigned int addr_reg,
- unsigned int data_reg, u32 *vals, unsigned int nregs,
- unsigned int start_idx);
void t3_write_regs(adapter_t *adapter, const struct addr_val_pair *p, int n,
- unsigned int offset);
+ unsigned int offset);
int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
- int attempts, int delay, u32 *valp);
+ int attempts, int delay, u32 *valp);
static inline int t3_wait_op_done(adapter_t *adapter, int reg, u32 mask,
- int polarity, int attempts, int delay)
+ int polarity, int attempts, int delay)
{
- return t3_wait_op_done_val(adapter, reg, mask, polarity, attempts,
- delay, NULL);
+ return t3_wait_op_done_val(adapter, reg, mask, polarity, attempts,
+ delay, NULL);
}
int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
- unsigned int set);
+ unsigned int set);
int t3_phy_reset(struct cphy *phy, int mmd, int wait);
int t3_phy_advertise(struct cphy *phy, unsigned int advert);
int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex);
@@ -602,29 +676,33 @@ int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data);
int t3_seeprom_wp(adapter_t *adapter, int enable);
int t3_read_flash(adapter_t *adapter, unsigned int addr, unsigned int nwords,
- u32 *data, int byte_oriented);
-int t3_load_fw(adapter_t *adapter, const u8 *fw_data, unsigned int size);
+ u32 *data, int byte_oriented);
+int t3_get_tp_version(adapter_t *adapter, u32 *vers);
+int t3_check_tpsram_version(adapter_t *adapter);
+int t3_check_tpsram(adapter_t *adapter, const u8 *tp_ram, unsigned int size);
+int t3_load_fw(adapter_t *adapter, const const u8 *fw_data, unsigned int size);
int t3_get_fw_version(adapter_t *adapter, u32 *vers);
int t3_check_fw_version(adapter_t *adapter);
int t3_init_hw(adapter_t *adapter, u32 fw_params);
void mac_prep(struct cmac *mac, adapter_t *adapter, int index);
void early_hw_init(adapter_t *adapter, const struct adapter_info *ai);
-int t3_reset_adapter(adapter_t *adapter);
int t3_prep_adapter(adapter_t *adapter, const struct adapter_info *ai, int reset);
void t3_led_ready(adapter_t *adapter);
void t3_fatal_err(adapter_t *adapter);
void t3_set_vlan_accel(adapter_t *adapter, unsigned int ports, int on);
+void t3_enable_filters(adapter_t *adap);
void t3_config_rss(adapter_t *adapter, unsigned int rss_config, const u8 *cpus,
- const u16 *rspq);
+ const u16 *rspq);
int t3_read_rss(adapter_t *adapter, u8 *lkup, u16 *map);
+int t3_set_proto_sram(adapter_t *adap, const u8 *data);
int t3_mps_set_active_ports(adapter_t *adap, unsigned int port_mask);
void t3_port_failover(adapter_t *adapter, int port);
void t3_failover_done(adapter_t *adapter, int port);
void t3_failover_clear(adapter_t *adapter);
int t3_cim_ctl_blk_read(adapter_t *adap, unsigned int addr, unsigned int n,
- unsigned int *valp);
+ unsigned int *valp);
int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
- u64 *buf);
+ u64 *buf);
int t3_mac_reset(struct cmac *mac);
void t3b_pcs_reset(struct cmac *mac);
@@ -633,18 +711,18 @@ int t3_mac_disable(struct cmac *mac, int which);
int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu);
int t3_mac_set_rx_mode(struct cmac *mac, struct t3_rx_mode *rm);
int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6]);
-int t3_mac_set_num_ucast(struct cmac *mac, int n);
+int t3_mac_set_num_ucast(struct cmac *mac, unsigned char n);
const struct mac_stats *t3_mac_update_stats(struct cmac *mac);
int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex,
- int fc);
+ int fc);
int t3b2_mac_watchdog_task(struct cmac *mac);
void t3_mc5_prep(adapter_t *adapter, struct mc5 *mc5, int mode);
int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters,
- unsigned int nroutes);
+ unsigned int nroutes);
void t3_mc5_intr_handler(struct mc5 *mc5);
int t3_read_mc5_range(const struct mc5 *mc5, unsigned int start, unsigned int n,
- u32 *buf);
+ u32 *buf);
#ifdef CONFIG_CHELSIO_T3_CORE
int t3_tp_set_coalescing_size(adapter_t *adap, unsigned int size, int psh);
@@ -653,36 +731,36 @@ void t3_tp_set_offload_mode(adapter_t *adap, int enable);
void t3_tp_get_mib_stats(adapter_t *adap, struct tp_mib_stats *tps);
void t3_load_mtus(adapter_t *adap, unsigned short mtus[NMTUS],
unsigned short alpha[NCCTRL_WIN],
- unsigned short beta[NCCTRL_WIN], unsigned short mtu_cap);
+ unsigned short beta[NCCTRL_WIN], unsigned short mtu_cap);
void t3_read_hw_mtus(adapter_t *adap, unsigned short mtus[NMTUS]);
void t3_get_cong_cntl_tab(adapter_t *adap,
- unsigned short incr[NMTUS][NCCTRL_WIN]);
+ unsigned short incr[NMTUS][NCCTRL_WIN]);
void t3_config_trace_filter(adapter_t *adapter, const struct trace_params *tp,
- int filter_index, int invert, int enable);
+ int filter_index, int invert, int enable);
int t3_config_sched(adapter_t *adap, unsigned int kbps, int sched);
int t3_set_sched_ipg(adapter_t *adap, int sched, unsigned int ipg);
void t3_get_tx_sched(adapter_t *adap, unsigned int sched, unsigned int *kbps,
- unsigned int *ipg);
+ unsigned int *ipg);
void t3_read_pace_tbl(adapter_t *adap, unsigned int pace_vals[NTX_SCHED]);
void t3_set_pace_tbl(adapter_t *adap, unsigned int *pace_vals,
- unsigned int start, unsigned int n);
+ unsigned int start, unsigned int n);
#endif
void t3_sge_prep(adapter_t *adap, struct sge_params *p);
void t3_sge_init(adapter_t *adap, struct sge_params *p);
int t3_sge_init_ecntxt(adapter_t *adapter, unsigned int id, int gts_enable,
- enum sge_context_type type, int respq, u64 base_addr,
- unsigned int size, unsigned int token, int gen,
- unsigned int cidx);
+ enum sge_context_type type, int respq, u64 base_addr,
+ unsigned int size, unsigned int token, int gen,
+ unsigned int cidx);
int t3_sge_init_flcntxt(adapter_t *adapter, unsigned int id, int gts_enable,
- u64 base_addr, unsigned int size, unsigned int esize,
- unsigned int cong_thres, int gen, unsigned int cidx);
+ u64 base_addr, unsigned int size, unsigned int esize,
+ unsigned int cong_thres, int gen, unsigned int cidx);
int t3_sge_init_rspcntxt(adapter_t *adapter, unsigned int id, int irq_vec_idx,
- u64 base_addr, unsigned int size,
- unsigned int fl_thres, int gen, unsigned int cidx);
+ u64 base_addr, unsigned int size,
+ unsigned int fl_thres, int gen, unsigned int cidx);
int t3_sge_init_cqcntxt(adapter_t *adapter, unsigned int id, u64 base_addr,
- unsigned int size, int rspq, int ovfl_mode,
- unsigned int credits, unsigned int credit_thres);
+ unsigned int size, int rspq, int ovfl_mode,
+ unsigned int credits, unsigned int credit_thres);
int t3_sge_enable_ecntxt(adapter_t *adapter, unsigned int id, int enable);
int t3_sge_disable_fl(adapter_t *adapter, unsigned int id);
int t3_sge_disable_rspcntxt(adapter_t *adapter, unsigned int id);
@@ -692,18 +770,28 @@ int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4]);
int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4]);
int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4]);
int t3_sge_cqcntxt_op(adapter_t *adapter, unsigned int id, unsigned int op,
- unsigned int credits);
+ unsigned int credits);
+
+int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n);
+int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n);
+int t3_vsc7323_init(adapter_t *adap, int nports);
+int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port);
+int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port);
+int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port);
+int t3_vsc7323_enable(adapter_t *adap, int port, int which);
+int t3_vsc7323_disable(adapter_t *adap, int port, int which);
+const struct mac_stats *t3_vsc7323_update_stats(struct cmac *mac);
void t3_mv88e1xxx_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
- const struct mdio_ops *mdio_ops);
+ const struct mdio_ops *mdio_ops);
void t3_vsc8211_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
- const struct mdio_ops *mdio_ops);
+ const struct mdio_ops *mdio_ops);
void t3_ael1002_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
- const struct mdio_ops *mdio_ops);
+ const struct mdio_ops *mdio_ops);
void t3_ael1006_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
- const struct mdio_ops *mdio_ops);
+ const struct mdio_ops *mdio_ops);
void t3_qt2045_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
- const struct mdio_ops *mdio_ops);
+ const struct mdio_ops *mdio_ops);
void t3_xaui_direct_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
- const struct mdio_ops *mdio_ops);
+ const struct mdio_ops *mdio_ops);
#endif /* __CHELSIO_COMMON_H */
diff --git a/sys/dev/pci/cxgb_config.h b/sys/dev/pci/cxgb_config.h
index a609c72987e..112a1588747 100644
--- a/sys/dev/pci/cxgb_config.h
+++ b/sys/dev/pci/cxgb_config.h
@@ -26,7 +26,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/cxgb_config.h,v 1.3 2007/05/25 09:48:19 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/cxgb_config.h,v 1.4 2007/06/13 05:35:59 kmacy Exp $
***************************************************************************/
#ifndef _CXGB_CONFIG_H_
@@ -34,7 +34,6 @@ $FreeBSD: src/sys/dev/cxgb/cxgb_config.h,v 1.3 2007/05/25 09:48:19 kmacy Exp $
#ifndef CONFIG_DEFINED
#define CONFIG_CHELSIO_T3_CORE
-#define DEFAULT_JUMBO
#endif
#endif
diff --git a/sys/dev/pci/cxgb_ctl_defs.h b/sys/dev/pci/cxgb_ctl_defs.h
index 9dd595fec8d..b92366267c3 100644
--- a/sys/dev/pci/cxgb_ctl_defs.h
+++ b/sys/dev/pci/cxgb_ctl_defs.h
@@ -1,59 +1,63 @@
/*
- * Copyright (C) 2003-2007 Chelsio Communications. All rights reserved.
+ * Copyright (C) 2003-2006 Chelsio Communications. All rights reserved.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this
* release for licensing terms and conditions.
*
- * $FreeBSD: src/sys/dev/cxgb/common/cxgb_ctl_defs.h,v 1.1 2007/05/25 18:29:17 kmacy Exp $
+ * $FreeBSD: src/sys/dev/cxgb/common/cxgb_ctl_defs.h,v 1.3 2007/09/09 01:28:03 kmacy Exp $
*/
#ifndef _CXGB3_OFFLOAD_CTL_DEFS_H
#define _CXGB3_OFFLOAD_CTL_DEFS_H
-
enum {
- GET_MAX_OUTSTANDING_WR,
- GET_TX_MAX_CHUNK,
- GET_TID_RANGE,
- GET_STID_RANGE,
- GET_RTBL_RANGE,
- GET_L2T_CAPACITY,
- GET_MTUS,
- GET_WR_LEN,
- GET_IFF_FROM_MAC,
- GET_DDP_PARAMS,
- GET_PORTS,
- FAILOVER,
- FAILOVER_DONE,
- FAILOVER_CLEAR,
-
- ULP_ISCSI_GET_PARAMS,
- ULP_ISCSI_SET_PARAMS,
-
- RDMA_GET_PARAMS,
- RDMA_CQ_OP,
- RDMA_CQ_SETUP,
- RDMA_CQ_DISABLE,
- RDMA_CTRL_QP_SETUP,
- RDMA_GET_MEM,
+ GET_MAX_OUTSTANDING_WR,
+ GET_TX_MAX_CHUNK,
+ GET_TID_RANGE,
+ GET_STID_RANGE,
+ GET_RTBL_RANGE,
+ GET_L2T_CAPACITY,
+ GET_MTUS,
+ GET_WR_LEN,
+ GET_IFF_FROM_MAC,
+ GET_DDP_PARAMS,
+ GET_PORTS,
+
+ ULP_ISCSI_GET_PARAMS,
+ ULP_ISCSI_SET_PARAMS,
+
+ RDMA_GET_PARAMS,
+ RDMA_CQ_OP,
+ RDMA_CQ_SETUP,
+ RDMA_CQ_DISABLE,
+ RDMA_CTRL_QP_SETUP,
+ RDMA_GET_MEM,
+
+ FAILOVER = 30,
+ FAILOVER_DONE = 31,
+ FAILOVER_CLEAR = 32,
+
+ GET_CPUIDX_OF_QSET = 40,
+
+ GET_RX_PAGE_INFO = 50,
};
/*
* Structure used to describe a TID range. Valid TIDs are [base, base+num).
*/
struct tid_range {
- unsigned int base; /* first TID */
- unsigned int num; /* number of TIDs in range */
+ unsigned int base; /* first TID */
+ unsigned int num; /* number of TIDs in range */
};
/*
* Structure used to request the size and contents of the MTU table.
*/
struct mtutab {
- unsigned int size; /* # of entries in the MTU table */
- const unsigned short *mtus; /* the MTU table values */
+ unsigned int size; /* # of entries in the MTU table */
+ const unsigned short *mtus; /* the MTU table values */
};
struct net_device;
@@ -62,9 +66,9 @@ struct net_device;
* Structure used to request the adapter net_device owning a given MAC address.
*/
struct iff_mac {
- struct net_device *dev; /* the net_device */
- const unsigned char *mac_addr; /* MAC address to lookup */
- u16 vlan_tag;
+ struct net_device *dev; /* the net_device */
+ const unsigned char *mac_addr; /* MAC address to lookup */
+ u16 vlan_tag;
};
struct pci_dev;
@@ -73,76 +77,84 @@ struct pci_dev;
* Structure used to request the TCP DDP parameters.
*/
struct ddp_params {
- unsigned int llimit; /* TDDP region start address */
- unsigned int ulimit; /* TDDP region end address */
- unsigned int tag_mask; /* TDDP tag mask */
- struct pci_dev *pdev;
+ unsigned int llimit; /* TDDP region start address */
+ unsigned int ulimit; /* TDDP region end address */
+ unsigned int tag_mask; /* TDDP tag mask */
+ struct pci_dev *pdev;
};
struct adap_ports {
- unsigned int nports; /* number of ports on this adapter */
- struct ifnet *lldevs[4];
+ unsigned int nports; /* number of ports on this adapter */
+ struct net_device *lldevs[2];
};
/*
* Structure used to return information to the iscsi layer.
*/
struct ulp_iscsi_info {
- unsigned int offset;
- unsigned int llimit;
- unsigned int ulimit;
- unsigned int tagmask;
- unsigned int pgsz3;
- unsigned int pgsz2;
- unsigned int pgsz1;
- unsigned int pgsz0;
- unsigned int max_rxsz;
- unsigned int max_txsz;
- struct pci_dev *pdev;
+ unsigned int offset;
+ unsigned int llimit;
+ unsigned int ulimit;
+ unsigned int tagmask;
+ unsigned int pgsz3;
+ unsigned int pgsz2;
+ unsigned int pgsz1;
+ unsigned int pgsz0;
+ unsigned int max_rxsz;
+ unsigned int max_txsz;
+ struct pci_dev *pdev;
+};
+
+/*
+ * Offload TX/RX page information.
+ */
+struct ofld_page_info {
+ unsigned int page_size; /* Page size, should be a power of 2 */
+ unsigned int num; /* Number of pages */
};
/*
* Structure used to return information to the RDMA layer.
*/
struct rdma_info {
- unsigned int tpt_base; /* TPT base address */
- unsigned int tpt_top; /* TPT last entry address */
- unsigned int pbl_base; /* PBL base address */
- unsigned int pbl_top; /* PBL last entry address */
- unsigned int rqt_base; /* RQT base address */
- unsigned int rqt_top; /* RQT last entry address */
- unsigned int udbell_len; /* user doorbell region length */
- unsigned long udbell_physbase; /* user doorbell physical start addr */
- void volatile *kdb_addr; /* kernel doorbell register address */
- struct pci_dev *pdev; /* associated PCI device */
+ unsigned int tpt_base; /* TPT base address */
+ unsigned int tpt_top; /* TPT last entry address */
+ unsigned int pbl_base; /* PBL base address */
+ unsigned int pbl_top; /* PBL last entry address */
+ unsigned int rqt_base; /* RQT base address */
+ unsigned int rqt_top; /* RQT last entry address */
+ unsigned int udbell_len; /* user doorbell region length */
+ unsigned long udbell_physbase; /* user doorbell physical start addr */
+ void volatile *kdb_addr; /* kernel doorbell register address */
+ struct pci_dev *pdev; /* associated PCI device */
};
/*
* Structure used to request an operation on an RDMA completion queue.
*/
struct rdma_cq_op {
- unsigned int id;
- unsigned int op;
- unsigned int credits;
+ unsigned int id;
+ unsigned int op;
+ unsigned int credits;
};
/*
* Structure used to setup RDMA completion queues.
*/
struct rdma_cq_setup {
- unsigned int id;
- unsigned long long base_addr;
- unsigned int size;
- unsigned int credits;
- unsigned int credit_thres;
- unsigned int ovfl_mode;
+ unsigned int id;
+ unsigned long long base_addr;
+ unsigned int size;
+ unsigned int credits;
+ unsigned int credit_thres;
+ unsigned int ovfl_mode;
};
/*
* Structure used to setup the RDMA control egress context.
*/
struct rdma_ctrlqp_setup {
- unsigned long long base_addr;
- unsigned int size;
+ unsigned long long base_addr;
+ unsigned int size;
};
#endif /* _CXGB3_OFFLOAD_CTL_DEFS_H */
diff --git a/sys/dev/pci/cxgb_firmware_exports.h b/sys/dev/pci/cxgb_firmware_exports.h
index a34655a6cf1..a4118ae3974 100644
--- a/sys/dev/pci/cxgb_firmware_exports.h
+++ b/sys/dev/pci/cxgb_firmware_exports.h
@@ -33,65 +33,65 @@ $FreeBSD: src/sys/dev/cxgb/common/cxgb_firmware_exports.h,v 1.2 2007/05/28 22:57
/* WR OPCODES supported by the firmware.
*/
-#define FW_WROPCODE_FORWARD 0x01
-#define FW_WROPCODE_BYPASS 0x05
-
-#define FW_WROPCODE_TUNNEL_TX_PKT 0x03
-
-#define FW_WROPOCDE_ULPTX_DATA_SGL 0x00
-#define FW_WROPCODE_ULPTX_MEM_READ 0x02
-#define FW_WROPCODE_ULPTX_PKT 0x04
-#define FW_WROPCODE_ULPTX_INVALIDATE 0x06
-
-#define FW_WROPCODE_TUNNEL_RX_PKT 0x07
-
-#define FW_WROPCODE_OFLD_GETTCB_RPL 0x08
-#define FW_WROPCODE_OFLD_CLOSE_CON 0x09
-#define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ 0x0A
-#define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL 0x0F
-#define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ 0x0B
-#define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL 0x0C
-#define FW_WROPCODE_OFLD_TX_DATA 0x0D
-#define FW_WROPCODE_OFLD_TX_DATA_ACK 0x0E
-
-#define FW_WROPCODE_RI_RDMA_INIT 0x10
-#define FW_WROPCODE_RI_RDMA_WRITE 0x11
-#define FW_WROPCODE_RI_RDMA_READ_REQ 0x12
-#define FW_WROPCODE_RI_RDMA_READ_RESP 0x13
-#define FW_WROPCODE_RI_SEND 0x14
-#define FW_WROPCODE_RI_TERMINATE 0x15
-#define FW_WROPCODE_RI_RDMA_READ 0x16
-#define FW_WROPCODE_RI_RECEIVE 0x17
-#define FW_WROPCODE_RI_BIND_MW 0x18
-#define FW_WROPCODE_RI_FASTREGISTER_MR 0x19
-#define FW_WROPCODE_RI_LOCAL_INV 0x1A
-#define FW_WROPCODE_RI_MODIFY_QP 0x1B
-#define FW_WROPCODE_RI_BYPASS 0x1C
-
-#define FW_WROPOCDE_RSVD 0x1E
-
-#define FW_WROPCODE_SGE_EGRESSCONTEXT_RR 0x1F
-
-#define FW_WROPCODE_MNGT 0x1D
-#define FW_MNGTOPCODE_PKTSCHED_SET 0x00
+#define FW_WROPCODE_FORWARD 0x01
+#define FW_WROPCODE_BYPASS 0x05
+
+#define FW_WROPCODE_TUNNEL_TX_PKT 0x03
+
+#define FW_WROPOCDE_ULPTX_DATA_SGL 0x00
+#define FW_WROPCODE_ULPTX_MEM_READ 0x02
+#define FW_WROPCODE_ULPTX_PKT 0x04
+#define FW_WROPCODE_ULPTX_INVALIDATE 0x06
+
+#define FW_WROPCODE_TUNNEL_RX_PKT 0x07
+
+#define FW_WROPCODE_OFLD_GETTCB_RPL 0x08
+#define FW_WROPCODE_OFLD_CLOSE_CON 0x09
+#define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ 0x0A
+#define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL 0x0F
+#define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ 0x0B
+#define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL 0x0C
+#define FW_WROPCODE_OFLD_TX_DATA 0x0D
+#define FW_WROPCODE_OFLD_TX_DATA_ACK 0x0E
+
+#define FW_WROPCODE_RI_RDMA_INIT 0x10
+#define FW_WROPCODE_RI_RDMA_WRITE 0x11
+#define FW_WROPCODE_RI_RDMA_READ_REQ 0x12
+#define FW_WROPCODE_RI_RDMA_READ_RESP 0x13
+#define FW_WROPCODE_RI_SEND 0x14
+#define FW_WROPCODE_RI_TERMINATE 0x15
+#define FW_WROPCODE_RI_RDMA_READ 0x16
+#define FW_WROPCODE_RI_RECEIVE 0x17
+#define FW_WROPCODE_RI_BIND_MW 0x18
+#define FW_WROPCODE_RI_FASTREGISTER_MR 0x19
+#define FW_WROPCODE_RI_LOCAL_INV 0x1A
+#define FW_WROPCODE_RI_MODIFY_QP 0x1B
+#define FW_WROPCODE_RI_BYPASS 0x1C
+
+#define FW_WROPOCDE_RSVD 0x1E
+
+#define FW_WROPCODE_SGE_EGRESSCONTEXT_RR 0x1F
+
+#define FW_WROPCODE_MNGT 0x1D
+#define FW_MNGTOPCODE_PKTSCHED_SET 0x00
/* Maximum size of a WR sent from the host, limited by the SGE.
*
* Note: WR coming from ULP or TP are only limited by CIM.
*/
-#define FW_WR_SIZE 128
+#define FW_WR_SIZE 128
/* Maximum number of outstanding WRs sent from the host. Value must be
* programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
* offload modules to limit the number of WRs per connection.
*/
-#define FW_T3_WR_NUM 16
-#define FW_N3_WR_NUM 7
+#define FW_T3_WR_NUM 16
+#define FW_N3_WR_NUM 7
#ifndef N3
-# define FW_WR_NUM FW_T3_WR_NUM
+# define FW_WR_NUM FW_T3_WR_NUM
#else
-# define FW_WR_NUM FW_N3_WR_NUM
+# define FW_WR_NUM FW_N3_WR_NUM
#endif
/* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
@@ -101,9 +101,9 @@ $FreeBSD: src/sys/dev/cxgb/common/cxgb_firmware_exports.h,v 1.2 2007/05/28 22:57
* Ingress Traffic (e.g. DMA completion credit) for TUNNEL Queue[i] is sent
* to RESP Queue[i].
*/
-#define FW_TUNNEL_NUM 8
-#define FW_TUNNEL_SGEEC_START 8
-#define FW_TUNNEL_TID_START 65544
+#define FW_TUNNEL_NUM 8
+#define FW_TUNNEL_SGEEC_START 8
+#define FW_TUNNEL_TID_START 65544
/* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
@@ -112,9 +112,9 @@ $FreeBSD: src/sys/dev/cxgb/common/cxgb_firmware_exports.h,v 1.2 2007/05/28 22:57
*
* Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
*/
-#define FW_CTRL_NUM 8
-#define FW_CTRL_SGEEC_START 65528
-#define FW_CTRL_TID_START 65536
+#define FW_CTRL_NUM 8
+#define FW_CTRL_SGEEC_START 65528
+#define FW_CTRL_TID_START 65536
/* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
* queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
@@ -125,53 +125,53 @@ $FreeBSD: src/sys/dev/cxgb/common/cxgb_firmware_exports.h,v 1.2 2007/05/28 22:57
*
* Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
*/
-#define FW_OFLD_NUM 8
-#define FW_OFLD_SGEEC_START 0
+#define FW_OFLD_NUM 8
+#define FW_OFLD_SGEEC_START 0
/*
*
*/
-#define FW_RI_NUM 1
-#define FW_RI_SGEEC_START 65527
-#define FW_RI_TID_START 65552
+#define FW_RI_NUM 1
+#define FW_RI_SGEEC_START 65527
+#define FW_RI_TID_START 65552
/*
* The RX_PKT_TID
*/
-#define FW_RX_PKT_NUM 1
-#define FW_RX_PKT_TID_START 65553
+#define FW_RX_PKT_NUM 1
+#define FW_RX_PKT_TID_START 65553
/* FW_WRC_NUM corresponds to the number of Work Request Context that supported
* by the firmware.
*/
-#define FW_WRC_NUM \
+#define FW_WRC_NUM \
(65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)
/*
* FW type and version.
*/
-#define S_FW_VERSION_TYPE 28
-#define M_FW_VERSION_TYPE 0xF
-#define V_FW_VERSION_TYPE(x) ((x) << S_FW_VERSION_TYPE)
-#define G_FW_VERSION_TYPE(x) \
+#define S_FW_VERSION_TYPE 28
+#define M_FW_VERSION_TYPE 0xF
+#define V_FW_VERSION_TYPE(x) ((x) << S_FW_VERSION_TYPE)
+#define G_FW_VERSION_TYPE(x) \
(((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)
-#define S_FW_VERSION_MAJOR 16
-#define M_FW_VERSION_MAJOR 0xFFF
-#define V_FW_VERSION_MAJOR(x) ((x) << S_FW_VERSION_MAJOR)
-#define G_FW_VERSION_MAJOR(x) \
+#define S_FW_VERSION_MAJOR 16
+#define M_FW_VERSION_MAJOR 0xFFF
+#define V_FW_VERSION_MAJOR(x) ((x) << S_FW_VERSION_MAJOR)
+#define G_FW_VERSION_MAJOR(x) \
(((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)
-#define S_FW_VERSION_MINOR 8
-#define M_FW_VERSION_MINOR 0xFF
-#define V_FW_VERSION_MINOR(x) ((x) << S_FW_VERSION_MINOR)
-#define G_FW_VERSION_MINOR(x) \
+#define S_FW_VERSION_MINOR 8
+#define M_FW_VERSION_MINOR 0xFF
+#define V_FW_VERSION_MINOR(x) ((x) << S_FW_VERSION_MINOR)
+#define G_FW_VERSION_MINOR(x) \
(((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)
-#define S_FW_VERSION_MICRO 0
-#define M_FW_VERSION_MICRO 0xFF
-#define V_FW_VERSION_MICRO(x) ((x) << S_FW_VERSION_MICRO)
-#define G_FW_VERSION_MICRO(x) \
+#define S_FW_VERSION_MICRO 0
+#define M_FW_VERSION_MICRO 0xFF
+#define V_FW_VERSION_MICRO(x) ((x) << S_FW_VERSION_MICRO)
+#define G_FW_VERSION_MICRO(x) \
(((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)
#endif /* _FIRMWARE_EXPORTS_H_ */
diff --git a/sys/dev/pci/cxgb_include.h b/sys/dev/pci/cxgb_include.h
index fdbf5d95c32..942e62aa438 100644
--- a/sys/dev/pci/cxgb_include.h
+++ b/sys/dev/pci/cxgb_include.h
@@ -1,61 +1,10 @@
/*
- * $FreeBSD: src/sys/dev/cxgb/cxgb_include.h,v 1.1 2007/05/28 22:57:26 kmacy Exp $
+ * $NetBSD
*/
#ifndef __CHELSIO_INCLUDE_H
#define __CHELSIO_INCLUDE_H
-#ifdef __FreeBSD__
-#ifdef CONFIG_DEFINED
-#include <cxgb_osdep.h>
-#include <common/cxgb_common.h>
-#include <cxgb_ioctl.h>
-#include <cxgb_offload.h>
-#include <common/cxgb_regs.h>
-#include <common/cxgb_t3_cpl.h>
-#include <dev/cxgb/common/cxgb_ctl_defs.h>
-#include <dev/cxgb/common/cxgb_sge_defs.h>
-#include <common/cxgb_firmware_exports.h>
-#include <sys/mvec.h>
-#include <ulp/toecore/toedev.h>
-#include <sys/mbufq.h>
-#include <common/jhash.h>
-
-
-#else
-#include <dev/cxgb/cxgb_osdep.h>
-#include <dev/cxgb/common/cxgb_common.h>
-#include <dev/cxgb/cxgb_ioctl.h>
-#include <dev/cxgb/cxgb_offload.h>
-#include <dev/cxgb/common/cxgb_regs.h>
-#include <dev/cxgb/common/cxgb_t3_cpl.h>
-#include <dev/cxgb/common/cxgb_ctl_defs.h>
-#include <dev/cxgb/common/cxgb_sge_defs.h>
-#include <dev/cxgb/common/cxgb_firmware_exports.h>
-
-#include <dev/cxgb/sys/mvec.h>
-#include <dev/cxgb/ulp/toecore/toedev.h>
-#include <dev/cxgb/sys/mbufq.h>
-#include <dev/cxgb/common/jhash.h>
-#endif
-#endif
-
-#ifdef __NetBSD__
-#ifdef CONFIG_DEFINED
-#include <dev/pci/cxgb_osdep.h>
-#include <dev/pci/cxgb_common.h>
-#include <dev/pci/cxgb_ioctl.h>
-#include <dev/pci/cxgb_offload.h>
-#include <dev/pci/cxgb_regs.h>
-#include <dev/pci/cxgb_t3_cpl.h>
-#include <dev/pci/cxgb_ctl_defs.h>
-#include <dev/pci/cxgb_sge_defs.h>
-#include <dev/pci/cxgb_firmware_exports.h>
-// #include <sys/mvec.h>
-#include "toedev.h"
-#include "cxgb_mbuf.h"
-#include <dev/pci/jhash.h>
-#else
#include "cxgb_osdep.h"
#include "cxgb_mbuf.h"
#include "cxgb_common.h"
@@ -69,7 +18,5 @@
#include "cxgb_mvec.h"
#include "cxgb_toedev.h"
#include "cxgb_jhash.h"
-#endif
-#endif
#endif /* __CHELSIO_INCLUDE_H */
diff --git a/sys/dev/pci/cxgb_ioctl.h b/sys/dev/pci/cxgb_ioctl.h
index 8699a2eff19..56515ba8e7c 100644
--- a/sys/dev/pci/cxgb_ioctl.h
+++ b/sys/dev/pci/cxgb_ioctl.h
@@ -25,7 +25,7 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/cxgb_ioctl.h,v 1.3 2007/05/25 09:48:19 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/cxgb_ioctl.h,v 1.5 2007/08/17 05:57:03 kmacy Exp $
***************************************************************************/
#ifndef __CHIOCTL_H__
@@ -35,99 +35,124 @@ $FreeBSD: src/sys/dev/cxgb/cxgb_ioctl.h,v 1.3 2007/05/25 09:48:19 kmacy Exp $
* Ioctl commands specific to this driver.
*/
enum {
- CH_SETREG = 0x40,
- CH_GETREG,
- CH_SETTPI,
- CH_GETTPI,
- CH_DEVUP,
- CH_GETMTUTAB,
- CH_SETMTUTAB,
- CH_GETMTU,
- CH_SET_PM,
- CH_GET_PM,
- CH_GET_TCAM,
- CH_SET_TCAM,
- CH_GET_TCB,
- CH_READ_TCAM_WORD,
- CH_GET_MEM,
- CH_GET_SGE_CONTEXT,
- CH_GET_SGE_DESC,
- CH_LOAD_FW,
- CH_GET_PROTO,
- CH_SET_PROTO,
- CH_SET_TRACE_FILTER,
- CH_SET_QSET_PARAMS,
- CH_GET_QSET_PARAMS,
- CH_SET_QSET_NUM,
- CH_GET_QSET_NUM,
- CH_SET_PKTSCHED,
- CH_IFCONF_GETREGS,
- CH_GETMIIREGS,
- CH_SETMIIREGS,
- CH_SET_FILTER,
- CH_SET_HW_SCHED,
+ CH_SETREG = 0x40,
+ CH_GETREG,
+ CH_SETTPI,
+ CH_GETTPI,
+ CH_DEVUP,
+ CH_GETMTUTAB,
+ CH_SETMTUTAB,
+ CH_GETMTU,
+ CH_SET_PM,
+ CH_GET_PM,
+ CH_GET_TCAM,
+ CH_SET_TCAM,
+ CH_GET_TCB,
+ CH_READ_TCAM_WORD,
+ CH_GET_MEM,
+ CH_GET_SGE_CONTEXT,
+ CH_GET_SGE_DESC,
+ CH_LOAD_FW,
+ CH_GET_PROTO,
+ CH_SET_PROTO,
+ CH_SET_TRACE_FILTER,
+ CH_SET_QSET_PARAMS,
+ CH_GET_QSET_PARAMS,
+ CH_SET_QSET_NUM,
+ CH_GET_QSET_NUM,
+ CH_SET_PKTSCHED,
+ CH_IFCONF_GETREGS,
+ CH_GETMIIREGS,
+ CH_SETMIIREGS,
+ CH_SET_FILTER,
+ CH_SET_HW_SCHED,
+ CH_DEL_FILTER,
};
struct ch_reg {
- uint32_t addr;
- uint32_t val;
+ uint32_t addr;
+ uint32_t val;
};
struct ch_cntxt {
- uint32_t cntxt_type;
- uint32_t cntxt_id;
- uint32_t data[4];
+ uint32_t cntxt_type;
+ uint32_t cntxt_id;
+ uint32_t data[4];
};
/* context types */
enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ };
struct ch_desc {
- uint32_t cmd;
- uint32_t queue_num;
- uint32_t idx;
- uint32_t size;
- uint8_t data[128];
+ uint32_t cmd;
+ uint32_t queue_num;
+ uint32_t idx;
+ uint32_t size;
+ uint8_t data[128];
};
struct ch_mem_range {
- uint32_t cmd;
- uint32_t mem_id;
- uint32_t addr;
- uint32_t len;
- uint32_t version;
- uint8_t *buf;
+ uint32_t cmd;
+ uint32_t mem_id;
+ uint32_t addr;
+ uint32_t len;
+ uint32_t version;
+ uint8_t *buf;
};
struct ch_qset_params {
- uint32_t qset_idx;
- int32_t txq_size[3];
- int32_t rspq_size;
- int32_t fl_size[2];
- int32_t intr_lat;
- int32_t polling;
- int32_t cong_thres;
- int32_t vector;
- int32_t qnum;
+ uint32_t qset_idx;
+ int32_t txq_size[3];
+ int32_t rspq_size;
+ int32_t fl_size[2];
+ int32_t intr_lat;
+ int32_t polling;
+ int32_t cong_thres;
+ int32_t vector;
+ int32_t qnum;
};
struct ch_pktsched_params {
- uint32_t cmd;
- uint8_t sched;
- uint8_t idx;
- uint8_t min;
- uint8_t max;
- uint8_t binding;
+ uint32_t cmd;
+ uint8_t sched;
+ uint8_t idx;
+ uint8_t min;
+ uint8_t max;
+ uint8_t binding;
};
struct ch_hw_sched {
- uint32_t cmd;
- uint8_t sched;
- int8_t mode;
- int8_t channel;
- int32_t kbps; /* rate in Kbps */
- int32_t class_ipg; /* tenths of nanoseconds */
- int32_t flow_ipg; /* usec */
+ uint32_t cmd;
+ uint8_t sched;
+ int8_t mode;
+ int8_t channel;
+ int32_t kbps; /* rate in Kbps */
+ int32_t class_ipg; /* tenths of nanoseconds */
+ uint32_t flow_ipg; /* usec */
+};
+
+struct ch_filter_tuple {
+ uint32_t sip;
+ uint32_t dip;
+ uint16_t sport;
+ uint16_t dport;
+ uint16_t vlan:12;
+ uint16_t vlan_prio:3;
+};
+
+struct ch_filter {
+ uint32_t cmd;
+ uint32_t filter_id;
+ struct ch_filter_tuple val;
+ struct ch_filter_tuple mask;
+ uint16_t mac_addr_idx;
+ uint8_t mac_hit:1;
+ uint8_t proto:2;
+
+ uint8_t want_filter_id:1; /* report filter TID instead of RSS hash */
+ uint8_t pass:1; /* whether to pass or drop packets */
+ uint8_t rss:1; /* use RSS or specified qset */
+ uint8_t qset;
};
#ifndef TCB_SIZE
@@ -140,76 +165,76 @@ struct ch_hw_sched {
enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */
struct ch_mtus {
- uint32_t cmd;
- uint32_t nmtus;
- uint16_t mtus[NMTUS];
+ uint32_t cmd;
+ uint32_t nmtus;
+ uint16_t mtus[NMTUS];
};
struct ch_pm {
- uint32_t cmd;
- uint32_t tx_pg_sz;
- uint32_t tx_num_pg;
- uint32_t rx_pg_sz;
- uint32_t rx_num_pg;
- uint32_t pm_total;
+ uint32_t cmd;
+ uint32_t tx_pg_sz;
+ uint32_t tx_num_pg;
+ uint32_t rx_pg_sz;
+ uint32_t rx_num_pg;
+ uint32_t pm_total;
};
struct ch_tcam {
- uint32_t cmd;
- uint32_t tcam_size;
- uint32_t nservers;
- uint32_t nroutes;
- uint32_t nfilters;
+ uint32_t cmd;
+ uint32_t tcam_size;
+ uint32_t nservers;
+ uint32_t nroutes;
+ uint32_t nfilters;
};
struct ch_tcb {
- uint32_t cmd;
- uint32_t tcb_index;
- uint32_t tcb_data[TCB_WORDS];
+ uint32_t cmd;
+ uint32_t tcb_index;
+ uint32_t tcb_data[TCB_WORDS];
};
struct ch_tcam_word {
- uint32_t cmd;
- uint32_t addr;
- uint32_t buf[3];
+ uint32_t cmd;
+ uint32_t addr;
+ uint32_t buf[3];
};
struct ch_trace {
- uint32_t cmd;
- uint32_t sip;
- uint32_t sip_mask;
- uint32_t dip;
- uint32_t dip_mask;
- uint16_t sport;
- uint16_t sport_mask;
- uint16_t dport;
- uint16_t dport_mask;
- uint32_t vlan:12,
- vlan_mask:12,
- intf:4,
- intf_mask:4;
- uint8_t proto;
- uint8_t proto_mask;
- uint8_t invert_match:1,
- config_tx:1,
- config_rx:1,
- trace_tx:1,
- trace_rx:1;
+ uint32_t cmd;
+ uint32_t sip;
+ uint32_t sip_mask;
+ uint32_t dip;
+ uint32_t dip_mask;
+ uint16_t sport;
+ uint16_t sport_mask;
+ uint16_t dport;
+ uint16_t dport_mask;
+ uint32_t vlan:12,
+ vlan_mask:12,
+ intf:4,
+ intf_mask:4;
+ uint8_t proto;
+ uint8_t proto_mask;
+ uint8_t invert_match:1,
+ config_tx:1,
+ config_rx:1,
+ trace_tx:1,
+ trace_rx:1;
};
#define REGDUMP_SIZE (4 * 1024)
struct ifconf_regs {
- uint32_t version;
- uint32_t len; /* bytes */
- uint8_t *data;
+ uint32_t version;
+ uint32_t len; /* bytes */
+ uint8_t *data;
};
struct mii_data {
- uint32_t phy_id;
- uint32_t reg_num;
- uint32_t val_in;
- uint32_t val_out;
+ uint32_t phy_id;
+ uint32_t reg_num;
+ uint32_t val_in;
+ uint32_t val_out;
};
#define CHELSIO_SETREG _IOW('f', CH_SETREG, struct ch_reg)
@@ -232,5 +257,7 @@ struct mii_data {
#define SIOCGMIIREG _IOWR('f', CH_GETMIIREGS, struct mii_data)
#define SIOCSMIIREG _IOWR('f', CH_SETMIIREGS, struct mii_data)
#define CHELSIO_SET_HW_SCHED _IOWR('f', CH_SET_HW_SCHED, struct ch_hw_sched)
+#define CHELSIO_SET_FILTER _IOW('f', CH_SET_FILTER, struct ch_filter)
+#define CHELSIO_DEL_FILTER _IOW('f', CH_DEL_FILTER, struct ch_filter)
#define CHELSIO_DEVUP _IO('f', CH_DEVUP)
#endif
diff --git a/sys/dev/pci/cxgb_jhash.h b/sys/dev/pci/cxgb_jhash.h
index bbe6e241b03..1177b94b049 100644
--- a/sys/dev/pci/cxgb_jhash.h
+++ b/sys/dev/pci/cxgb_jhash.h
@@ -32,7 +32,7 @@
}
/* The golden ration: an arbitrary value */
-#define JHASH_GOLDEN_RATIO 0x9e3779b9
+#define JHASH_GOLDEN_RATIO 0x9e3779b9
/* The most generic version, hashes an arbitrary sequence
* of bytes. No alignment or length assumptions are made about
@@ -40,42 +40,42 @@
*/
static inline u32 jhash(const void *key, u32 length, u32 initval)
{
- u32 a, b, c, len;
- const u8 *k = key;
-
- len = length;
- a = b = JHASH_GOLDEN_RATIO;
- c = initval;
-
- while (len >= 12) {
- a += (k[0] +((u32)k[1]<<8) +((u32)k[2]<<16) +((u32)k[3]<<24));
- b += (k[4] +((u32)k[5]<<8) +((u32)k[6]<<16) +((u32)k[7]<<24));
- c += (k[8] +((u32)k[9]<<8) +((u32)k[10]<<16)+((u32)k[11]<<24));
-
- __jhash_mix(a,b,c);
-
- k += 12;
- len -= 12;
- }
-
- c += length;
- switch (len) {
- case 11: c += ((u32)k[10]<<24);
- case 10: c += ((u32)k[9]<<16);
- case 9 : c += ((u32)k[8]<<8);
- case 8 : b += ((u32)k[7]<<24);
- case 7 : b += ((u32)k[6]<<16);
- case 6 : b += ((u32)k[5]<<8);
- case 5 : b += k[4];
- case 4 : a += ((u32)k[3]<<24);
- case 3 : a += ((u32)k[2]<<16);
- case 2 : a += ((u32)k[1]<<8);
- case 1 : a += k[0];
- };
-
- __jhash_mix(a,b,c);
-
- return c;
+ u32 a, b, c, len;
+ const u8 *k = key;
+
+ len = length;
+ a = b = JHASH_GOLDEN_RATIO;
+ c = initval;
+
+ while (len >= 12) {
+ a += (k[0] +((u32)k[1]<<8) +((u32)k[2]<<16) +((u32)k[3]<<24));
+ b += (k[4] +((u32)k[5]<<8) +((u32)k[6]<<16) +((u32)k[7]<<24));
+ c += (k[8] +((u32)k[9]<<8) +((u32)k[10]<<16)+((u32)k[11]<<24));
+
+ __jhash_mix(a,b,c);
+
+ k += 12;
+ len -= 12;
+ }
+
+ c += length;
+ switch (len) {
+ case 11: c += ((u32)k[10]<<24);
+ case 10: c += ((u32)k[9]<<16);
+ case 9 : c += ((u32)k[8]<<8);
+ case 8 : b += ((u32)k[7]<<24);
+ case 7 : b += ((u32)k[6]<<16);
+ case 6 : b += ((u32)k[5]<<8);
+ case 5 : b += k[4];
+ case 4 : a += ((u32)k[3]<<24);
+ case 3 : a += ((u32)k[2]<<16);
+ case 2 : a += ((u32)k[1]<<8);
+ case 1 : a += k[0];
+ };
+
+ __jhash_mix(a,b,c);
+
+ return c;
}
/* A special optimized version that handles 1 or more of u32s.
@@ -83,30 +83,30 @@ static inline u32 jhash(const void *key, u32 length, u32 initval)
*/
static inline u32 jhash2(u32 *k, u32 length, u32 initval)
{
- u32 a, b, c, len;
+ u32 a, b, c, len;
- a = b = JHASH_GOLDEN_RATIO;
- c = initval;
- len = length;
+ a = b = JHASH_GOLDEN_RATIO;
+ c = initval;
+ len = length;
- while (len >= 3) {
- a += k[0];
- b += k[1];
- c += k[2];
- __jhash_mix(a, b, c);
- k += 3; len -= 3;
- }
+ while (len >= 3) {
+ a += k[0];
+ b += k[1];
+ c += k[2];
+ __jhash_mix(a, b, c);
+ k += 3; len -= 3;
+ }
- c += length * 4;
+ c += length * 4;
- switch (len) {
- case 2 : b += k[1];
- case 1 : a += k[0];
- };
+ switch (len) {
+ case 2 : b += k[1];
+ case 1 : a += k[0];
+ };
- __jhash_mix(a,b,c);
+ __jhash_mix(a,b,c);
- return c;
+ return c;
}
@@ -118,23 +118,23 @@ static inline u32 jhash2(u32 *k, u32 length, u32 initval)
*/
static inline u32 jhash_3words(u32 a, u32 b, u32 c, u32 initval)
{
- a += JHASH_GOLDEN_RATIO;
- b += JHASH_GOLDEN_RATIO;
- c += initval;
+ a += JHASH_GOLDEN_RATIO;
+ b += JHASH_GOLDEN_RATIO;
+ c += initval;
- __jhash_mix(a, b, c);
+ __jhash_mix(a, b, c);
- return c;
+ return c;
}
static inline u32 jhash_2words(u32 a, u32 b, u32 initval)
{
- return jhash_3words(a, b, 0, initval);
+ return jhash_3words(a, b, 0, initval);
}
static inline u32 jhash_1word(u32 a, u32 initval)
{
- return jhash_3words(a, 0, 0, initval);
+ return jhash_3words(a, 0, 0, initval);
}
#endif /* _JHASH_H */
diff --git a/sys/dev/pci/cxgb_l2t.h b/sys/dev/pci/cxgb_l2t.h
index 4079d2ed423..b9708180f89 100644
--- a/sys/dev/pci/cxgb_l2t.h
+++ b/sys/dev/pci/cxgb_l2t.h
@@ -25,7 +25,7 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/cxgb_l2t.h,v 1.1 2007/05/25 09:48:19 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/cxgb_l2t.h,v 1.2 2007/08/17 05:57:03 kmacy Exp $
***************************************************************************/
#ifndef _CHELSIO_L2T_H
@@ -35,16 +35,35 @@ $FreeBSD: src/sys/dev/cxgb/cxgb_l2t.h,v 1.1 2007/05/25 09:48:19 kmacy Exp $
#include <dev/cxgb/ulp/toecore/toedev.h>
#endif
#include <sys/lock.h>
+
+#ifdef __FreeBSD__
+#if __FreeBSD_version > 700000
#include <sys/rwlock.h>
+#else
+#define rwlock mtx
+#define rw_wlock(x) mtx_lock((x))
+#define rw_wunlock(x) mtx_unlock((x))
+#define rw_rlock(x) mtx_lock((x))
+#define rw_runlock(x) mtx_unlock((x))
+#define rw_init(x, str) mtx_init((x), (str), NULL, MTX_DEF)
+#define rw_destroy(x) mtx_destroy((x))
+#endif
+#endif
#ifdef __NetBSD__
-#define rwlock krwlock
+#define rwlock mtx
+#define rw_wlock(x) mtx_lock((x))
+#define rw_wunlock(x) mtx_unlock((x))
+#define rw_rlock(x) mtx_lock((x))
+#define rw_runlock(x) mtx_unlock((x))
+#define rw_init(x, str) mtx_init((x), (str), NULL, MTX_DEF)
+#define rw_destroy(x) mtx_destroy((x))
#endif
enum {
- L2T_STATE_VALID, /* entry is up to date */
- L2T_STATE_STALE, /* entry may be used but needs revalidation */
- L2T_STATE_RESOLVING, /* entry needs address resolution */
- L2T_STATE_UNUSED /* entry not in use */
+ L2T_STATE_VALID, /* entry is up to date */
+ L2T_STATE_STALE, /* entry may be used but needs revalidation */
+ L2T_STATE_RESOLVING, /* entry needs address resolution */
+ L2T_STATE_UNUSED /* entry not in use */
};
/*
@@ -56,61 +75,61 @@ enum {
* first element in its chain through its first pointer.
*/
struct l2t_entry {
- uint16_t state; /* entry state */
- uint16_t idx; /* entry index */
- uint32_t addr; /* dest IP address */
- int ifindex; /* neighbor's net_device's ifindex */
- uint16_t smt_idx; /* SMT index */
- uint16_t vlan; /* VLAN TCI (id: bits 0-11, prio: 13-15 */
- struct rtentry *neigh; /* associated neighbour */
- struct l2t_entry *first; /* start of hash chain */
- struct l2t_entry *next; /* next l2t_entry on chain */
- struct mbuf *arpq_head; /* queue of packets awaiting resolution */
- struct mbuf *arpq_tail;
- struct mtx lock;
- volatile uint32_t refcnt; /* entry reference count */
- uint8_t dmac[6]; /* neighbour's MAC address */
+ uint16_t state; /* entry state */
+ uint16_t idx; /* entry index */
+ uint32_t addr; /* dest IP address */
+ int ifindex; /* neighbor's net_device's ifindex */
+ uint16_t smt_idx; /* SMT index */
+ uint16_t vlan; /* VLAN TCI (id: bits 0-11, prio: 13-15 */
+ struct rtentry *neigh; /* associated neighbour */
+ struct l2t_entry *first; /* start of hash chain */
+ struct l2t_entry *next; /* next l2t_entry on chain */
+ struct mbuf *arpq_head; /* queue of packets awaiting resolution */
+ struct mbuf *arpq_tail;
+ struct mtx lock;
+ volatile uint32_t refcnt; /* entry reference count */
+ uint8_t dmac[6]; /* neighbour's MAC address */
#ifndef NETEVENT
#ifdef CONFIG_CHELSIO_T3_MODULE
- struct timer_list update_timer;
+ struct timer_list update_timer;
#ifdef __FreeBSD__
- struct toedev *tdev;
+ struct toedev *tdev;
#endif
#endif
#endif
};
struct l2t_data {
- unsigned int nentries; /* number of entries */
- struct l2t_entry *rover; /* starting point for next allocation */
- volatile uint32_t nfree; /* number of free entries */
- struct rwlock lock;
- struct l2t_entry l2tab[0];
+ unsigned int nentries; /* number of entries */
+ struct l2t_entry *rover; /* starting point for next allocation */
+ volatile uint32_t nfree; /* number of free entries */
+ struct rwlock lock;
+ struct l2t_entry l2tab[0];
};
typedef void (*arp_failure_handler_func)(struct toedev *dev,
- struct mbuf *m);
+ struct mbuf *m);
/*
* Callback stored in an skb to handle address resolution failure.
*/
struct l2t_mbuf_cb {
- arp_failure_handler_func arp_failure_handler;
+ arp_failure_handler_func arp_failure_handler;
};
/*
- * XXX
+ * XXX
*/
#define L2T_MBUF_CB(skb) ((struct l2t_mbuf_cb *)(skb)->cb)
static __inline void set_arp_failure_handler(struct mbuf *m,
- arp_failure_handler_func hnd)
+ arp_failure_handler_func hnd)
{
#if 0
- L2T_SKB_CB(skb)->arp_failure_handler = hnd;
+ L2T_SKB_CB(skb)->arp_failure_handler = hnd;
#endif
- panic("implement me");
+ panic("implement me");
}
/*
@@ -121,9 +140,9 @@ static __inline void set_arp_failure_handler(struct mbuf *m,
void t3_l2e_free(struct l2t_data *d, struct l2t_entry *e);
void t3_l2t_update(struct toedev *dev, struct rtentry *ifp);
struct l2t_entry *t3_l2t_get(struct toedev *dev, struct rtentry *neigh,
- unsigned int smt_idx);
+ unsigned int smt_idx);
int t3_l2t_send_slow(struct toedev *dev, struct mbuf *m,
- struct l2t_entry *e);
+ struct l2t_entry *e);
void t3_l2t_send_event(struct toedev *dev, struct l2t_entry *e);
struct l2t_data *t3_init_l2t(unsigned int l2t_capacity);
void t3_free_l2t(struct l2t_data *d);
@@ -138,43 +157,24 @@ void t3_l2t_proc_free(struct proc_dir_entry *dir);
int cxgb_ofld_send(struct toedev *dev, struct mbuf *m);
-#ifdef __NetBSD__
-static inline u_int atomic_fetchadd_int(volatile u_int *p, u_int v)
-{
-#if 0
- if (v == 1)
- return (atomic_inc_return(*p));
- else
- return (atomic_dec_return(*p));
-#else
- return (atomic_fetchadd_int(p, v)); // XXXXXXXXXXXXXXXXXXXXXX
-#endif
-}
-
-static inline void atomic_add_int(volatile int *p, int v)
-{
- *p += v; // XXXXXXXXXXXXXXXXXXXXXXXXXX
-}
-#endif
-
static inline int l2t_send(struct toedev *dev, struct mbuf *m,
- struct l2t_entry *e)
+ struct l2t_entry *e)
{
- if (__predict_true(e->state == L2T_STATE_VALID))
- return cxgb_ofld_send(dev, m);
- return t3_l2t_send_slow(dev, m, e);
+ if (__predict_true(e->state == L2T_STATE_VALID))
+ return cxgb_ofld_send(dev, m);
+ return t3_l2t_send_slow(dev, m, e);
}
static inline void l2t_release(struct l2t_data *d, struct l2t_entry *e)
{
- if (atomic_fetchadd_int(&e->refcnt, -1) == 1)
- t3_l2e_free(d, e);
+ if (atomic_fetchadd_int(&e->refcnt, -1) == 1)
+ t3_l2e_free(d, e);
}
static inline void l2t_hold(struct l2t_data *d, struct l2t_entry *e)
{
- if (atomic_fetchadd_int(&e->refcnt, 1) == 1) /* 0 -> 1 transition */
- atomic_add_int(&d->nfree, 1);
+ if (atomic_fetchadd_int(&e->refcnt, 1) == 1) /* 0 -> 1 transition */
+ atomic_add_int(&d->nfree, 1);
}
#endif
diff --git a/sys/dev/pci/cxgb_mbuf.h b/sys/dev/pci/cxgb_mbuf.h
index 30ab2434e4e..045238af069 100644
--- a/sys/dev/pci/cxgb_mbuf.h
+++ b/sys/dev/pci/cxgb_mbuf.h
@@ -35,59 +35,59 @@ $FreeBSD: src/sys/dev/cxgb/sys/mbufq.h,v 1.2 2007/05/28 22:57:27 kmacy Exp $
#include <sys/mbuf.h>
struct mbuf_head {
- struct mbuf *head;
- struct mbuf *tail;
- uint32_t qlen;
- struct mtx lock;
+ struct mbuf *head;
+ struct mbuf *tail;
+ uint32_t qlen;
+ struct mtx lock;
};
static __inline void
mbufq_init(struct mbuf_head *l)
{
- l->head = l->tail = NULL;
+ l->head = l->tail = NULL;
}
static __inline int
mbufq_empty(struct mbuf_head *l)
{
- return (l->head == NULL);
+ return (l->head == NULL);
}
static __inline int
mbufq_len(struct mbuf_head *l)
{
- return (l->qlen);
+ return (l->qlen);
}
static __inline void
mbufq_tail(struct mbuf_head *l, struct mbuf *m)
{
- l->qlen++;
- l->tail->m_nextpkt = m;
- l->tail = m;
+ l->qlen++;
+ l->tail->m_nextpkt = m;
+ l->tail = m;
}
static __inline struct mbuf *
mbufq_dequeue(struct mbuf_head *l)
{
- struct mbuf *m;
+ struct mbuf *m;
- m = l->head;
- if (m) {
- if (m == l->tail)
- l->tail = NULL;
- l->head = m->m_nextpkt;
- l->qlen--;
- }
+ m = l->head;
+ if (m) {
+ if (m == l->tail)
+ l->tail = NULL;
+ l->head = m->m_nextpkt;
+ l->qlen--;
+ }
- return (m);
+ return (m);
}
static __inline struct mbuf *
mbufq_peek(struct mbuf_head *l)
{
- return (l->head);
+ return (l->head);
}
#endif /* CXGB_MBUFQ_H_ */
diff --git a/sys/dev/pci/cxgb_mvec.h b/sys/dev/pci/cxgb_mvec.h
index 7cbbae1560e..73545a0b0dd 100644
--- a/sys/dev/pci/cxgb_mvec.h
+++ b/sys/dev/pci/cxgb_mvec.h
@@ -39,30 +39,30 @@
#define M_IOVEC 0x100000 /* mbuf immediate data area is used for cluster ptrs */
#define MBUF_IOV_TYPE_MASK ((1<<3)-1)
#define mbuf_vec_set_type(mv, i, type) \
- (mv)->mv_vec[(i)].mi_flags = (((mv)->mv_vec[(i)].mi_flags \
- & ~MBUF_IOV_TYPE_MASK) | type)
+ (mv)->mv_vec[(i)].mi_flags = (((mv)->mv_vec[(i)].mi_flags \
+ & ~MBUF_IOV_TYPE_MASK) | type)
#define mbuf_vec_get_type(mv, i) \
- ((mv)->mv_vec[(i)].mi_flags & MBUF_IOV_TYPE_MASK)
+ ((mv)->mv_vec[(i)].mi_flags & MBUF_IOV_TYPE_MASK)
struct mbuf_iovec {
- uint16_t mi_flags; /* per-cluster flags */
- uint16_t mi_len; /* length of cluster */
- uint32_t mi_offset; /* data offsets into cluster */
- uint8_t *mi_base; /* pointers to cluster */
- volatile uint32_t *mi_refcnt; /* refcnt for cluster*/
+ uint16_t mi_flags; /* per-cluster flags */
+ uint16_t mi_len; /* length of cluster */
+ uint32_t mi_offset; /* data offsets into cluster */
+ uint8_t *mi_base; /* pointers to cluster */
+ volatile uint32_t *mi_refcnt; /* refcnt for cluster*/
#ifdef __i386__
- void *mi_args; /* for sf_buf */
-#endif
+ void *mi_args; /* for sf_buf */
+#endif
};
#define MAX_MBUF_IOV ((MHLEN-8)/sizeof(struct mbuf_iovec))
struct mbuf_vec {
- uint16_t mv_first; /* first valid cluster */
- uint16_t mv_count; /* # of clusters */
- uint32_t mv_flags; /* flags for iovec */
- struct mbuf_iovec mv_vec[MAX_MBUF_IOV];
+ uint16_t mv_first; /* first valid cluster */
+ uint16_t mv_count; /* # of clusters */
+ uint32_t mv_flags; /* flags for iovec */
+ struct mbuf_iovec mv_vec[MAX_MBUF_IOV];
};
int _m_explode(struct mbuf *);
@@ -72,32 +72,32 @@ void mb_free_vec(struct mbuf *m);
static inline void
m_iovinit(struct mbuf *m)
{
- struct mbuf_vec *mv = mtomv(m);
+ struct mbuf_vec *mv = mtomv(m);
- mv->mv_first = mv->mv_count = 0;
- m->m_pkthdr.len = m->m_len = 0;
- m->m_flags |= M_IOVEC;
+ mv->mv_first = mv->mv_count = 0;
+ m->m_pkthdr.len = m->m_len = 0;
+ m->m_flags |= M_IOVEC;
}
static inline void
m_iovappend(struct mbuf *m, uint8_t *cl, int size, int len, int offset)
{
- struct mbuf_vec *mv = mtomv(m);
- struct mbuf_iovec *iov;
- int idx = mv->mv_first + mv->mv_count;
+ struct mbuf_vec *mv = mtomv(m);
+ struct mbuf_iovec *iov;
+ int idx = mv->mv_first + mv->mv_count;
#ifdef __FreeBSD__
KASSERT(idx <= MAX_MBUF_IOV, ("tried to append too many clusters to mbuf iovec"));
#endif
- if ((m->m_flags & M_EXT) != 0)
- panic("invalid flags in %s", __func__);
+ if ((m->m_flags & M_EXT) != 0)
+ panic("invalid flags in %s", __func__);
if (mv->mv_count == 0)
- m->m_data = cl + offset;
+ m->m_data = cl + offset;
iov = &mv->mv_vec[idx];
#ifdef __FreeBSD__
- iov->mi_flags = m_gettype(size);
+ iov->mi_flags = m_gettype(size);
#endif
iov->mi_base = cl;
iov->mi_len = len;
@@ -110,81 +110,86 @@ m_iovappend(struct mbuf *m, uint8_t *cl, int size, int len, int offset)
static inline int
m_explode(struct mbuf *m)
{
- if ((m->m_flags & M_IOVEC) == 0)
- return (0);
+ if ((m->m_flags & M_IOVEC) == 0)
+ return (0);
- return _m_explode(m);
+ return _m_explode(m);
}
static inline int
m_collapse(struct mbuf *m, int maxbufs, struct mbuf **mnew)
{
-#if (!defined(__sparc64__) && !defined(__sun4v__))
- if (m->m_next == NULL)
-#endif
- {
- *mnew = m;
- return (0);
- }
- return _m_collapse(m, maxbufs, mnew);
+#if (!defined(__sparc64__) && !defined(__sun4v__))
+ if (m->m_next == NULL)
+#endif
+ {
+ *mnew = m;
+ return (0);
+ }
+ return _m_collapse(m, maxbufs, mnew);
}
static inline struct mbuf *
m_free_vec(struct mbuf *m)
{
- struct mbuf *n = m->m_next;
-
#ifdef __FreeBSD__
- if (m->m_flags & M_IOVEC)
- mb_free_vec(m);
- else if (m->m_flags & M_EXT)
- mb_free_ext(m);
- else
- uma_zfree(zone_mbuf, m);
+ struct mbuf *n = m->m_next;
+
+ if (m->m_flags & M_IOVEC)
+ mb_free_vec(m);
+ else if (m->m_flags & M_EXT)
+ mb_free_ext(m);
+ else
+ uma_zfree(zone_mbuf, m);
+#endif
+#ifdef __NetBSD__
+ struct mbuf *n = NULL;
+
+ MFREE(m, n);
#endif
- return (n);
+ return (n);
}
static inline void
m_freem_vec(struct mbuf *m)
{
- while (m != NULL)
- m = m_free_vec(m);
+ while (m != NULL)
+ m = m_free_vec(m);
}
#ifdef __FreeBSD__
static inline uma_zone_t
m_getzonefromtype(int type)
{
- uma_zone_t zone;
-
- switch (type) {
- case EXT_MBUF:
- zone = zone_mbuf;
- break;
- case EXT_CLUSTER:
- zone = zone_clust;
- break;
+ uma_zone_t zone;
+
+ switch (type) {
+ case EXT_MBUF:
+ zone = zone_mbuf;
+ break;
+ case EXT_CLUSTER:
+ zone = zone_clust;
+ break;
#if MJUMPAGESIZE != MCLBYTES
- case EXT_JUMBOP:
- zone = zone_jumbop;
- break;
+ case EXT_JUMBOP:
+ zone = zone_jumbop;
+ break;
#endif
- case EXT_JUMBO9:
- zone = zone_jumbo9;
- break;
- case EXT_JUMBO16:
- zone = zone_jumbo16;
- break;
+ case EXT_JUMBO9:
+ zone = zone_jumbo9;
+ break;
+ case EXT_JUMBO16:
+ zone = zone_jumbo16;
+ break;
#ifndef PACKET_ZONE_DISABLED
- case EXT_PACKET:
- zone = zone_pack;
- break;
-#endif
- default:
- panic("%s: invalid cluster type %d", __func__, type);
- }
- return (zone);
+ case EXT_PACKET:
+ zone = zone_pack;
+ break;
+#endif
+ default:
+ panic("%s: invalid cluster type %d", __func__, type);
+ }
+ return (zone);
}
#endif
diff --git a/sys/dev/pci/cxgb_offload.h b/sys/dev/pci/cxgb_offload.h
index facdec488e6..d10ab8bbefa 100644
--- a/sys/dev/pci/cxgb_offload.h
+++ b/sys/dev/pci/cxgb_offload.h
@@ -10,11 +10,7 @@ modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Chelsio Corporation nor the names of its
+ 2. Neither the name of the Chelsio Corporation nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
@@ -30,27 +26,31 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/cxgb_offload.h,v 1.1 2007/05/25 09:48:19 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/cxgb_offload.h,v 1.5 2007/09/10 00:59:51 kmacy Exp $
***************************************************************************/
#ifndef _CXGB_OFFLOAD_H
#define _CXGB_OFFLOAD_H
-
+#ifdef CONFIG_DEFINED
+#include <common/cxgb_version.h>
+#include <cxgb_config.h>
+#include <cxgb_l2t.h>
+#include <common/cxgb_tcb.h>
+#else
#ifdef __FreeBSD__
-#include <dev/cxgb/common/cxgb_tcb.h>
+#include <dev/cxgb/common/cxgb_version.h>
+#include <dev/cxgb/cxgb_config.h>
#include <dev/cxgb/cxgb_l2t.h>
-
-#include <dev/cxgb/ulp/toecore/toedev.h>
-#include <dev/cxgb/common/cxgb_t3_cpl.h>
+#include <dev/cxgb/common/cxgb_tcb.h>
#endif
#ifdef __NetBSD__
-#include "cxgb_tcb.h"
+#include "cxgb_version.h"
+#include "cxgb_config.h"
#include "cxgb_l2t.h"
-
-#include "cxgb_toedev.h"
-#include "cxgb_t3_cpl.h"
+#include "cxgb_tcb.h"
+#endif
#endif
struct adapter;
@@ -81,54 +81,54 @@ void cxgb_add_clients(struct toedev *tdev);
void cxgb_remove_clients(struct toedev *tdev);
typedef int (*cxgb_cpl_handler_func)(struct toedev *dev,
- struct mbuf *m, void *ctx);
+ struct mbuf *m, void *ctx);
struct cxgb_client {
- char *name;
- void (*add) (struct toedev *);
- void (*remove) (struct toedev *);
- cxgb_cpl_handler_func *handlers;
- int (*redirect)(void *ctx, struct rtentry *old,
- struct rtentry *new,
- struct l2t_entry *l2t);
- TAILQ_ENTRY(cxgb_client) client_entry;
+ char *name;
+ void (*add) (struct toedev *);
+ void (*remove) (struct toedev *);
+ cxgb_cpl_handler_func *handlers;
+ int (*redirect)(void *ctx, struct rtentry *old,
+ struct rtentry *new,
+ struct l2t_entry *l2t);
+ TAILQ_ENTRY(cxgb_client) client_entry;
};
/*
* TID allocation services.
*/
int cxgb_alloc_atid(struct toedev *dev, struct cxgb_client *client,
- void *ctx);
+ void *ctx);
int cxgb_alloc_stid(struct toedev *dev, struct cxgb_client *client,
- void *ctx);
+ void *ctx);
void *cxgb_free_atid(struct toedev *dev, int atid);
void cxgb_free_stid(struct toedev *dev, int stid);
void cxgb_insert_tid(struct toedev *dev, struct cxgb_client *client,
- void *ctx,
- unsigned int tid);
+ void *ctx,
+ unsigned int tid);
void cxgb_queue_tid_release(struct toedev *dev, unsigned int tid);
void cxgb_remove_tid(struct toedev *dev, void *ctx, unsigned int tid);
struct toe_tid_entry {
- struct cxgb_client *client;
- void *ctx;
+ struct cxgb_client *client;
+ void *ctx;
};
/* CPL message priority levels */
enum {
- CPL_PRIORITY_DATA = 0, /* data messages */
- CPL_PRIORITY_SETUP = 1, /* connection setup messages */
- CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
- CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
- CPL_PRIORITY_ACK = 1, /* RX ACK messages */
- CPL_PRIORITY_CONTROL = 1 /* offload control messages */
+ CPL_PRIORITY_DATA = 0, /* data messages */
+ CPL_PRIORITY_SETUP = 1, /* connection setup messages */
+ CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
+ CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
+ CPL_PRIORITY_ACK = 1, /* RX ACK messages */
+ CPL_PRIORITY_CONTROL = 1 /* offload control messages */
};
/* Flags for return value of CPL message handlers */
enum {
- CPL_RET_BUF_DONE = 1, // buffer processing done, buffer may be freed
- CPL_RET_BAD_MSG = 2, // bad CPL message (e.g., unknown opcode)
- CPL_RET_UNKNOWN_TID = 4 // unexpected unknown TID
+ CPL_RET_BUF_DONE = 1, // buffer processing done, buffer may be freed
+ CPL_RET_BAD_MSG = 2, // bad CPL message (e.g., unknown opcode)
+ CPL_RET_UNKNOWN_TID = 4 // unexpected unknown TID
};
typedef int (*cpl_handler_func)(struct toedev *dev, struct mbuf *m);
@@ -139,19 +139,19 @@ typedef int (*cpl_handler_func)(struct toedev *dev, struct mbuf *m);
*/
static inline void *cplhdr(struct mbuf *m)
{
- return m->m_data;
+ return mtod(m, uint8_t *);
}
void t3_register_cpl_handler(unsigned int opcode, cpl_handler_func h);
union listen_entry {
- struct toe_tid_entry toe_tid;
- union listen_entry *next;
+ struct toe_tid_entry toe_tid;
+ union listen_entry *next;
};
union active_open_entry {
- struct toe_tid_entry toe_tid;
- union active_open_entry *next;
+ struct toe_tid_entry toe_tid;
+ union active_open_entry *next;
};
/*
@@ -160,49 +160,54 @@ union active_open_entry {
* The tables themselves are allocated dynamically.
*/
struct tid_info {
- struct toe_tid_entry *tid_tab;
- unsigned int ntids;
- volatile int tids_in_use;
-
- union listen_entry *stid_tab;
- unsigned int nstids;
- unsigned int stid_base;
-
- union active_open_entry *atid_tab;
- unsigned int natids;
- unsigned int atid_base;
-
- /*
- * The following members are accessed R/W so we put them in their own
- * cache lines.
- *
- * XXX We could combine the atid fields above with the lock here since
- * atids are use once (unlike other tids). OTOH the above fields are
- * usually in cache due to tid_tab.
- */
- struct mtx atid_lock /* ____cacheline_aligned_in_smp */;
- union active_open_entry *afree;
- unsigned int atids_in_use;
-
- struct mtx stid_lock /*____cacheline_aligned */;
- union listen_entry *sfree;
- unsigned int stids_in_use;
+ struct toe_tid_entry *tid_tab;
+ unsigned int ntids;
+ volatile unsigned int tids_in_use;
+
+ union listen_entry *stid_tab;
+ unsigned int nstids;
+ unsigned int stid_base;
+
+ union active_open_entry *atid_tab;
+ unsigned int natids;
+ unsigned int atid_base;
+
+ /*
+ * The following members are accessed R/W so we put them in their own
+ * cache lines.
+ *
+ * XXX We could combine the atid fields above with the lock here since
+ * atids are use once (unlike other tids). OTOH the above fields are
+ * usually in cache due to tid_tab.
+ */
+ struct mtx atid_lock /* ____cacheline_aligned_in_smp */;
+ union active_open_entry *afree;
+ unsigned int atids_in_use;
+
+ struct mtx stid_lock /*____cacheline_aligned */;
+ union listen_entry *sfree;
+ unsigned int stids_in_use;
};
struct toe_data {
-#ifdef notyet
- struct list_head list_node;
-#endif
- struct toedev *dev;
- unsigned int tx_max_chunk; /* max payload for TX_DATA */
- unsigned int max_wrs; /* max in-flight WRs per connection */
- unsigned int nmtus;
- const unsigned short *mtus;
- struct tid_info tid_maps;
-
- struct toe_tid_entry *tid_release_list;
- struct mtx tid_release_lock;
- struct task tid_release_task;
+#ifdef notyet
+ struct list_head list_node;
+#endif
+ struct toedev *dev;
+ unsigned int tx_max_chunk; /* max payload for TX_DATA */
+ unsigned int max_wrs; /* max in-flight WRs per connection */
+ unsigned int nmtus;
+ const unsigned short *mtus;
+ struct tid_info tid_maps;
+
+ struct toe_tid_entry *tid_release_list;
+ struct mtx tid_release_lock;
+#ifdef __FreeBSD__
+ struct task tid_release_task;
+#endif
+#ifdef __NetBSD__
+ struct cxgb_task tid_release_task;
+#endif
};
/*
diff --git a/sys/dev/pci/cxgb_sge_defs.h b/sys/dev/pci/cxgb_sge_defs.h
index 417edb22a1d..b8e7681c107 100644
--- a/sys/dev/pci/cxgb_sge_defs.h
+++ b/sys/dev/pci/cxgb_sge_defs.h
@@ -25,7 +25,7 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/common/cxgb_sge_defs.h,v 1.2 2007/05/28 22:57:26 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/common/cxgb_sge_defs.h,v 1.3 2007/09/09 01:28:03 kmacy Exp $
***************************************************************************/
/*
@@ -136,6 +136,10 @@ $FreeBSD: src/sys/dev/cxgb/common/cxgb_sge_defs.h,v 1.2 2007/05/28 22:57:26 kmac
#define V_CQ_GEN(x) ((x) << S_CQ_GEN)
#define F_CQ_GEN V_CQ_GEN(1U)
+#define S_CQ_ERR 30
+#define V_CQ_ERR(x) ((x) << S_CQ_ERR)
+#define F_CQ_ERR V_CQ_ERR(1U)
+
#define S_CQ_OVERFLOW_MODE 31
#define V_CQ_OVERFLOW_MODE(x) ((x) << S_CQ_OVERFLOW_MODE)
#define F_CQ_OVERFLOW_MODE V_CQ_OVERFLOW_MODE(1U)
diff --git a/sys/dev/pci/cxgb_t3_cpl.h b/sys/dev/pci/cxgb_t3_cpl.h
index 65100969622..08f98a82ffa 100644
--- a/sys/dev/pci/cxgb_t3_cpl.h
+++ b/sys/dev/pci/cxgb_t3_cpl.h
@@ -25,164 +25,161 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-$FreeBSD: src/sys/dev/cxgb/common/cxgb_t3_cpl.h,v 1.3 2007/05/28 22:57:26 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/common/cxgb_t3_cpl.h,v 1.4 2007/07/17 06:50:34 kmacy Exp $
***************************************************************************/
#ifndef T3_CPL_H
#define T3_CPL_H
-#if !defined(__LITTLE_ENDIAN_BITFIELD) && !defined(__BIG_ENDIAN_BITFIELD)
-# include <asm/byteorder.h>
-#endif
-
enum CPL_opcode {
- CPL_PASS_OPEN_REQ = 0x1,
- CPL_PASS_ACCEPT_RPL = 0x2,
- CPL_ACT_OPEN_REQ = 0x3,
- CPL_SET_TCB = 0x4,
- CPL_SET_TCB_FIELD = 0x5,
- CPL_GET_TCB = 0x6,
- CPL_PCMD = 0x7,
- CPL_CLOSE_CON_REQ = 0x8,
- CPL_CLOSE_LISTSRV_REQ = 0x9,
- CPL_ABORT_REQ = 0xA,
- CPL_ABORT_RPL = 0xB,
- CPL_TX_DATA = 0xC,
- CPL_RX_DATA_ACK = 0xD,
- CPL_TX_PKT = 0xE,
- CPL_RTE_DELETE_REQ = 0xF,
- CPL_RTE_WRITE_REQ = 0x10,
- CPL_RTE_READ_REQ = 0x11,
- CPL_L2T_WRITE_REQ = 0x12,
- CPL_L2T_READ_REQ = 0x13,
- CPL_SMT_WRITE_REQ = 0x14,
- CPL_SMT_READ_REQ = 0x15,
- CPL_TX_PKT_LSO = 0x16,
- CPL_PCMD_READ = 0x17,
- CPL_BARRIER = 0x18,
- CPL_TID_RELEASE = 0x1A,
-
- CPL_CLOSE_LISTSRV_RPL = 0x20,
- CPL_ERROR = 0x21,
- CPL_GET_TCB_RPL = 0x22,
- CPL_L2T_WRITE_RPL = 0x23,
- CPL_PCMD_READ_RPL = 0x24,
- CPL_PCMD_RPL = 0x25,
- CPL_PEER_CLOSE = 0x26,
- CPL_RTE_DELETE_RPL = 0x27,
- CPL_RTE_WRITE_RPL = 0x28,
- CPL_RX_DDP_COMPLETE = 0x29,
- CPL_RX_PHYS_ADDR = 0x2A,
- CPL_RX_PKT = 0x2B,
- CPL_RX_URG_NOTIFY = 0x2C,
- CPL_SET_TCB_RPL = 0x2D,
- CPL_SMT_WRITE_RPL = 0x2E,
- CPL_TX_DATA_ACK = 0x2F,
-
- CPL_ABORT_REQ_RSS = 0x30,
- CPL_ABORT_RPL_RSS = 0x31,
- CPL_CLOSE_CON_RPL = 0x32,
- CPL_ISCSI_HDR = 0x33,
- CPL_L2T_READ_RPL = 0x34,
- CPL_RDMA_CQE = 0x35,
- CPL_RDMA_CQE_READ_RSP = 0x36,
- CPL_RDMA_CQE_ERR = 0x37,
- CPL_RTE_READ_RPL = 0x38,
- CPL_RX_DATA = 0x39,
-
- CPL_ACT_OPEN_RPL = 0x40,
- CPL_PASS_OPEN_RPL = 0x41,
- CPL_RX_DATA_DDP = 0x42,
- CPL_SMT_READ_RPL = 0x43,
-
- CPL_ACT_ESTABLISH = 0x50,
- CPL_PASS_ESTABLISH = 0x51,
-
- CPL_PASS_ACCEPT_REQ = 0x70,
-
- CPL_ASYNC_NOTIF = 0x80, /* fake opcode for async notifications */
-
- CPL_TX_DMA_ACK = 0xA0,
- CPL_RDMA_READ_REQ = 0xA1,
- CPL_RDMA_TERMINATE = 0xA2,
- CPL_TRACE_PKT = 0xA3,
- CPL_RDMA_EC_STATUS = 0xA5,
-
- NUM_CPL_CMDS /* must be last and previous entries must be sorted */
+ CPL_PASS_OPEN_REQ = 0x1,
+ CPL_PASS_ACCEPT_RPL = 0x2,
+ CPL_ACT_OPEN_REQ = 0x3,
+ CPL_SET_TCB = 0x4,
+ CPL_SET_TCB_FIELD = 0x5,
+ CPL_GET_TCB = 0x6,
+ CPL_PCMD = 0x7,
+ CPL_CLOSE_CON_REQ = 0x8,
+ CPL_CLOSE_LISTSRV_REQ = 0x9,
+ CPL_ABORT_REQ = 0xA,
+ CPL_ABORT_RPL = 0xB,
+ CPL_TX_DATA = 0xC,
+ CPL_RX_DATA_ACK = 0xD,
+ CPL_TX_PKT = 0xE,
+ CPL_RTE_DELETE_REQ = 0xF,
+ CPL_RTE_WRITE_REQ = 0x10,
+ CPL_RTE_READ_REQ = 0x11,
+ CPL_L2T_WRITE_REQ = 0x12,
+ CPL_L2T_READ_REQ = 0x13,
+ CPL_SMT_WRITE_REQ = 0x14,
+ CPL_SMT_READ_REQ = 0x15,
+ CPL_TX_PKT_LSO = 0x16,
+ CPL_PCMD_READ = 0x17,
+ CPL_BARRIER = 0x18,
+ CPL_TID_RELEASE = 0x1A,
+
+ CPL_CLOSE_LISTSRV_RPL = 0x20,
+ CPL_ERROR = 0x21,
+ CPL_GET_TCB_RPL = 0x22,
+ CPL_L2T_WRITE_RPL = 0x23,
+ CPL_PCMD_READ_RPL = 0x24,
+ CPL_PCMD_RPL = 0x25,
+ CPL_PEER_CLOSE = 0x26,
+ CPL_RTE_DELETE_RPL = 0x27,
+ CPL_RTE_WRITE_RPL = 0x28,
+ CPL_RX_DDP_COMPLETE = 0x29,
+ CPL_RX_PHYS_ADDR = 0x2A,
+ CPL_RX_PKT = 0x2B,
+ CPL_RX_URG_NOTIFY = 0x2C,
+ CPL_SET_TCB_RPL = 0x2D,
+ CPL_SMT_WRITE_RPL = 0x2E,
+ CPL_TX_DATA_ACK = 0x2F,
+
+ CPL_ABORT_REQ_RSS = 0x30,
+ CPL_ABORT_RPL_RSS = 0x31,
+ CPL_CLOSE_CON_RPL = 0x32,
+ CPL_ISCSI_HDR = 0x33,
+ CPL_L2T_READ_RPL = 0x34,
+ CPL_RDMA_CQE = 0x35,
+ CPL_RDMA_CQE_READ_RSP = 0x36,
+ CPL_RDMA_CQE_ERR = 0x37,
+ CPL_RTE_READ_RPL = 0x38,
+ CPL_RX_DATA = 0x39,
+
+ CPL_ACT_OPEN_RPL = 0x40,
+ CPL_PASS_OPEN_RPL = 0x41,
+ CPL_RX_DATA_DDP = 0x42,
+ CPL_SMT_READ_RPL = 0x43,
+
+ CPL_ACT_ESTABLISH = 0x50,
+ CPL_PASS_ESTABLISH = 0x51,
+
+ CPL_PASS_ACCEPT_REQ = 0x70,
+
+ CPL_ASYNC_NOTIF = 0x80, /* fake opcode for async notifications */
+
+ CPL_TX_DMA_ACK = 0xA0,
+ CPL_RDMA_READ_REQ = 0xA1,
+ CPL_RDMA_TERMINATE = 0xA2,
+ CPL_TRACE_PKT = 0xA3,
+ CPL_RDMA_EC_STATUS = 0xA5,
+
+ NUM_CPL_CMDS /* must be last and previous entries must be sorted */
};
enum CPL_error {
- CPL_ERR_NONE = 0,
- CPL_ERR_TCAM_PARITY = 1,
- CPL_ERR_TCAM_FULL = 3,
- CPL_ERR_CONN_RESET = 20,
- CPL_ERR_CONN_EXIST = 22,
- CPL_ERR_ARP_MISS = 23,
- CPL_ERR_BAD_SYN = 24,
- CPL_ERR_CONN_TIMEDOUT = 30,
- CPL_ERR_XMIT_TIMEDOUT = 31,
- CPL_ERR_PERSIST_TIMEDOUT = 32,
- CPL_ERR_FINWAIT2_TIMEDOUT = 33,
- CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
- CPL_ERR_RTX_NEG_ADVICE = 35,
- CPL_ERR_PERSIST_NEG_ADVICE = 36,
- CPL_ERR_ABORT_FAILED = 42,
- CPL_ERR_GENERAL = 99
+ CPL_ERR_NONE = 0,
+ CPL_ERR_TCAM_PARITY = 1,
+ CPL_ERR_TCAM_FULL = 3,
+ CPL_ERR_CONN_RESET = 20,
+ CPL_ERR_CONN_EXIST = 22,
+ CPL_ERR_ARP_MISS = 23,
+ CPL_ERR_BAD_SYN = 24,
+ CPL_ERR_CONN_TIMEDOUT = 30,
+ CPL_ERR_XMIT_TIMEDOUT = 31,
+ CPL_ERR_PERSIST_TIMEDOUT = 32,
+ CPL_ERR_FINWAIT2_TIMEDOUT = 33,
+ CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
+ CPL_ERR_RTX_NEG_ADVICE = 35,
+ CPL_ERR_PERSIST_NEG_ADVICE = 36,
+ CPL_ERR_ABORT_FAILED = 42,
+ CPL_ERR_GENERAL = 99
};
enum {
- CPL_CONN_POLICY_AUTO = 0,
- CPL_CONN_POLICY_ASK = 1,
- CPL_CONN_POLICY_DENY = 3
+ CPL_CONN_POLICY_AUTO = 0,
+ CPL_CONN_POLICY_ASK = 1,
+ CPL_CONN_POLICY_FILTER = 2,
+ CPL_CONN_POLICY_DENY = 3
};
enum {
- ULP_MODE_NONE = 0,
- ULP_MODE_TCP_DDP = 1,
- ULP_MODE_ISCSI = 2,
- ULP_MODE_RDMA = 4,
- ULP_MODE_TCPDDP = 5
+ ULP_MODE_NONE = 0,
+ ULP_MODE_TCP_DDP = 1,
+ ULP_MODE_ISCSI = 2,
+ ULP_MODE_RDMA = 4,
+ ULP_MODE_TCPDDP = 5
};
enum {
- ULP_CRC_HEADER = 1 << 0,
- ULP_CRC_DATA = 1 << 1
+ ULP_CRC_HEADER = 1 << 0,
+ ULP_CRC_DATA = 1 << 1
};
enum {
- CPL_PASS_OPEN_ACCEPT,
- CPL_PASS_OPEN_REJECT
+ CPL_PASS_OPEN_ACCEPT,
+ CPL_PASS_OPEN_REJECT
};
enum {
- CPL_ABORT_SEND_RST = 0,
- CPL_ABORT_NO_RST,
- CPL_ABORT_POST_CLOSE_REQ = 2
+ CPL_ABORT_SEND_RST = 0,
+ CPL_ABORT_NO_RST,
+ CPL_ABORT_POST_CLOSE_REQ = 2
};
enum { /* TX_PKT_LSO ethernet types */
- CPL_ETH_II,
- CPL_ETH_II_VLAN,
- CPL_ETH_802_3,
- CPL_ETH_802_3_VLAN
+ CPL_ETH_II,
+ CPL_ETH_II_VLAN,
+ CPL_ETH_802_3,
+ CPL_ETH_802_3_VLAN
};
enum { /* TCP congestion control algorithms */
- CONG_ALG_RENO,
- CONG_ALG_TAHOE,
- CONG_ALG_NEWRENO,
- CONG_ALG_HIGHSPEED
+ CONG_ALG_RENO,
+ CONG_ALG_TAHOE,
+ CONG_ALG_NEWRENO,
+ CONG_ALG_HIGHSPEED
};
-enum { /* RSS hash type */
- RSS_HASH_NONE = 0,
- RSS_HASH_2_TUPLE = 1 << 0,
- RSS_HASH_4_TUPLE = 1 << 1
+enum { /* RSS hash type */
+ RSS_HASH_NONE = 0,
+ RSS_HASH_2_TUPLE = 1 << 0,
+ RSS_HASH_4_TUPLE = 1 << 1
};
union opcode_tid {
- __be32 opcode_tid;
- __u8 opcode;
+ __be32 opcode_tid;
+ __u8 opcode;
};
#define S_OPCODE 24
@@ -206,38 +203,38 @@ union opcode_tid {
#define GET_TID(cmd) (G_TID(ntohl(OPCODE_TID(cmd))))
struct tcp_options {
- __be16 mss;
- __u8 wsf;
+ __be16 mss;
+ __u8 wsf;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 :5;
- __u8 ecn:1;
- __u8 sack:1;
- __u8 tstamp:1;
+ __u8 :5;
+ __u8 ecn:1;
+ __u8 sack:1;
+ __u8 tstamp:1;
#else
- __u8 tstamp:1;
- __u8 sack:1;
- __u8 ecn:1;
- __u8 :5;
+ __u8 tstamp:1;
+ __u8 sack:1;
+ __u8 ecn:1;
+ __u8 :5;
#endif
};
struct rss_header {
- __u8 opcode;
+ __u8 opcode;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 cpu_idx:6;
- __u8 hash_type:2;
+ __u8 cpu_idx:6;
+ __u8 hash_type:2;
#else
- __u8 hash_type:2;
- __u8 cpu_idx:6;
+ __u8 hash_type:2;
+ __u8 cpu_idx:6;
#endif
- __be16 cq_idx;
- __be32 rss_hash_val;
+ __be16 cq_idx;
+ __be32 rss_hash_val;
};
#ifndef CHELSIO_FW
struct work_request_hdr {
- __be32 wr_hi;
- __be32 wr_lo;
+ __be32 wr_hi;
+ __be32 wr_lo;
};
/* wr_hi fields */
@@ -259,16 +256,16 @@ struct work_request_hdr {
/* Applicable to BYPASS WRs only: the uP will added a CPL_BARRIER before
* and after the BYPASS WR if the ATOMIC bit is set.
*/
-#define S_WR_ATOMIC 16
-#define V_WR_ATOMIC(x) ((x) << S_WR_ATOMIC)
-#define F_WR_ATOMIC V_WR_ATOMIC(1U)
+#define S_WR_ATOMIC 16
+#define V_WR_ATOMIC(x) ((x) << S_WR_ATOMIC)
+#define F_WR_ATOMIC V_WR_ATOMIC(1U)
/* Applicable to BYPASS WRs only: the uP will flush buffered non abort
* related WRs.
*/
-#define S_WR_FLUSH 17
-#define V_WR_FLUSH(x) ((x) << S_WR_FLUSH)
-#define F_WR_FLUSH V_WR_FLUSH(1U)
+#define S_WR_FLUSH 17
+#define V_WR_FLUSH(x) ((x) << S_WR_FLUSH)
+#define F_WR_FLUSH V_WR_FLUSH(1U)
#define S_WR_DATATYPE 20
#define V_WR_DATATYPE(x) ((x) << S_WR_DATATYPE)
@@ -415,6 +412,11 @@ struct work_request_hdr {
#define V_CPU_IDX(x) ((x) << S_CPU_IDX)
#define G_CPU_IDX(x) (((x) >> S_CPU_IDX) & M_CPU_IDX)
+#define S_OPT1_VLAN 6
+#define M_OPT1_VLAN 0xFFF
+#define V_OPT1_VLAN(x) ((x) << S_OPT1_VLAN)
+#define G_OPT1_VLAN(x) (((x) >> S_OPT1_VLAN) & M_OPT1_VLAN)
+
#define S_MAC_MATCH_VALID 18
#define V_MAC_MATCH_VALID(x) ((x) << S_MAC_MATCH_VALID)
#define F_MAC_MATCH_VALID V_MAC_MATCH_VALID(1U)
@@ -489,41 +491,41 @@ struct work_request_hdr {
#define F_RX_FC_VALID V_RX_FC_VALID(1U)
struct cpl_pass_open_req {
- WR_HDR;
- union opcode_tid ot;
- __be16 local_port;
- __be16 peer_port;
- __be32 local_ip;
- __be32 peer_ip;
- __be32 opt0h;
- __be32 opt0l;
- __be32 peer_netmask;
- __be32 opt1;
+ WR_HDR;
+ union opcode_tid ot;
+ __be16 local_port;
+ __be16 peer_port;
+ __be32 local_ip;
+ __be32 peer_ip;
+ __be32 opt0h;
+ __be32 opt0l;
+ __be32 peer_netmask;
+ __be32 opt1;
};
struct cpl_pass_open_rpl {
- RSS_HDR
- union opcode_tid ot;
- __be16 local_port;
- __be16 peer_port;
- __be32 local_ip;
- __be32 peer_ip;
- __u8 resvd[7];
- __u8 status;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 local_port;
+ __be16 peer_port;
+ __be32 local_ip;
+ __be32 peer_ip;
+ __u8 resvd[7];
+ __u8 status;
};
struct cpl_pass_establish {
- RSS_HDR
- union opcode_tid ot;
- __be16 local_port;
- __be16 peer_port;
- __be32 local_ip;
- __be32 peer_ip;
- __be32 tos_tid;
- __be16 l2t_idx;
- __be16 tcp_opt;
- __be32 snd_isn;
- __be32 rcv_isn;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 local_port;
+ __be16 peer_port;
+ __be32 local_ip;
+ __be32 peer_ip;
+ __be32 tos_tid;
+ __be16 l2t_idx;
+ __be16 tcp_opt;
+ __be32 snd_isn;
+ __be32 rcv_isn;
};
/* cpl_pass_establish.tos_tid fields */
@@ -551,54 +553,54 @@ struct cpl_pass_establish {
#define G_TCPOPT_MSS(x) (((x) >> 12) & 0xf)
struct cpl_pass_accept_req {
- RSS_HDR
- union opcode_tid ot;
- __be16 local_port;
- __be16 peer_port;
- __be32 local_ip;
- __be32 peer_ip;
- __be32 tos_tid;
- struct tcp_options tcp_options;
- __u8 dst_mac[6];
- __be16 vlan_tag;
- __u8 src_mac[6];
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 local_port;
+ __be16 peer_port;
+ __be32 local_ip;
+ __be32 peer_ip;
+ __be32 tos_tid;
+ struct tcp_options tcp_options;
+ __u8 dst_mac[6];
+ __be16 vlan_tag;
+ __u8 src_mac[6];
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 :3;
- __u8 addr_idx:3;
- __u8 port_idx:1;
- __u8 exact_match:1;
+ __u8 :3;
+ __u8 addr_idx:3;
+ __u8 port_idx:1;
+ __u8 exact_match:1;
#else
- __u8 exact_match:1;
- __u8 port_idx:1;
- __u8 addr_idx:3;
- __u8 :3;
+ __u8 exact_match:1;
+ __u8 port_idx:1;
+ __u8 addr_idx:3;
+ __u8 :3;
#endif
- __u8 rsvd;
- __be32 rcv_isn;
- __be32 rsvd2;
+ __u8 rsvd;
+ __be32 rcv_isn;
+ __be32 rsvd2;
};
struct cpl_pass_accept_rpl {
- WR_HDR;
- union opcode_tid ot;
- __be32 opt2;
- __be32 rsvd;
- __be32 peer_ip;
- __be32 opt0h;
- __be32 opt0l_status;
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 opt2;
+ __be32 rsvd;
+ __be32 peer_ip;
+ __be32 opt0h;
+ __be32 opt0l_status;
};
struct cpl_act_open_req {
- WR_HDR;
- union opcode_tid ot;
- __be16 local_port;
- __be16 peer_port;
- __be32 local_ip;
- __be32 peer_ip;
- __be32 opt0h;
- __be32 opt0l;
- __be32 params;
- __be32 opt2;
+ WR_HDR;
+ union opcode_tid ot;
+ __be16 local_port;
+ __be16 peer_port;
+ __be32 local_ip;
+ __be32 peer_ip;
+ __be32 opt0h;
+ __be32 opt0l;
+ __be32 params;
+ __be32 opt2;
};
/* cpl_act_open_req.params fields */
@@ -631,52 +633,52 @@ struct cpl_act_open_req {
#define G_AOPEN_IFF_VLAN(x) (((x) >> S_AOPEN_IFF_VLAN) & M_AOPEN_IFF_VLAN)
struct cpl_act_open_rpl {
- RSS_HDR
- union opcode_tid ot;
- __be16 local_port;
- __be16 peer_port;
- __be32 local_ip;
- __be32 peer_ip;
- __be32 atid;
- __u8 rsvd[3];
- __u8 status;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 local_port;
+ __be16 peer_port;
+ __be32 local_ip;
+ __be32 peer_ip;
+ __be32 atid;
+ __u8 rsvd[3];
+ __u8 status;
};
struct cpl_act_establish {
- RSS_HDR
- union opcode_tid ot;
- __be16 local_port;
- __be16 peer_port;
- __be32 local_ip;
- __be32 peer_ip;
- __be32 tos_tid;
- __be16 l2t_idx;
- __be16 tcp_opt;
- __be32 snd_isn;
- __be32 rcv_isn;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 local_port;
+ __be16 peer_port;
+ __be32 local_ip;
+ __be32 peer_ip;
+ __be32 tos_tid;
+ __be16 l2t_idx;
+ __be16 tcp_opt;
+ __be32 snd_isn;
+ __be32 rcv_isn;
};
struct cpl_get_tcb {
- WR_HDR;
- union opcode_tid ot;
- __be16 cpuno;
- __be16 rsvd;
+ WR_HDR;
+ union opcode_tid ot;
+ __be16 cpuno;
+ __be16 rsvd;
};
struct cpl_get_tcb_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 rsvd;
- __u8 status;
- __be16 len;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 rsvd;
+ __u8 status;
+ __be16 len;
};
struct cpl_set_tcb {
- WR_HDR;
- union opcode_tid ot;
- __u8 reply;
- __u8 cpu_idx;
- __be16 len;
+ WR_HDR;
+ union opcode_tid ot;
+ __u8 reply;
+ __u8 cpu_idx;
+ __be16 len;
};
/* cpl_set_tcb.reply fields */
@@ -685,129 +687,135 @@ struct cpl_set_tcb {
#define F_NO_REPLY V_NO_REPLY(1U)
struct cpl_set_tcb_field {
- WR_HDR;
- union opcode_tid ot;
- __u8 reply;
- __u8 cpu_idx;
- __be16 word;
- __be64 mask;
- __be64 val;
+ WR_HDR;
+ union opcode_tid ot;
+ __u8 reply;
+ __u8 cpu_idx;
+ __be16 word;
+ __be64 mask;
+ __be64 val;
};
struct cpl_set_tcb_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 rsvd[3];
- __u8 status;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 rsvd[3];
+ __u8 status;
};
struct cpl_pcmd {
- WR_HDR;
- union opcode_tid ot;
- __u8 rsvd[3];
+ WR_HDR;
+ union opcode_tid ot;
+ __u8 rsvd[3];
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 src:1;
- __u8 bundle:1;
- __u8 channel:1;
- __u8 :5;
+ __u8 src:1;
+ __u8 bundle:1;
+ __u8 channel:1;
+ __u8 :5;
#else
- __u8 :5;
- __u8 channel:1;
- __u8 bundle:1;
- __u8 src:1;
+ __u8 :5;
+ __u8 channel:1;
+ __u8 bundle:1;
+ __u8 src:1;
#endif
- __be32 pcmd_parm[2];
+ __be32 pcmd_parm[2];
};
struct cpl_pcmd_reply {
- RSS_HDR
- union opcode_tid ot;
- __u8 status;
- __u8 rsvd;
- __be16 len;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 status;
+ __u8 rsvd;
+ __be16 len;
};
struct cpl_close_con_req {
- WR_HDR;
- union opcode_tid ot;
- __be32 rsvd;
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 rsvd;
};
struct cpl_close_con_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 rsvd[3];
- __u8 status;
- __be32 snd_nxt;
- __be32 rcv_nxt;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 rsvd[3];
+ __u8 status;
+ __be32 snd_nxt;
+ __be32 rcv_nxt;
};
struct cpl_close_listserv_req {
- WR_HDR;
- union opcode_tid ot;
- __u8 rsvd0;
- __u8 cpu_idx;
- __be16 rsvd1;
+ WR_HDR;
+ union opcode_tid ot;
+ __u8 rsvd0;
+ __u8 cpu_idx;
+ __be16 rsvd1;
};
struct cpl_close_listserv_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 rsvd[3];
- __u8 status;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 rsvd[3];
+ __u8 status;
};
struct cpl_abort_req_rss {
- RSS_HDR
- union opcode_tid ot;
- __be32 rsvd0;
- __u8 rsvd1;
- __u8 status;
- __u8 rsvd2[6];
+ RSS_HDR
+ union opcode_tid ot;
+ __be32 rsvd0;
+ __u8 rsvd1;
+ __u8 status;
+ __u8 rsvd2[6];
};
struct cpl_abort_req {
- WR_HDR;
- union opcode_tid ot;
- __be32 rsvd0;
- __u8 rsvd1;
- __u8 cmd;
- __u8 rsvd2[6];
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 rsvd0;
+ __u8 rsvd1;
+ __u8 cmd;
+ __u8 rsvd2[6];
};
struct cpl_abort_rpl_rss {
- RSS_HDR
- union opcode_tid ot;
- __be32 rsvd0;
- __u8 rsvd1;
- __u8 status;
- __u8 rsvd2[6];
+ RSS_HDR
+ union opcode_tid ot;
+ __be32 rsvd0;
+ __u8 rsvd1;
+ __u8 status;
+ __u8 rsvd2[6];
};
struct cpl_abort_rpl {
- WR_HDR;
- union opcode_tid ot;
- __be32 rsvd0;
- __u8 rsvd1;
- __u8 cmd;
- __u8 rsvd2[6];
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 rsvd0;
+ __u8 rsvd1;
+ __u8 cmd;
+ __u8 rsvd2[6];
};
struct cpl_peer_close {
- RSS_HDR
- union opcode_tid ot;
- __be32 rcv_nxt;
+ RSS_HDR
+ union opcode_tid ot;
+ __be32 rcv_nxt;
};
struct tx_data_wr {
- __be32 wr_hi;
- __be32 wr_lo;
- __be32 len;
- __be32 flags;
- __be32 sndseq;
- __be32 param;
+ __be32 wr_hi;
+ __be32 wr_lo;
+ __be32 len;
+ __be32 flags;
+ __be32 sndseq;
+ __be32 param;
};
+/* tx_data_wr.flags fields */
+#define S_TX_ACK_PAGES 21
+#define M_TX_ACK_PAGES 0x7
+#define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES)
+#define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES)
+
/* tx_data_wr.param fields */
#define S_TX_PORT 0
#define M_TX_PORT 0x7
@@ -830,11 +838,11 @@ struct tx_data_wr {
#define G_TX_SNDBUF(x) (((x) >> S_TX_SNDBUF) & M_TX_SNDBUF)
struct cpl_tx_data {
- union opcode_tid ot;
- __be32 len;
- __be32 rsvd;
- __be16 urg;
- __be16 flags;
+ union opcode_tid ot;
+ __be32 len;
+ __be32 rsvd;
+ __be16 urg;
+ __be16 flags;
};
/* cpl_tx_data.flags fields */
@@ -883,49 +891,49 @@ struct cpl_tx_data {
#define F_TX_IMM_DMA V_TX_IMM_DMA(1U)
struct cpl_tx_data_ack {
- RSS_HDR
- union opcode_tid ot;
- __be32 ack_seq;
+ RSS_HDR
+ union opcode_tid ot;
+ __be32 ack_seq;
};
struct cpl_wr_ack {
- RSS_HDR
- union opcode_tid ot;
- __be16 credits;
- __be16 rsvd;
- __be32 snd_nxt;
- __be32 snd_una;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 credits;
+ __be16 rsvd;
+ __be32 snd_nxt;
+ __be32 snd_una;
};
struct cpl_rdma_ec_status {
- RSS_HDR
- union opcode_tid ot;
- __u8 rsvd[3];
- __u8 status;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 rsvd[3];
+ __u8 status;
};
struct mngt_pktsched_wr {
- __be32 wr_hi;
- __be32 wr_lo;
- __u8 mngt_opcode;
- __u8 rsvd[7];
- __u8 sched;
- __u8 idx;
- __u8 min;
- __u8 max;
- __u8 binding;
- __u8 rsvd1[3];
+ __be32 wr_hi;
+ __be32 wr_lo;
+ __u8 mngt_opcode;
+ __u8 rsvd[7];
+ __u8 sched;
+ __u8 idx;
+ __u8 min;
+ __u8 max;
+ __u8 binding;
+ __u8 rsvd1[3];
};
struct cpl_iscsi_hdr {
- RSS_HDR
- union opcode_tid ot;
- __be16 pdu_len_ddp;
- __be16 len;
- __be32 seq;
- __be16 urg;
- __u8 rsvd;
- __u8 status;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 pdu_len_ddp;
+ __be16 len;
+ __be32 seq;
+ __be16 urg;
+ __u8 rsvd;
+ __u8 status;
};
/* cpl_iscsi_hdr.pdu_len_ddp fields */
@@ -939,30 +947,30 @@ struct cpl_iscsi_hdr {
#define F_ISCSI_DDP V_ISCSI_DDP(1U)
struct cpl_rx_data {
- RSS_HDR
- union opcode_tid ot;
- __be16 rsvd;
- __be16 len;
- __be32 seq;
- __be16 urg;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 rsvd;
+ __be16 len;
+ __be32 seq;
+ __be16 urg;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 dack_mode:2;
- __u8 psh:1;
- __u8 heartbeat:1;
- __u8 :4;
+ __u8 dack_mode:2;
+ __u8 psh:1;
+ __u8 heartbeat:1;
+ __u8 :4;
#else
- __u8 :4;
- __u8 heartbeat:1;
- __u8 psh:1;
- __u8 dack_mode:2;
+ __u8 :4;
+ __u8 heartbeat:1;
+ __u8 psh:1;
+ __u8 dack_mode:2;
#endif
- __u8 status;
+ __u8 status;
};
struct cpl_rx_data_ack {
- WR_HDR;
- union opcode_tid ot;
- __be32 credit_dack;
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 credit_dack;
};
/* cpl_rx_data_ack.ack_seq fields */
@@ -989,29 +997,29 @@ struct cpl_rx_data_ack {
#define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U)
struct cpl_rx_urg_notify {
- RSS_HDR
- union opcode_tid ot;
- __be32 seq;
+ RSS_HDR
+ union opcode_tid ot;
+ __be32 seq;
};
struct cpl_rx_ddp_complete {
- RSS_HDR
- union opcode_tid ot;
- __be32 ddp_report;
+ RSS_HDR
+ union opcode_tid ot;
+ __be32 ddp_report;
};
struct cpl_rx_data_ddp {
- RSS_HDR
- union opcode_tid ot;
- __be16 urg;
- __be16 len;
- __be32 seq;
- union {
- __be32 nxt_seq;
- __be32 ddp_report;
- } __U;
- __be32 ulp_crc;
- __be32 ddpvld_status;
+ RSS_HDR
+ union opcode_tid ot;
+ __be16 urg;
+ __be16 len;
+ __be32 seq;
+ union {
+ __be32 nxt_seq;
+ __be32 ddp_report;
+ } u;
+ __be32 ulp_crc;
+ __be32 ddpvld_status;
};
/* cpl_rx_data_ddp.ddpvld_status fields */
@@ -1109,18 +1117,18 @@ struct cpl_rx_data_ddp {
#define F_DDP_BUF_IDX V_DDP_BUF_IDX(1U)
struct cpl_tx_pkt {
- WR_HDR;
- __be32 cntrl;
- __be32 len;
+ WR_HDR;
+ __be32 cntrl;
+ __be32 len;
};
struct cpl_tx_pkt_lso {
- WR_HDR;
- __be32 cntrl;
- __be32 len;
+ WR_HDR;
+ __be32 cntrl;
+ __be32 len;
- __be32 rsvd;
- __be32 lso_info;
+ __be32 rsvd;
+ __be32 lso_info;
};
/* cpl_tx_pkt*.cntrl fields */
@@ -1182,64 +1190,64 @@ struct cpl_tx_pkt_lso {
struct cpl_trace_pkt {
#ifdef CHELSIO_FW
- __u8 rss_opcode;
+ __u8 rss_opcode;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 err:1;
- __u8 :7;
+ __u8 err:1;
+ __u8 :7;
#else
- __u8 :7;
- __u8 err:1;
+ __u8 :7;
+ __u8 err:1;
#endif
- __u8 rsvd0;
+ __u8 rsvd0;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 qid:4;
- __u8 :4;
+ __u8 qid:4;
+ __u8 :4;
#else
- __u8 :4;
- __u8 qid:4;
+ __u8 :4;
+ __u8 qid:4;
#endif
- __be32 tstamp;
+ __be32 tstamp;
#endif /* CHELSIO_FW */
- __u8 opcode;
+ __u8 opcode;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 iff:4;
- __u8 :4;
+ __u8 iff:4;
+ __u8 :4;
#else
- __u8 :4;
- __u8 iff:4;
+ __u8 :4;
+ __u8 iff:4;
#endif
- __u8 rsvd[4];
- __be16 len;
+ __u8 rsvd[4];
+ __be16 len;
};
struct cpl_rx_pkt {
- RSS_HDR
- __u8 opcode;
+ RSS_HDR
+ __u8 opcode;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 iff:4;
- __u8 csum_valid:1;
- __u8 ipmi_pkt:1;
- __u8 vlan_valid:1;
- __u8 fragment:1;
+ __u8 iff:4;
+ __u8 csum_valid:1;
+ __u8 ipmi_pkt:1;
+ __u8 vlan_valid:1;
+ __u8 fragment:1;
#else
- __u8 fragment:1;
- __u8 vlan_valid:1;
- __u8 ipmi_pkt:1;
- __u8 csum_valid:1;
- __u8 iff:4;
+ __u8 fragment:1;
+ __u8 vlan_valid:1;
+ __u8 ipmi_pkt:1;
+ __u8 csum_valid:1;
+ __u8 iff:4;
#endif
- __be16 csum;
- __be16 vlan;
- __be16 len;
+ __be16 csum;
+ __be16 vlan;
+ __be16 len;
};
struct cpl_l2t_write_req {
- WR_HDR;
- union opcode_tid ot;
- __be32 params;
- __u8 rsvd[2];
- __u8 dst_mac[6];
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 params;
+ __u8 rsvd[2];
+ __u8 dst_mac[6];
};
/* cpl_l2t_write_req.params fields */
@@ -1264,25 +1272,25 @@ struct cpl_l2t_write_req {
#define G_L2T_W_PRIO(x) (((x) >> S_L2T_W_PRIO) & M_L2T_W_PRIO)
struct cpl_l2t_write_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 status;
- __u8 rsvd[3];
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 status;
+ __u8 rsvd[3];
};
struct cpl_l2t_read_req {
- WR_HDR;
- union opcode_tid ot;
- __be16 rsvd;
- __be16 l2t_idx;
+ WR_HDR;
+ union opcode_tid ot;
+ __be16 rsvd;
+ __be16 l2t_idx;
};
struct cpl_l2t_read_rpl {
- RSS_HDR
- union opcode_tid ot;
- __be32 params;
- __u8 rsvd[2];
- __u8 dst_mac[6];
+ RSS_HDR
+ union opcode_tid ot;
+ __be32 params;
+ __u8 rsvd[2];
+ __u8 dst_mac[6];
};
/* cpl_l2t_read_rpl.params fields */
@@ -1307,66 +1315,66 @@ struct cpl_l2t_read_rpl {
#define G_L2T_STATUS(x) (((x) >> S_L2T_STATUS) & M_L2T_STATUS)
struct cpl_smt_write_req {
- WR_HDR;
- union opcode_tid ot;
- __u8 rsvd0;
+ WR_HDR;
+ union opcode_tid ot;
+ __u8 rsvd0;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 mtu_idx:4;
- __u8 iff:4;
+ __u8 mtu_idx:4;
+ __u8 iff:4;
#else
- __u8 iff:4;
- __u8 mtu_idx:4;
+ __u8 iff:4;
+ __u8 mtu_idx:4;
#endif
- __be16 rsvd2;
- __be16 rsvd3;
- __u8 src_mac1[6];
- __be16 rsvd4;
- __u8 src_mac0[6];
+ __be16 rsvd2;
+ __be16 rsvd3;
+ __u8 src_mac1[6];
+ __be16 rsvd4;
+ __u8 src_mac0[6];
};
struct cpl_smt_write_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 status;
- __u8 rsvd[3];
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 status;
+ __u8 rsvd[3];
};
struct cpl_smt_read_req {
- WR_HDR;
- union opcode_tid ot;
- __u8 rsvd0;
+ WR_HDR;
+ union opcode_tid ot;
+ __u8 rsvd0;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 :4;
- __u8 iff:4;
+ __u8 :4;
+ __u8 iff:4;
#else
- __u8 iff:4;
- __u8 :4;
+ __u8 iff:4;
+ __u8 :4;
#endif
- __be16 rsvd2;
+ __be16 rsvd2;
};
struct cpl_smt_read_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 status;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 status;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 mtu_idx:4;
- __u8 :4;
+ __u8 mtu_idx:4;
+ __u8 :4;
#else
- __u8 :4;
- __u8 mtu_idx:4;
+ __u8 :4;
+ __u8 mtu_idx:4;
#endif
- __be16 rsvd2;
- __be16 rsvd3;
- __u8 src_mac1[6];
- __be16 rsvd4;
- __u8 src_mac0[6];
+ __be16 rsvd2;
+ __be16 rsvd3;
+ __u8 src_mac1[6];
+ __be16 rsvd4;
+ __u8 src_mac0[6];
};
struct cpl_rte_delete_req {
- WR_HDR;
- union opcode_tid ot;
- __be32 params;
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 params;
};
/* { cpl_rte_delete_req, cpl_rte_read_req }.params fields */
@@ -1385,30 +1393,30 @@ struct cpl_rte_delete_req {
#define F_RTE_READ_REQ_SELECT V_RTE_READ_REQ_SELECT(1U)
struct cpl_rte_delete_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 status;
- __u8 rsvd[3];
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 status;
+ __u8 rsvd[3];
};
struct cpl_rte_write_req {
- WR_HDR;
- union opcode_tid ot;
+ WR_HDR;
+ union opcode_tid ot;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 :6;
- __u8 write_tcam:1;
- __u8 write_l2t_lut:1;
+ __u8 :6;
+ __u8 write_tcam:1;
+ __u8 write_l2t_lut:1;
#else
- __u8 write_l2t_lut:1;
- __u8 write_tcam:1;
- __u8 :6;
+ __u8 write_l2t_lut:1;
+ __u8 write_tcam:1;
+ __u8 :6;
#endif
- __u8 rsvd[3];
- __be32 lut_params;
- __be16 rsvd2;
- __be16 l2t_idx;
- __be32 netmask;
- __be32 faddr;
+ __u8 rsvd[3];
+ __be32 lut_params;
+ __be16 rsvd2;
+ __be16 l2t_idx;
+ __be32 netmask;
+ __be32 faddr;
};
/* cpl_rte_write_req.lut_params fields */
@@ -1423,68 +1431,68 @@ struct cpl_rte_write_req {
#define G_RTE_WRITE_REQ_LUT_BASE(x) (((x) >> S_RTE_WRITE_REQ_LUT_BASE) & M_RTE_WRITE_REQ_LUT_BASE)
struct cpl_rte_write_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 status;
- __u8 rsvd[3];
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 status;
+ __u8 rsvd[3];
};
struct cpl_rte_read_req {
- WR_HDR;
- union opcode_tid ot;
- __be32 params;
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 params;
};
struct cpl_rte_read_rpl {
- RSS_HDR
- union opcode_tid ot;
- __u8 status;
- __u8 rsvd0;
- __be16 l2t_idx;
+ RSS_HDR
+ union opcode_tid ot;
+ __u8 status;
+ __u8 rsvd0;
+ __be16 l2t_idx;
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 :7;
- __u8 select:1;
+ __u8 :7;
+ __u8 select:1;
#else
- __u8 select:1;
- __u8 :7;
+ __u8 select:1;
+ __u8 :7;
#endif
- __u8 rsvd2[3];
- __be32 addr;
+ __u8 rsvd2[3];
+ __be32 addr;
};
struct cpl_tid_release {
- WR_HDR;
- union opcode_tid ot;
- __be32 rsvd;
+ WR_HDR;
+ union opcode_tid ot;
+ __be32 rsvd;
};
struct cpl_barrier {
- WR_HDR;
- __u8 opcode;
- __u8 rsvd[7];
+ WR_HDR;
+ __u8 opcode;
+ __u8 rsvd[7];
};
struct cpl_rdma_read_req {
- __u8 opcode;
- __u8 rsvd[15];
+ __u8 opcode;
+ __u8 rsvd[15];
};
struct cpl_rdma_terminate {
#ifdef CHELSIO_FW
- __u8 opcode;
- __u8 rsvd[2];
+ __u8 opcode;
+ __u8 rsvd[2];
#if defined(__LITTLE_ENDIAN_BITFIELD)
- __u8 rspq:3;
- __u8 :5;
+ __u8 rspq:3;
+ __u8 :5;
#else
- __u8 :5;
- __u8 rspq:3;
+ __u8 :5;
+ __u8 rspq:3;
#endif
- __be32 tid_len;
+ __be32 tid_len;
#endif
- __be32 msn;
- __be32 mo;
- __u8 data[0];
+ __be32 msn;
+ __be32 mo;
+ __u8 data[0];
};
/* cpl_rdma_terminate.tid_len fields */
@@ -1510,12 +1518,12 @@ enum { ULP_MEM_READ = 2, ULP_MEM_WRITE = 3, ULP_TXPKT = 4 };
#define V_ULPTX_NFLITS(x) ((x) << S_ULPTX_NFLITS)
struct ulp_mem_io {
- WR_HDR;
- __be32 cmd_lock_addr;
- __be32 len;
+ WR_HDR;
+ __be32 cmd_lock_addr;
+ __be32 len;
};
- /* ulp_mem_io.cmd_lock_addr fields */
+/* ulp_mem_io.cmd_lock_addr fields */
#define S_ULP_MEMIO_ADDR 0
#define M_ULP_MEMIO_ADDR 0x7FFFFFF
#define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR)
@@ -1524,17 +1532,17 @@ struct ulp_mem_io {
#define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK)
#define F_ULP_MEMIO_LOCK V_ULP_MEMIO_LOCK(1U)
- /* ulp_mem_io.len fields */
+/* ulp_mem_io.len fields */
#define S_ULP_MEMIO_DATA_LEN 28
#define M_ULP_MEMIO_DATA_LEN 0xF
#define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN)
struct ulp_txpkt {
- __be32 cmd_dest;
- __be32 len;
+ __be32 cmd_dest;
+ __be32 len;
};
- /* ulp_txpkt.cmd_dest fields */
+/* ulp_txpkt.cmd_dest fields */
#define S_ULP_TXPKT_DEST 24
#define M_ULP_TXPKT_DEST 0xF
#define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST)
diff --git a/sys/dev/pci/cxgb_toedev.h b/sys/dev/pci/cxgb_toedev.h
index 0c0d4b6199b..3c62e09b967 100644
--- a/sys/dev/pci/cxgb_toedev.h
+++ b/sys/dev/pci/cxgb_toedev.h
@@ -37,17 +37,17 @@ $FreeBSD: src/sys/dev/cxgb/ulp/toecore/toedev.h,v 1.1 2007/05/25 16:17:59 kmacy
/* Parameter values for offload_get_phys_egress() */
enum {
- TOE_OPEN,
- TOE_FAILOVER,
+ TOE_OPEN,
+ TOE_FAILOVER,
};
/* Parameter values for toe_failover() */
enum {
- TOE_ACTIVE_SLAVE,
- TOE_LINK_DOWN,
- TOE_LINK_UP,
- TOE_RELEASE,
- TOE_RELEASE_ALL,
+ TOE_ACTIVE_SLAVE,
+ TOE_LINK_DOWN,
+ TOE_LINK_UP,
+ TOE_RELEASE,
+ TOE_RELEASE_ALL,
};
@@ -61,16 +61,16 @@ enum {
/* offload type ids */
enum {
- TOE_ID_CHELSIO_T1 = 1,
- TOE_ID_CHELSIO_T1C,
- TOE_ID_CHELSIO_T2,
- TOE_ID_CHELSIO_T3,
- TOE_ID_CHELSIO_T3B,
+ TOE_ID_CHELSIO_T1 = 1,
+ TOE_ID_CHELSIO_T1C,
+ TOE_ID_CHELSIO_T2,
+ TOE_ID_CHELSIO_T3,
+ TOE_ID_CHELSIO_T3B,
};
struct offload_id {
- unsigned int id;
- unsigned long data;
+ unsigned int id;
+ unsigned long data;
};
struct ifnet;
@@ -86,41 +86,41 @@ enum toetype {
};
struct toedev {
- char name[TOENAMSIZ]; /* TOE device name */
- enum toetype type;
- struct adapter *adapter;
- unsigned int ttid; /* TOE type id */
- unsigned long flags; /* device flags */
- unsigned int mtu; /* max size of TX offloaded data */
- unsigned int nconn; /* max # of offloaded connections */
- struct ifnet *lldev; /* LL device associated with TOE messages */
- const struct tom_info *offload_mod; /* attached TCP offload module */
- struct sysctl_oid *sysctl_root; /* root of proc dir for this TOE */
- TAILQ_ENTRY(toedev) ofld_entry; /* for list linking */
- int (*open)(struct toedev *dev);
- int (*close)(struct toedev *dev);
- int (*can_offload)(struct toedev *dev, struct socket *so);
- int (*connect)(struct toedev *dev, struct socket *so,
- struct ifnet *egress_ifp);
- int (*send)(struct toedev *dev, struct mbuf *m);
- int (*recv)(struct toedev *dev, struct mbuf **m, int n);
- int (*ctl)(struct toedev *dev, unsigned int req, void *data);
- void (*neigh_update)(struct toedev *dev, struct rtentry *neigh);
- void (*failover)(struct toedev *dev, struct ifnet *bond_ifp,
- struct ifnet *ndev, int event);
- void *priv; /* driver private data */
- void *l2opt; /* optional layer 2 data */
- void *l3opt; /* optional layer 3 data */
- void *l4opt; /* optional layer 4 data */
- void *ulp; /* ulp stuff */
+ char name[TOENAMSIZ]; /* TOE device name */
+ enum toetype type;
+ struct adapter *adapter;
+ unsigned int ttid; /* TOE type id */
+ unsigned long flags; /* device flags */
+ unsigned int mtu; /* max size of TX offloaded data */
+ unsigned int nconn; /* max # of offloaded connections */
+ struct ifnet *lldev; /* LL device associated with TOE messages */
+ const struct tom_info *offload_mod; /* attached TCP offload module */
+ struct sysctl_oid *sysctl_root; /* root of proc dir for this TOE */
+ TAILQ_ENTRY(toedev) ofld_entry; /* for list linking */
+ int (*open)(struct toedev *dev);
+ int (*close)(struct toedev *dev);
+ int (*can_offload)(struct toedev *dev, struct socket *so);
+ int (*connect)(struct toedev *dev, struct socket *so,
+ struct ifnet *egress_ifp);
+ int (*send)(struct toedev *dev, struct mbuf *m);
+ int (*recv)(struct toedev *dev, struct mbuf **m, int n);
+ int (*ctl)(struct toedev *dev, unsigned int req, void *data);
+ void (*neigh_update)(struct toedev *dev, struct rtentry *neigh);
+ void (*failover)(struct toedev *dev, struct ifnet *bond_ifp,
+ struct ifnet *ndev, int event);
+ void *priv; /* driver private data */
+ void *l2opt; /* optional layer 2 data */
+ void *l3opt; /* optional layer 3 data */
+ void *l4opt; /* optional layer 4 data */
+ void *ulp; /* ulp stuff */
};
struct tom_info {
- int (*attach)(struct toedev *dev, const struct offload_id *entry);
- int (*detach)(struct toedev *dev);
- const char *name;
- const struct offload_id *id_table;
- TAILQ_ENTRY(tom_info) entry;
+ int (*attach)(struct toedev *dev, const struct offload_id *entry);
+ int (*detach)(struct toedev *dev);
+ const char *name;
+ const struct offload_id *id_table;
+ TAILQ_ENTRY(tom_info) entry;
};
static inline void init_offload_dev(struct toedev *dev)
@@ -135,14 +135,14 @@ extern int unregister_toedev(struct toedev *dev);
extern int activate_offload(struct toedev *dev);
extern int toe_send(struct toedev *dev, struct mbuf *m);
extern struct ifnet *offload_get_phys_egress(struct ifnet *dev,
- struct socket *so,
- int context);
+ struct socket *so,
+ int context);
#if defined(CONFIG_TCP_OFFLOAD_MODULE)
static inline int toe_receive_mbuf(struct toedev *dev, struct mbuf **m,
- int n)
+ int n)
{
- return dev->recv(dev, m, n);
+ return dev->recv(dev, m, n);
}
extern int prepare_tcp_for_offload(void);
@@ -155,18 +155,18 @@ extern int toe_receive_mbuf(struct toedev *dev, struct mbuf **m, int n);
(defined(CONFIG_TCP_OFFLOAD_MODULE) && defined(MODULE))
extern void toe_neigh_update(struct rtentry *neigh);
extern void toe_failover(struct ifnet *bond_ifp,
- struct ifnet *fail_ifp, int event);
+ struct ifnet *fail_ifp, int event);
extern int toe_enslave(struct ifnet *bond_ifp,
- struct ifnet *slave_ifp);
+ struct ifnet *slave_ifp);
#else
static inline void toe_neigh_update(struct ifnet *neigh) {}
static inline void toe_failover(struct ifnet *bond_ifp,
- struct ifnet *fail_ifp, int event)
+ struct ifnet *fail_ifp, int event)
{}
static inline int toe_enslave(struct ifnet *bond_ifp,
- struct ifnet *slave_ifp)
+ struct ifnet *slave_ifp)
{
- return 0;
+ return 0;
}
#endif /* CONFIG_TCP_OFFLOAD */