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authornonaka <nonaka@NetBSD.org>2010-03-27 03:04:51 +0000
committernonaka <nonaka@NetBSD.org>2010-03-27 03:04:51 +0000
commit821373d09b2857756f6bc7eb0799674969571f4f (patch)
treeeae22eaa380a56a3f4715bbd9b08af54bd1d007f /sys/dev
parent6f6b6bc6dfd8c2e47c3e967c4204459345b62c7a (diff)
Added sdhc at cardbus support.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/cardbus/files.cardbus8
-rw-r--r--sys/dev/cardbus/sdhc_cardbus.c207
-rw-r--r--sys/dev/sdmmc/sdhc.c93
-rw-r--r--sys/dev/sdmmc/sdhcvar.h9
4 files changed, 299 insertions, 18 deletions
diff --git a/sys/dev/cardbus/files.cardbus b/sys/dev/cardbus/files.cardbus
index 5ae240f2bbc..564e0cd4d46 100644
--- a/sys/dev/cardbus/files.cardbus
+++ b/sys/dev/cardbus/files.cardbus
@@ -1,4 +1,4 @@
-# $NetBSD: files.cardbus,v 1.35 2009/07/19 06:28:08 kiyohara Exp $
+# $NetBSD: files.cardbus,v 1.36 2010/03/27 03:04:51 nonaka Exp $
#
# files.cardbus
#
@@ -137,3 +137,9 @@ file dev/cardbus/njata_cardbus.c njata_cardbus
#
attach siisata at cardbus with siisata_cardbus
file dev/cardbus/siisata_cardbus.c siisata_cardbus
+
+#
+# SD Host Controller
+#
+attach sdhc at cardbus with sdhc_cardbus
+file dev/cardbus/sdhc_cardbus.c sdhc_cardbus
diff --git a/sys/dev/cardbus/sdhc_cardbus.c b/sys/dev/cardbus/sdhc_cardbus.c
new file mode 100644
index 00000000000..8febd719cb7
--- /dev/null
+++ b/sys/dev/cardbus/sdhc_cardbus.c
@@ -0,0 +1,207 @@
+/* $NetBSD: sdhc_cardbus.c,v 1.1 2010/03/27 03:04:51 nonaka Exp $ */
+
+/*
+ * Copyright (c) 2010 NONAKA Kimihiro <nonaka@netbsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: sdhc_cardbus.c,v 1.1 2010/03/27 03:04:51 nonaka Exp $");
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/pmf.h>
+
+#include <dev/cardbus/cardbusvar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <dev/sdmmc/sdhcreg.h>
+#include <dev/sdmmc/sdhcvar.h>
+#include <dev/sdmmc/sdmmcvar.h>
+
+/* PCI interface classes */
+#define SDHC_PCI_INTERFACE_NO_DMA 0x00
+#define SDHC_PCI_INTERFACE_DMA 0x01
+#define SDHC_PCI_INTERFACE_VENDOR 0x02
+
+/*
+ * 8-bit PCI configuration register that tells us how many slots there
+ * are and which BAR entry corresponds to the first slot.
+ */
+#define SDHC_PCI_CONF_SLOT_INFO 0x40
+#define SDHC_PCI_NUM_SLOTS(info) ((((info) >> 4) & 0x7) + 1)
+#define SDHC_PCI_FIRST_BAR(info) ((info) & 0x7)
+
+struct sdhc_cardbus_softc {
+ struct sdhc_softc sc;
+ cardbus_chipset_tag_t sc_cc;
+ cardbus_function_tag_t sc_cf;
+ cardbus_devfunc_t sc_ct;
+ pcitag_t sc_tag;
+ bus_space_tag_t sc_iot; /* CardBus I/O space tag */
+ bus_space_tag_t sc_memt; /* CardBus MEM space tag */
+ rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */
+ rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */
+
+ void *sc_ih;
+};
+
+static int sdhc_cardbus_match(device_t, cfdata_t, void *);
+static void sdhc_cardbus_attach(device_t, device_t, void *);
+static int sdhc_cardbus_detach(device_t, int);
+
+CFATTACH_DECL_NEW(sdhc_cardbus, sizeof(struct sdhc_cardbus_softc),
+ sdhc_cardbus_match, sdhc_cardbus_attach, sdhc_cardbus_detach, NULL);
+
+#ifdef SDHC_DEBUG
+#define DPRINTF(s) printf s
+#else
+#define DPRINTF(s) /**/
+#endif
+
+static int
+sdhc_cardbus_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct cardbus_attach_args *ca = aux;
+
+ if (PCI_CLASS(ca->ca_class) == PCI_CLASS_SYSTEM &&
+ PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SYSTEM_SDHC)
+ return 3;
+
+ return 0;
+}
+
+static void
+sdhc_cardbus_attach(device_t parent, device_t self, void *aux)
+{
+ struct sdhc_cardbus_softc *sc = device_private(self);
+ struct cardbus_attach_args *ca = aux;
+ cardbus_devfunc_t ct = ca->ca_ct;
+ cardbus_chipset_tag_t cc = ct->ct_cc;
+ cardbus_function_tag_t cf = ct->ct_cf;
+ pcireg_t csr;
+ pcireg_t slotinfo;
+ char devinfo[256];
+ int nslots;
+ bus_space_tag_t iot;
+ bus_space_handle_t ioh;
+ bus_size_t size;
+
+ sc->sc.sc_dev = self;
+ sc->sc.sc_dmat = ca->ca_dmat;
+ sc->sc.sc_host = NULL;
+
+ sc->sc_cc = cc;
+ sc->sc_cf = cf;
+ sc->sc_ct = ct;
+ sc->sc_tag = ca->ca_tag;
+
+ sc->sc_iot = ca->ca_iot;
+ sc->sc_memt = ca->ca_memt;
+ sc->sc_rbus_iot = ca->ca_rbus_iot;
+ sc->sc_rbus_memt = ca->ca_rbus_memt;
+
+ pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
+ aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
+ PCI_REVISION(ca->ca_class));
+ aprint_naive("\n");
+
+ /*
+ * Map and attach all hosts supported by the host controller.
+ */
+ slotinfo = Cardbus_conf_read(ct, ca->ca_tag, SDHC_PCI_CONF_SLOT_INFO);
+ nslots = SDHC_PCI_NUM_SLOTS(slotinfo);
+ KASSERT(nslots == 1);
+
+ /* Allocate an array big enough to hold all the possible hosts */
+ sc->sc.sc_host = malloc(sizeof(struct sdhc_host *) * nslots,
+ M_DEVBUF, M_NOWAIT | M_ZERO);
+ if (sc->sc.sc_host == NULL) {
+ aprint_error_dev(self, "couldn't alloc memory\n");
+ goto err;
+ }
+
+ /* Enable the device. */
+ csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG);
+ Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG,
+ csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE);
+
+ /* Establish the interrupt. */
+ sc->sc_ih = Cardbus_intr_establish(ct, ca->ca_intrline, IPL_SDMMC,
+ sdhc_intr, &sc->sc);
+ if (sc->sc_ih == NULL) {
+ aprint_error_dev(self, "couldn't establish interrupt\n");
+ goto err;
+ }
+
+ /* Enable use of DMA if supported by the interface. */
+ if ((PCI_INTERFACE(ca->ca_class) == SDHC_PCI_INTERFACE_DMA))
+ SET(sc->sc.sc_flags, SDHC_FLAG_USE_DMA);
+
+ if (Cardbus_mapreg_map(ct, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
+ &iot, &ioh, NULL, &size)) {
+ aprint_error_dev(self, "couldn't map register\n");
+ goto err;
+ }
+
+ if (sdhc_host_found(&sc->sc, iot, ioh, size) != 0) {
+ aprint_error_dev(self, "couldn't initialize host\n");
+ goto err;
+ }
+
+ if (!pmf_device_register1(self, sdhc_suspend, sdhc_resume,
+ sdhc_shutdown)) {
+ aprint_error_dev(self, "couldn't establish powerhook\n");
+ }
+
+ return;
+
+err:
+ if (sc->sc_ih != NULL)
+ Cardbus_intr_disestablish(ct, sc->sc_ih);
+ if (sc->sc.sc_host != NULL)
+ free(sc->sc.sc_host, M_DEVBUF);
+}
+
+static int
+sdhc_cardbus_detach(device_t self, int flags)
+{
+ struct sdhc_cardbus_softc *sc = device_private(self);
+ struct cardbus_devfunc *ct = sc->sc_ct;
+ int rv;
+
+ rv = sdhc_detach((device_t)sc->sc.sc_host[0], flags);
+ if (rv)
+ return rv;
+ if (sc->sc_ih != NULL) {
+ Cardbus_intr_disestablish(ct, sc->sc_ih);
+ sc->sc_ih = NULL;
+ }
+ if (sc->sc.sc_host != NULL) {
+ free(sc->sc.sc_host, M_DEVBUF);
+ sc->sc.sc_host = NULL;
+ }
+ return 0;
+}
diff --git a/sys/dev/sdmmc/sdhc.c b/sys/dev/sdmmc/sdhc.c
index b155988c974..179ba2e3a0c 100644
--- a/sys/dev/sdmmc/sdhc.c
+++ b/sys/dev/sdmmc/sdhc.c
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc.c,v 1.6 2010/02/24 22:38:08 dyoung Exp $ */
+/* $NetBSD: sdhc.c,v 1.7 2010/03/27 03:04:52 nonaka Exp $ */
/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
/*
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.6 2010/02/24 22:38:08 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.7 2010/03/27 03:04:52 nonaka Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -121,6 +121,7 @@ static int sdhc_wait_state(struct sdhc_host *, uint32_t, uint32_t);
static int sdhc_soft_reset(struct sdhc_host *, int);
static int sdhc_wait_intr(struct sdhc_host *, int, int);
static void sdhc_transfer_data(struct sdhc_host *, struct sdmmc_command *);
+static int sdhc_transfer_data_dma(struct sdhc_host *, struct sdmmc_command *);
static int sdhc_transfer_data_pio(struct sdhc_host *, struct sdmmc_command *);
static void sdhc_read_data_pio(struct sdhc_host *, uint8_t *, int);
static void sdhc_write_data_pio(struct sdhc_host *, uint8_t *, int);
@@ -225,7 +226,7 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
hp->clkbase = SDHC_BASE_FREQ_KHZ(caps);
if (hp->clkbase == 0) {
/* The attachment driver must tell us. */
- aprint_error_dev(sc->sc_dev,"unknown base clock frequency\n");
+ aprint_error_dev(sc->sc_dev, "unknown base clock frequency\n");
goto err;
} else if (hp->clkbase < 10000 || hp->clkbase > 63000) {
/* SDHC 1.0 supports only 10-63 MHz. */
@@ -294,7 +295,6 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
if (ISSET(hp->flags, SHF_USE_DMA))
saa.saa_caps |= SMC_CAPS_DMA;
#endif
-
hp->sdmmc = config_found(sc->sc_dev, &saa, NULL);
return 0;
@@ -309,6 +309,25 @@ err1:
return 1;
}
+int
+sdhc_detach(device_t dev, int flags)
+{
+ struct sdhc_host *hp = (struct sdhc_host *)dev;
+ struct sdhc_softc *sc = hp->sc;
+ int rv = 0;
+
+ if (hp->sdmmc)
+ rv = config_detach(hp->sdmmc, flags);
+
+ cv_destroy(&hp->intr_cv);
+ mutex_destroy(&hp->intr_mtx);
+ mutex_destroy(&hp->host_mtx);
+ free(hp, M_DEVBUF);
+ sc->sc_host[--sc->sc_nhosts] = NULL;
+
+ return rv;
+}
+
bool
sdhc_suspend(device_t dev, const pmf_qual_t *qual)
{
@@ -759,10 +778,9 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd)
uint16_t command;
int error;
- DPRINTF(1,("%s: start cmd %d arg=%08x data=%p dlen=%d flags=%08x "
- "proc=%p \"%s\"\n", HDEVNAME(hp), cmd->c_opcode, cmd->c_arg,
- cmd->c_data, cmd->c_datalen, cmd->c_flags, curproc,
- curproc ? curproc->p_comm : ""));
+ DPRINTF(1,("%s: start cmd %d arg=%08x data=%p dlen=%d flags=%08x\n",
+ HDEVNAME(hp), cmd->c_opcode, cmd->c_arg, cmd->c_data,
+ cmd->c_datalen, cmd->c_flags));
/*
* The maximum block length for commands should be the minimum
@@ -799,10 +817,13 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd)
mode |= SDHC_AUTO_CMD12_ENABLE;
}
}
-#if notyet
- if (cmd->c_dmap != NULL && cmd->c_datalen > 0)
- mode |= SDHC_DMA_ENABLE;
-#endif
+ if (cmd->c_dmamap != NULL && cmd->c_datalen > 0) {
+ if (cmd->c_dmamap->dm_nsegs == 1) {
+ mode |= SDHC_DMA_ENABLE;
+ } else {
+ cmd->c_dmamap = NULL;
+ }
+ }
/*
* Prepare command register value. (2.2.6)
@@ -839,6 +860,10 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd)
/* Alert the user not to remove the card. */
HSET1(hp, SDHC_HOST_CTL, SDHC_LED_ON);
+ /* Set DMA start address. */
+ if (ISSET(mode, SDHC_DMA_ENABLE))
+ HWRITE4(hp, SDHC_DMA_ADDR, cmd->c_dmamap->dm_segs[0].ds_addr);
+
/*
* Start a CPU data transfer. Writing to the high order byte
* of the SDHC_COMMAND register triggers the SD command. (1.5)
@@ -873,7 +898,10 @@ sdhc_transfer_data(struct sdhc_host *hp, struct sdmmc_command *cmd)
}
#endif
- error = sdhc_transfer_data_pio(hp, cmd);
+ if (cmd->c_dmamap != NULL)
+ error = sdhc_transfer_data_dma(hp, cmd);
+ else
+ error = sdhc_transfer_data_pio(hp, cmd);
if (error)
cmd->c_error = error;
SET(cmd->c_flags, SCF_ITSDONE);
@@ -883,6 +911,45 @@ sdhc_transfer_data(struct sdhc_host *hp, struct sdmmc_command *cmd)
}
static int
+sdhc_transfer_data_dma(struct sdhc_host *hp, struct sdmmc_command *cmd)
+{
+ bus_dmamap_t dmap = cmd->c_dmamap;
+ uint16_t blklen = cmd->c_blklen;
+ uint16_t blkcnt = cmd->c_datalen / blklen;
+ uint16_t remain;
+ int error = 0;
+
+ for (;;) {
+ if (!sdhc_wait_intr(hp,
+ SDHC_DMA_INTERRUPT|SDHC_TRANSFER_COMPLETE,
+ SDHC_DMA_TIMEOUT)) {
+ error = ETIMEDOUT;
+ break;
+ }
+
+ /* single block mode */
+ if (blkcnt == 1)
+ break;
+
+ /* multi block mode */
+ remain = HREAD2(hp, SDHC_BLOCK_COUNT);
+ if (remain == 0)
+ break;
+
+ HWRITE4(hp, SDHC_DMA_ADDR,
+ dmap->dm_segs[0].ds_addr + (blkcnt - remain) * blklen);
+ }
+
+#if 0
+ if (error == 0 && !sdhc_wait_intr(hp, SDHC_TRANSFER_COMPLETE,
+ SDHC_TRANSFER_TIMEOUT))
+ error = ETIMEDOUT;
+#endif
+
+ return error;
+}
+
+static int
sdhc_transfer_data_pio(struct sdhc_host *hp, struct sdmmc_command *cmd)
{
uint8_t *data = cmd->c_data;
diff --git a/sys/dev/sdmmc/sdhcvar.h b/sys/dev/sdmmc/sdhcvar.h
index 617800f6a18..382d0ff4666 100644
--- a/sys/dev/sdmmc/sdhcvar.h
+++ b/sys/dev/sdmmc/sdhcvar.h
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhcvar.h,v 1.3 2010/02/24 22:38:08 dyoung Exp $ */
+/* $NetBSD: sdhcvar.h,v 1.4 2010/03/27 03:04:52 nonaka Exp $ */
/* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */
/*
@@ -44,8 +44,9 @@ struct sdhc_softc {
int sdhc_host_found(struct sdhc_softc *, bus_space_tag_t,
bus_space_handle_t, bus_size_t);
int sdhc_intr(void *);
-bool sdhc_suspend(device_t dev, const pmf_qual_t *qual);
-bool sdhc_resume(device_t dev, const pmf_qual_t *qual);
-bool sdhc_shutdown(device_t dev, int flags);
+int sdhc_detach(device_t, int);
+bool sdhc_suspend(device_t, const pmf_qual_t *);
+bool sdhc_resume(device_t, const pmf_qual_t *);
+bool sdhc_shutdown(device_t, int);
#endif /* _SDHCVAR_H_ */