summaryrefslogtreecommitdiff
path: root/sys/dev
diff options
context:
space:
mode:
authorsimonb <simonb@NetBSD.org>2007-10-30 07:49:40 +0000
committersimonb <simonb@NetBSD.org>2007-10-30 07:49:40 +0000
commit916b0a21f9758fae7d5f722b6bf024e6dbf8e149 (patch)
treefe2002da762773a8b0c0c07446f56652e16e3dd3 /sys/dev
parent9169c01b1361f11041d55e1273daec0323d5a544 (diff)
Some space-to-tab changes.
XXX: All the recently added ich8 support functions use 4-space indent, not touching that...
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/if_wm.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/sys/dev/pci/if_wm.c b/sys/dev/pci/if_wm.c
index 65d07249695..40722b613f2 100644
--- a/sys/dev/pci/if_wm.c
+++ b/sys/dev/pci/if_wm.c
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.147 2007/10/19 12:00:49 ad Exp $ */
+/* $NetBSD: if_wm.c,v 1.148 2007/10/30 07:49:40 simonb Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.147 2007/10/19 12:00:49 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.148 2007/10/30 07:49:40 simonb Exp $");
#include "bpfilter.h"
#include "rnd.h"
@@ -584,7 +584,7 @@ static int wm_read_eeprom_ich8(struct wm_softc *, int, int, uint16_t *);
static int32_t wm_ich8_cycle_init(struct wm_softc *);
static int32_t wm_ich8_flash_cycle(struct wm_softc *, uint32_t);
static int32_t wm_read_ich8_data(struct wm_softc *, uint32_t,
- uint32_t, uint16_t *);
+ uint32_t, uint16_t *);
static int32_t wm_read_ich8_word(struct wm_softc *sc, uint32_t, uint16_t *);
CFATTACH_DECL(wm, sizeof(struct wm_softc),
@@ -4275,14 +4275,14 @@ wm_gmii_reset(struct wm_softc *sc)
CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
delay(20000);
} else {
- /*
- * With 82543, we need to force speed and duplex on the MAC
- * equal to what the PHY speed and duplex configuration is.
- * In addition, we need to perform a hardware reset on the PHY
- * to take it out of reset.
- */
- sc->sc_ctrl |= CTRL_FRCSPD | CTRL_FRCFDX;
- CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
+ /*
+ * With 82543, we need to force speed and duplex on the MAC
+ * equal to what the PHY speed and duplex configuration is.
+ * In addition, we need to perform a hardware reset on the PHY
+ * to take it out of reset.
+ */
+ sc->sc_ctrl |= CTRL_FRCSPD | CTRL_FRCFDX;
+ CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
/* The PHY reset pin is active-low. */
reg = CSR_READ(sc, WMREG_CTRL_EXT);