diff options
| author | msaitoh <msaitoh@NetBSD.org> | 2017-10-04 11:03:20 +0000 |
|---|---|---|
| committer | msaitoh <msaitoh@NetBSD.org> | 2017-10-04 11:03:20 +0000 |
| commit | 93a60f38843f1a5513818773363906dd672409bd (patch) | |
| tree | ae37505ad6e79fc2ca2b2ec63564b1bfcc3866e5 /sys/dev | |
| parent | 4b8f11500b203bd85d1225cfde41b6809295ccdf (diff) | |
- ixv_enableintr(): Fix a bug that ixv_enable_queue() is called with incorrect
argument. This bug was added in rev. 1.68.
- Don't check neither VTEICR nor VTEICS same as Linux. It seems that both
registers can't be used to check which MSI-X vector is triggered. A bit is
set on very low probability and the bit location is incorrect. Is this an
errata?
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/pci/ixgbe/ixv.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/sys/dev/pci/ixgbe/ixv.c b/sys/dev/pci/ixgbe/ixv.c index 00dda384f72..bd9764ff5bb 100644 --- a/sys/dev/pci/ixgbe/ixv.c +++ b/sys/dev/pci/ixgbe/ixv.c @@ -1,4 +1,4 @@ -/*$NetBSD: ixv.c,v 1.68 2017/10/03 03:12:29 msaitoh Exp $*/ +/*$NetBSD: ixv.c,v 1.69 2017/10/04 11:03:20 msaitoh Exp $*/ /****************************************************************************** @@ -912,20 +912,13 @@ ixv_msix_mbx(void *arg) { struct adapter *adapter = arg; struct ixgbe_hw *hw = &adapter->hw; - u32 reg; ++adapter->link_irq.ev_count; - - /* First get the cause */ - reg = IXGBE_READ_REG(hw, IXGBE_VTEICR); -#if 0 /* NetBSD: We use auto-clear, so it's not required to write VTEICR */ - /* Clear interrupt with write */ - IXGBE_WRITE_REG(hw, IXGBE_VTEICR, (1 << adapter->vector)); -#endif + /* NetBSD: We use auto-clear, so it's not required to write VTEICR */ /* Link status change */ - if (reg & (1 << adapter->vector)) - softint_schedule(adapter->link_si); + hw->mac.get_link_status = TRUE; + softint_schedule(adapter->link_si); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, (1 << adapter->vector)); @@ -1865,6 +1858,7 @@ ixv_enable_intr(struct adapter *adapter) /* For VTEIMS */ IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, (1 << adapter->vector)); + que = adapter->queues; for (i = 0; i < adapter->num_queues; i++, que++) ixv_enable_queue(adapter, que->msix); |
