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authordyoung <dyoung@NetBSD.org>2010-03-23 21:22:25 +0000
committerdyoung <dyoung@NetBSD.org>2010-03-23 21:22:25 +0000
commita75c1e887e7544d90df96dd1b313c8d8d1e82692 (patch)
tree06e745396e2060541e8246fbcc02989ab86ea045 /sys/dev
parent8c6df9756c6673d31cdef85c5deb26f67357ee70 (diff)
Use the PCI BAR type to decide which I/O enables to set.
TBD: Put back the old BAR #definition, s/PCI_BAR(0)/PCI_HME_BASEADDR/.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/if_hme_pci.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/sys/dev/pci/if_hme_pci.c b/sys/dev/pci/if_hme_pci.c
index 59e7c2a61fc..8adc33aa7cb 100644
--- a/sys/dev/pci/if_hme_pci.c
+++ b/sys/dev/pci/if_hme_pci.c
@@ -1,4 +1,4 @@
-/* $NetBSD: if_hme_pci.c,v 1.32 2010/03/11 04:00:36 mrg Exp $ */
+/* $NetBSD: if_hme_pci.c,v 1.33 2010/03/23 21:22:25 dyoung Exp $ */
/*
* Copyright (c) 2000 Matthew R. Green
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_hme_pci.c,v 1.32 2010/03/11 04:00:36 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_hme_pci.c,v 1.33 2010/03/23 21:22:25 dyoung Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -144,23 +144,24 @@ hmeattach_pci(device_t parent, device_t self, void *aux)
PCI_REVISION(pa->pa_class));
aprint_naive(": Ethernet controller\n");
+ csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
+ type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0));
+
/*
* enable io/memory-space accesses. this is kinda of gross; but
- # the hme comes up with neither IO space enabled, or memory space.
+ * the hme comes up with neither IO space enabled, or memory space.
*/
- if (pa->pa_memt)
+ switch (type) {
+ case PCI_MAPREG_TYPE_MEM:
pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
- if (pa->pa_iot)
- pa->pa_flags |= PCI_FLAGS_IO_ENABLED;
- csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
- if (pa->pa_memt) {
- type = PCI_MAPREG_TYPE_MEM;
csr |= PCI_COMMAND_MEM_ENABLE;
sc->sc_bustag = pa->pa_memt;
- } else {
- type = PCI_MAPREG_TYPE_IO;
+ break;
+ case PCI_MAPREG_TYPE_IO:
+ pa->pa_flags |= PCI_FLAGS_IO_ENABLED;
csr |= PCI_COMMAND_IO_ENABLE;
sc->sc_bustag = pa->pa_iot;
+ break;
}
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
csr | PCI_COMMAND_MEM_ENABLE);
@@ -179,8 +180,7 @@ hmeattach_pci(device_t parent, device_t self, void *aux)
*
*/
-#define PCI_HME_BASEADDR 0x10
- if (pci_mapreg_map(pa, PCI_HME_BASEADDR, type, 0,
+ if (pci_mapreg_map(pa, PCI_BAR(0), type, 0,
&hsc->hsc_memt, &hsc->hsc_memh, NULL, NULL) != 0) {
aprint_error_dev(self, "unable to map device registers\n");
return;