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authormaxv <maxv@NetBSD.org>2018-09-21 18:38:25 +0000
committermaxv <maxv@NetBSD.org>2018-09-21 18:38:25 +0000
commitdf38a29d1af0478369ffacce24149befe57da1c2 (patch)
treeed6fb0a987f88f31287f27ecc63334a7f1d83639 /sys/dev
parentd34baa6cca0dc5cda12ec4de488c7a31de2d2bb3 (diff)
Remove iavc(4).
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/DEVNAMES3
-rw-r--r--sys/dev/ic/iavc.c1090
-rw-r--r--sys/dev/ic/iavcreg.h483
-rw-r--r--sys/dev/ic/iavcvar.h127
-rw-r--r--sys/dev/pci/files.pci6
-rw-r--r--sys/dev/pci/iavc_pci.c355
6 files changed, 2 insertions, 2062 deletions
diff --git a/sys/dev/DEVNAMES b/sys/dev/DEVNAMES
index 133eb0d0c50..eac18fe40df 100644
--- a/sys/dev/DEVNAMES
+++ b/sys/dev/DEVNAMES
@@ -1,4 +1,4 @@
-# $NetBSD: DEVNAMES,v 1.313 2018/09/19 13:58:27 maxv Exp $
+# $NetBSD: DEVNAMES,v 1.314 2018/09/21 18:38:25 maxv Exp $
#
# This file contains all used device names and defined attributes in
# alphabetical order. New devices added to the system somewhere should first
@@ -612,7 +612,6 @@ i2cbus MI Attribute
i2c_eeprom MI Attribute
i8042 shark Attribute
i82586 MI Attribute
-iavc MI
ibmcd MI
ibus pmax
ibus vax
diff --git a/sys/dev/ic/iavc.c b/sys/dev/ic/iavc.c
deleted file mode 100644
index f774072ca77..00000000000
--- a/sys/dev/ic/iavc.c
+++ /dev/null
@@ -1,1090 +0,0 @@
-/* $NetBSD: iavc.c,v 1.12 2014/03/23 02:44:19 christos Exp $ */
-
-/*
- * Copyright (c) 2001-2003 Cubical Solutions Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * The AVM ISDN controllers' card specific support routines.
- *
- * $FreeBSD: src/sys/i4b/capi/iavc/iavc_card.c,v 1.1.2.1 2001/08/10 14:08:34 obrien Exp $
- */
-
-#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iavc.c,v 1.12 2014/03/23 02:44:19 christos Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-#include <sys/device.h>
-#include <sys/callout.h>
-#include <sys/reboot.h>
-#include <net/if.h>
-
-#include <sys/bus.h>
-
-#include <netisdn/i4b_debug.h>
-#include <netisdn/i4b_ioctl.h>
-#include <netisdn/i4b_trace.h>
-#include <netisdn/i4b_global.h>
-#include <netisdn/i4b_l3l4.h>
-#include <netisdn/i4b_mbuf.h>
-#include <netisdn/i4b_capi.h>
-#include <netisdn/i4b_capi_msgs.h>
-
-#include <dev/ic/iavcvar.h>
-#include <dev/ic/iavcreg.h>
-
-/*
-// AVM B1 (active BRI, PIO mode)
-*/
-
-int
-iavc_b1_detect(iavc_softc_t *sc)
-{
- if ((iavc_read_port(sc, B1_INSTAT) & 0xfc) ||
- (iavc_read_port(sc, B1_OUTSTAT) & 0xfc))
- return (1);
-
- b1io_outp(sc, B1_INSTAT, 0x02);
- b1io_outp(sc, B1_OUTSTAT, 0x02);
- if ((iavc_read_port(sc, B1_INSTAT) & 0xfe) != 2 ||
- (iavc_read_port(sc, B1_OUTSTAT) & 0xfe) != 2)
- return (2);
-
- b1io_outp(sc, B1_INSTAT, 0x00);
- b1io_outp(sc, B1_OUTSTAT, 0x00);
- if ((iavc_read_port(sc, B1_INSTAT) & 0xfe) ||
- (iavc_read_port(sc, B1_OUTSTAT) & 0xfe))
- return (3);
-
- return (0); /* found */
-}
-
-void
-iavc_b1_disable_irq(iavc_softc_t *sc)
-{
- b1io_outp(sc, B1_INSTAT, 0x00);
-}
-
-void
-iavc_b1_reset(iavc_softc_t *sc)
-{
- b1io_outp(sc, B1_RESET, 0);
- DELAY(55*2*1000);
-
- b1io_outp(sc, B1_RESET, 1);
- DELAY(55*2*1000);
-
- b1io_outp(sc, B1_RESET, 0);
- DELAY(55*2*1000);
-}
-
-/*
-// Newer PCI-based B1's, and T1's, supports DMA
-*/
-
-int
-iavc_b1dma_detect(iavc_softc_t *sc)
-{
- AMCC_WRITE(sc, AMCC_MCSR, 0);
- DELAY(10*1000);
- AMCC_WRITE(sc, AMCC_MCSR, 0x0f000000);
- DELAY(10*1000);
- AMCC_WRITE(sc, AMCC_MCSR, 0);
- DELAY(42*1000);
-
- AMCC_WRITE(sc, AMCC_RXLEN, 0);
- AMCC_WRITE(sc, AMCC_TXLEN, 0);
- sc->sc_csr = 0;
- AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
-
- if (AMCC_READ(sc, AMCC_INTCSR) != 0)
- return 1;
-
- AMCC_WRITE(sc, AMCC_RXPTR, 0xffffffff);
- AMCC_WRITE(sc, AMCC_TXPTR, 0xffffffff);
- if ((AMCC_READ(sc, AMCC_RXPTR) != 0xfffffffc) ||
- (AMCC_READ(sc, AMCC_TXPTR) != 0xfffffffc))
- return 2;
-
- AMCC_WRITE(sc, AMCC_RXPTR, 0);
- AMCC_WRITE(sc, AMCC_TXPTR, 0);
- if ((AMCC_READ(sc, AMCC_RXPTR) != 0) ||
- (AMCC_READ(sc, AMCC_TXPTR) != 0))
- return 3;
-
- iavc_write_port(sc, 0x10, 0x00);
- iavc_write_port(sc, 0x07, 0x00);
-
- iavc_write_port(sc, 0x02, 0x02);
- iavc_write_port(sc, 0x03, 0x02);
-
- if (((iavc_read_port(sc, 0x02) & 0xfe) != 0x02) ||
- (iavc_read_port(sc, 0x03) != 0x03))
- return 4;
-
- iavc_write_port(sc, 0x02, 0x00);
- iavc_write_port(sc, 0x03, 0x00);
-
- if (((iavc_read_port(sc, 0x02) & 0xfe) != 0x00) ||
- (iavc_read_port(sc, 0x03) != 0x01))
- return 5;
-
- return (0); /* found */
-}
-
-void
-iavc_b1dma_reset(iavc_softc_t *sc)
-{
- int s = splnet();
-
- sc->sc_csr = 0;
- AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
- AMCC_WRITE(sc, AMCC_MCSR, 0);
- AMCC_WRITE(sc, AMCC_RXLEN, 0);
- AMCC_WRITE(sc, AMCC_TXLEN, 0);
-
- iavc_write_port(sc, 0x10, 0x00); /* XXX magic numbers from */
- iavc_write_port(sc, 0x07, 0x00); /* XXX the linux driver */
-
- splx(s);
-
- AMCC_WRITE(sc, AMCC_MCSR, 0);
- DELAY(10 * 1000);
- AMCC_WRITE(sc, AMCC_MCSR, 0x0f000000);
- DELAY(10 * 1000);
- AMCC_WRITE(sc, AMCC_MCSR, 0);
- DELAY(42 * 1000);
-}
-
-/*
-// AVM T1 (active PRI)
-*/
-
-#define b1dma_tx_empty(sc) (b1io_read_reg((sc), T1_OUTSTAT) & 1)
-#define b1dma_rx_full(sc) (b1io_read_reg((sc), T1_INSTAT) & 1)
-
-static int b1dma_tolink(iavc_softc_t *sc, void *buf, int len)
-{
- volatile int spin;
- char *s = (char*) buf;
- while (len--) {
- spin = 0;
- while (!b1dma_tx_empty(sc) && spin < 100000)
- spin++;
- if (!b1dma_tx_empty(sc))
- return -1;
- t1io_outp(sc, 1, *s++);
- }
- return 0;
-}
-
-static int b1dma_fromlink(iavc_softc_t *sc, void *buf, int len)
-{
- volatile int spin;
- char *s = (char*) buf;
- while (len--) {
- spin = 0;
- while (!b1dma_rx_full(sc) && spin < 100000)
- spin++;
- if (!b1dma_rx_full(sc))
- return -1;
- *s++ = t1io_inp(sc, 0);
- }
- return 0;
-}
-
-static int WriteReg(iavc_softc_t *sc, u_int32_t reg, u_int8_t val)
-{
- u_int8_t cmd = 0;
- if (b1dma_tolink(sc, &cmd, 1) == 0 &&
- b1dma_tolink(sc, &reg, 4) == 0) {
- u_int32_t tmp = val;
- return b1dma_tolink(sc, &tmp, 4);
- }
- return -1;
-}
-
-static u_int8_t ReadReg(iavc_softc_t *sc, u_int32_t reg)
-{
- u_int8_t cmd = 1;
- if (b1dma_tolink(sc, &cmd, 1) == 0 &&
- b1dma_tolink(sc, &reg, 4) == 0) {
- u_int32_t tmp;
- if (b1dma_fromlink(sc, &tmp, 4) == 0)
- return (u_int8_t) tmp;
- }
- return 0xff;
-}
-
-int
-iavc_t1_detect(iavc_softc_t *sc)
-{
- int ret = iavc_b1dma_detect(sc);
- if (ret) return ret;
-
- if ((WriteReg(sc, 0x80001000, 0x11) != 0) ||
- (WriteReg(sc, 0x80101000, 0x22) != 0) ||
- (WriteReg(sc, 0x80201000, 0x33) != 0) ||
- (WriteReg(sc, 0x80301000, 0x44) != 0))
- return 6;
-
- if ((ReadReg(sc, 0x80001000) != 0x11) ||
- (ReadReg(sc, 0x80101000) != 0x22) ||
- (ReadReg(sc, 0x80201000) != 0x33) ||
- (ReadReg(sc, 0x80301000) != 0x44))
- return 7;
-
- if ((WriteReg(sc, 0x80001000, 0x55) != 0) ||
- (WriteReg(sc, 0x80101000, 0x66) != 0) ||
- (WriteReg(sc, 0x80201000, 0x77) != 0) ||
- (WriteReg(sc, 0x80301000, 0x88) != 0))
- return 8;
-
- if ((ReadReg(sc, 0x80001000) != 0x55) ||
- (ReadReg(sc, 0x80101000) != 0x66) ||
- (ReadReg(sc, 0x80201000) != 0x77) ||
- (ReadReg(sc, 0x80301000) != 0x88))
- return 9;
-
- return 0; /* found */
-}
-
-void
-iavc_t1_disable_irq(iavc_softc_t *sc)
-{
- iavc_write_port(sc, T1_IRQMASTER, 0x00);
-}
-
-void
-iavc_t1_reset(iavc_softc_t *sc)
-{
- iavc_b1_reset(sc);
- iavc_write_port(sc, B1_INSTAT, 0x00);
- iavc_write_port(sc, B1_OUTSTAT, 0x00);
- iavc_write_port(sc, T1_IRQMASTER, 0x00);
- iavc_write_port(sc, T1_RESETBOARD, 0x0f);
-}
-
-/* Forward declarations of local subroutines... */
-
-static int iavc_send_init(iavc_softc_t *);
-
-static void iavc_handle_rx(iavc_softc_t *);
-static void iavc_start_tx(iavc_softc_t *);
-
-static uint32_t iavc_tx_capimsg(iavc_softc_t *, struct mbuf *);
-static uint32_t iavc_tx_ctrlmsg(iavc_softc_t *, struct mbuf *);
-
-/*
-// Callbacks from the upper (capi) layer:
-// --------------------------------------
-//
-// iavc_load
-// Resets the board and loads the firmware, then initiates
-// board startup.
-//
-// iavc_register
-// Registers a CAPI application id.
-//
-// iavc_release
-// Releases a CAPI application id.
-//
-// iavc_send
-// Sends a capi message.
-*/
-
-int iavc_load(capi_softc_t *capi_sc, int len, u_int8_t *cp)
-{
- iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
- u_int8_t val;
-
- aprint_debug_dev(sc->sc_dev, "reset card ....\n");
-
- if (sc->sc_dma)
- iavc_b1dma_reset(sc); /* PCI cards */
- else if (sc->sc_t1)
- iavc_t1_reset(sc); /* ISA attachment T1 */
- else
- iavc_b1_reset(sc); /* ISA attachment B1 */
-
- DELAY(1000);
-
- aprint_debug_dev(sc->sc_dev, "start loading %d bytes firmware\n", len);
-
- while (len && b1io_save_put_byte(sc, *cp++) == 0)
- len--;
-
- if (len) {
- aprint_error_dev(sc->sc_dev, "loading failed, can't write to card, len = %d\n", len);
- return (EIO);
- }
-
- aprint_debug_dev(sc->sc_dev, "firmware loaded, wait for ACK\n");
-
- if(sc->sc_capi.card_type == CARD_TYPEC_AVM_B1_ISA)
- iavc_put_byte(sc, SEND_POLL);
- else
- iavc_put_byte(sc, SEND_POLLACK);
-
- for (len = 0; len < 1000 && !iavc_rx_full(sc); len++)
- DELAY(100);
-
- if (!iavc_rx_full(sc)) {
- aprint_error_dev(sc->sc_dev, "loading failed, no ack\n");
- return (EIO);
- }
-
- val = iavc_get_byte(sc);
-
- if ((sc->sc_dma && val != RECEIVE_POLLDWORD) ||
- (!sc->sc_dma && val != RECEIVE_POLL)) {
- aprint_error_dev(sc->sc_dev, "loading failed, bad ack = %02x\n", val);
- return (EIO);
- }
-
- aprint_debug_dev(sc->sc_dev, "got ACK = 0x%02x\n", val);
-
- /* Start the DMA engine */
- if (sc->sc_dma) {
- int s;
-
- s = splnet();
-
- sc->sc_csr = AVM_FLAG;
- AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
- AMCC_WRITE(sc, AMCC_MCSR, (EN_A2P_TRANSFERS|EN_P2A_TRANSFERS|
- A2P_HI_PRIORITY|P2A_HI_PRIORITY|
- RESET_A2P_FLAGS|RESET_P2A_FLAGS));
-
- iavc_write_port(sc, 0x07, 0x30); /* XXX magic numbers from */
- iavc_write_port(sc, 0x10, 0xf0); /* XXX the linux driver */
-
- bus_dmamap_sync(sc->dmat, sc->rx_map, 0, sc->rx_map->dm_mapsize,
- BUS_DMASYNC_PREREAD);
-
- sc->sc_recv1 = 0;
- AMCC_WRITE(sc, AMCC_RXPTR, sc->rx_map->dm_segs[0].ds_addr);
- AMCC_WRITE(sc, AMCC_RXLEN, 4);
- sc->sc_csr |= EN_RX_TC_INT|EN_TX_TC_INT;
- AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
-
- splx(s);
- }
-
-#ifdef notyet
- /* good happy place */
- if(sc->sc_capi.card_type == CARD_TYPEC_AVM_B1_ISA)
- b1isa_setup_irq(sc);
-#endif
-
- iavc_send_init(sc);
-
- return 0;
-}
-
-int iavc_register(capi_softc_t *capi_sc, int applid, int nchan)
-{
- iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
- struct mbuf *m = i4b_Dgetmbuf(23);
- u_int8_t *p;
-
- if (!m) {
- aprint_error("iavc%d: can't get memory\n", sc->sc_unit);
- return (ENOMEM);
- }
-
- /*
- * byte 0x12 = SEND_REGISTER
- * dword ApplId
- * dword NumMessages
- * dword NumB3Connections 0..nbch
- * dword NumB3Blocks
- * dword B3Size
- */
-
- p = amcc_put_byte(mtod(m, u_int8_t*), 0);
- p = amcc_put_byte(p, 0);
- p = amcc_put_byte(p, SEND_REGISTER);
- p = amcc_put_word(p, applid);
-#if 0
- p = amcc_put_word(p, 1024 + (nchan + 1));
-#else
- p = amcc_put_word(p, 1024 * (nchan + 1));
-#endif
- p = amcc_put_word(p, nchan);
- p = amcc_put_word(p, 8);
- p = amcc_put_word(p, 2048);
-
- IF_ENQUEUE(&sc->sc_txq, m);
-
- iavc_start_tx(sc);
-
- return 0;
-}
-
-int iavc_release(capi_softc_t *capi_sc, int applid)
-{
- iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
- struct mbuf *m = i4b_Dgetmbuf(7);
- u_int8_t *p;
-
- if (!m) {
- aprint_error_dev(sc->sc_dev, "can't get memory\n");
- return (ENOMEM);
- }
-
- /*
- * byte 0x14 = SEND_RELEASE
- * dword ApplId
- */
-
- p = amcc_put_byte(mtod(m, u_int8_t*), 0);
- p = amcc_put_byte(p, 0);
- p = amcc_put_byte(p, SEND_RELEASE);
- p = amcc_put_word(p, applid);
-
- IF_ENQUEUE(&sc->sc_txq, m);
-
- iavc_start_tx(sc);
- return 0;
-}
-
-int iavc_send(capi_softc_t *capi_sc, struct mbuf *m)
-{
- iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
-
- if (sc->sc_state != IAVC_UP) {
- aprint_error_dev(sc->sc_dev, "attempt to send before device up\n");
-
- if (m->m_next) i4b_Bfreembuf(m->m_next);
- i4b_Dfreembuf(m);
-
- return (ENXIO);
- }
-
- if (IF_QFULL(&sc->sc_txq)) {
- IF_DROP(&sc->sc_txq);
-
- aprint_error_dev(sc->sc_dev, "tx overflow, message dropped\n");
-
- if (m->m_next) i4b_Bfreembuf(m->m_next);
- i4b_Dfreembuf(m);
-
- } else {
- IF_ENQUEUE(&sc->sc_txq, m);
-
- iavc_start_tx(sc);
- }
-
- return 0;
-}
-
-/*
-// Functions called by ourself during the initialization sequence:
-// ---------------------------------------------------------------
-//
-// iavc_send_init
-// Sends the system initialization message to a newly loaded
-// board, and sets state to INIT.
-*/
-
-static int iavc_send_init(iavc_softc_t *sc)
-{
- struct mbuf *m = i4b_Dgetmbuf(15);
- u_int8_t *p;
- int s;
-
- if (!m) {
- aprint_error_dev(sc->sc_dev, "can't get memory\n");
- return (ENOMEM);
- }
-
- /*
- * byte 0x11 = SEND_INIT
- * dword NumApplications
- * dword NumNCCIs
- * dword BoardNumber
- */
-
- p = amcc_put_byte(mtod(m, u_int8_t*), 0);
- p = amcc_put_byte(p, 0);
- p = amcc_put_byte(p, SEND_INIT);
- p = amcc_put_word(p, 1); /* XXX MaxAppl XXX */
- p = amcc_put_word(p, sc->sc_capi.sc_nbch);
- p = amcc_put_word(p, sc->sc_unit);
-
- s = splnet();
- IF_ENQUEUE(&sc->sc_txq, m);
-
- iavc_start_tx(sc);
-
- sc->sc_state = IAVC_INIT;
- splx(s);
- return 0;
-}
-
-/*
-// Functions called during normal operation:
-// -----------------------------------------
-//
-// iavc_receive_init
-// Reads the initialization reply and calls capi_ll_control().
-//
-// iavc_receive_new_ncci
-// Reads a new NCCI notification and calls capi_ll_control().
-//
-// iavc_receive_free_ncci
-// Reads a freed NCCI notification and calls capi_ll_control().
-//
-// iavc_receive_task_ready
-// Reads a task ready message -- which should not occur XXX.
-//
-// iavc_receive_debugmsg
-// Reads a debug message -- which should not occur XXX.
-//
-// iavc_receive_start
-// Reads a START TRANSMIT message and unblocks device.
-//
-// iavc_receive_stop
-// Reads a STOP TRANSMIT message and blocks device.
-//
-// iavc_receive
-// Reads an incoming message and calls capi_ll_receive().
-*/
-
-static int iavc_receive_init(iavc_softc_t *sc, u_int8_t *dmabuf)
-{
- u_int32_t Length;
- u_int8_t *p;
- u_int8_t *cardtype, *serial, *profile, *vers, *caps, *prot;
-
- if (sc->sc_dma) {
- p = amcc_get_word(dmabuf, &Length);
- } else {
- Length = iavc_get_slice(sc, sc->sc_recvbuf);
- p = sc->sc_recvbuf;
- }
-
-#if 0
- {
- int len = 0;
- printf("%s: rx_init: ", device_xname(sc->sc_dev));
- while (len < Length) {
- printf(" %02x", p[len]);
- if (len && (len % 16) == 0) printf("\n");
- len++;
- }
- if (len % 16) printf("\n");
- }
-#endif
-
- vers = (p + 1);
- p += (*p + 1); /* driver version */
- cardtype = (p + 1);
- p += (*p + 1); /* card type */
- p += (*p + 1); /* hardware ID */
- serial = (p + 1);
- p += (*p + 1); /* serial number */
- caps = (p + 1);
- p += (*p + 1); /* supported options */
- prot = (p + 1);
- p += (*p + 1); /* supported protocols */
- profile = (p + 1);
-
- if (cardtype && serial && profile) {
- int nbch = ((profile[3]<<8) | profile[2]);
-
- aprint_normal_dev(sc->sc_dev, "AVM %s, s/n %s, %d chans, f/w rev %s, prot %s\n",
- cardtype, serial, nbch, vers, prot);
- aprint_verbose_dev(sc->sc_dev, "%s\n", caps);
-
- capi_ll_control(&sc->sc_capi, CAPI_CTRL_PROFILE, (intptr_t) profile);
-
- } else {
- printf("%s: no profile data in info response?\n", device_xname(sc->sc_dev));
- }
-
- sc->sc_blocked = 1; /* controller will send START when ready */
- return 0;
-}
-
-static int iavc_receive_start(iavc_softc_t *sc)
-{
- struct mbuf *m = i4b_Dgetmbuf(3);
- u_int8_t *p;
-
- if (sc->sc_blocked && sc->sc_state == IAVC_UP)
- printf("%s: receive_start\n", device_xname(sc->sc_dev));
-
- if (!m) {
- aprint_error_dev(sc->sc_dev, "can't get memory\n");
- return (ENOMEM);
- }
-
- /*
- * byte 0x73 = SEND_POLLACK
- */
-
- p = amcc_put_byte(mtod(m, u_int8_t*), 0);
- p = amcc_put_byte(p, 0);
- p = amcc_put_byte(p, SEND_POLLACK);
-
- IF_PREPEND(&sc->sc_txq, m);
-
- NDBGL4(L4_IAVCDBG, "%s: blocked = %d, state = %d",
- device_xname(sc->sc_dev), sc->sc_blocked, sc->sc_state);
-
- sc->sc_blocked = 0;
- iavc_start_tx(sc);
-
- /* If this was our first START, register our readiness */
- if (sc->sc_state != IAVC_UP) {
- sc->sc_state = IAVC_UP;
- capi_ll_control(&sc->sc_capi, CAPI_CTRL_READY, 1);
- }
-
- return 0;
-}
-
-static int iavc_receive_stop(iavc_softc_t *sc)
-{
- printf("%s: receive_stop\n", device_xname(sc->sc_dev));
- sc->sc_blocked = 1;
- return 0;
-}
-
-static int iavc_receive_new_ncci(iavc_softc_t *sc, u_int8_t *dmabuf)
-{
- u_int32_t ApplId, NCCI, WindowSize;
-
- if (sc->sc_dma) {
- dmabuf = amcc_get_word(dmabuf, &ApplId);
- dmabuf = amcc_get_word(dmabuf, &NCCI);
- dmabuf = amcc_get_word(dmabuf, &WindowSize);
- } else {
- ApplId = iavc_get_word(sc);
- NCCI = iavc_get_word(sc);
- WindowSize = iavc_get_word(sc);
- }
-
- capi_ll_control(&sc->sc_capi, CAPI_CTRL_NEW_NCCI, NCCI);
- return 0;
-}
-
-static int iavc_receive_free_ncci(iavc_softc_t *sc, u_int8_t *dmabuf)
-{
- u_int32_t ApplId, NCCI;
-
- if (sc->sc_dma) {
- dmabuf = amcc_get_word(dmabuf, &ApplId);
- dmabuf = amcc_get_word(dmabuf, &NCCI);
- } else {
- ApplId = iavc_get_word(sc);
- NCCI = iavc_get_word(sc);
- }
-
- capi_ll_control(&sc->sc_capi, CAPI_CTRL_FREE_NCCI, NCCI);
- return 0;
-}
-
-static int iavc_receive_task_ready(iavc_softc_t *sc, u_int8_t *dmabuf)
-{
- u_int32_t TaskId, Length;
- u_int8_t *p;
- printf("%s: receive_task_ready\n", device_xname(sc->sc_dev));
-
- if (sc->sc_dma) {
- p = amcc_get_word(dmabuf, &TaskId);
- p = amcc_get_word(p, &Length);
- } else {
- TaskId = iavc_get_word(sc);
- Length = iavc_get_slice(sc, sc->sc_recvbuf);
- p = sc->sc_recvbuf;
- }
-
- /* XXX could show the message if trace enabled? XXX */
- return 0;
-}
-
-static int iavc_receive_debugmsg(iavc_softc_t *sc, u_int8_t *dmabuf)
-{
- u_int32_t Length;
- printf("%s: receive_debugmsg\n", device_xname(sc->sc_dev));
-
- if (sc->sc_dma) {
- amcc_get_word(dmabuf, &Length);
- } else {
- Length = iavc_get_slice(sc, sc->sc_recvbuf);
- }
-
- /* XXX could show the message if trace enabled? XXX */
- return 0;
-}
-
-static int iavc_receive(iavc_softc_t *sc, u_int8_t *dmabuf, int b3data)
-{
- struct mbuf *m;
- u_int32_t ApplId, Length;
-
- /*
- * byte 0x21 = RECEIVE_MESSAGE
- * dword ApplId
- * dword length
- * ... CAPI msg
- *
- * --or--
- *
- * byte 0x22 = RECEIVE_DATA_B3_IND
- * dword ApplId
- * dword length
- * ... CAPI msg
- * dword datalen
- * ... B3 data
- */
-
- if (sc->sc_dma) {
- dmabuf = amcc_get_word(dmabuf, &ApplId);
- dmabuf = amcc_get_word(dmabuf, &Length);
- } else {
- ApplId = iavc_get_word(sc);
- Length = iavc_get_slice(sc, sc->sc_recvbuf);
- dmabuf = sc->sc_recvbuf;
- }
-
- m = i4b_Dgetmbuf(Length);
- if (!m) {
- aprint_error_dev(sc->sc_dev, "can't get memory for receive\n");
- return (ENOMEM);
- }
-
- memcpy(mtod(m, u_int8_t*), dmabuf, Length);
-
-#if 0
- {
- u_int8_t *p = mtod(m, u_int8_t*);
- int len = 0;
- printf("%s: applid=%d, len=%d\n", device_xname(sc->sc_dev),
- ApplId, Length);
- while (len < m->m_len) {
- printf(" %02x", p[len]);
- if (len && (len % 16) == 0) printf("\n");
- len++;
- }
- if (len % 16) printf("\n");
- }
-#endif
-
- if (b3data) {
- if (sc->sc_dma) {
- dmabuf = amcc_get_word(dmabuf + Length, &Length);
- } else {
- Length = iavc_get_slice(sc, sc->sc_recvbuf);
- dmabuf = sc->sc_recvbuf;
- }
-
- m->m_next = i4b_Bgetmbuf(Length);
- if (!m->m_next) {
- aprint_error_dev(sc->sc_dev, "can't get memory for receive\n");
- i4b_Dfreembuf(m);
- return (ENOMEM);
- }
-
- memcpy(mtod(m->m_next, u_int8_t*), dmabuf, Length);
- }
-
- capi_ll_receive(&sc->sc_capi, m);
- return 0;
-}
-
-/*
-// iavc_handle_intr
-// Checks device interrupt status and calls iavc_handle_{rx,tx}()
-// as necessary.
-//
-// iavc_handle_rx
-// Reads in the command byte and calls the subroutines above.
-//
-// iavc_start_tx
-// Initiates DMA on the next queued message if possible.
-*/
-
-int iavc_handle_intr(iavc_softc_t *sc)
-{
- u_int32_t status;
- u_int32_t newcsr;
-
- if (!sc->sc_dma) {
- while (iavc_rx_full(sc))
- iavc_handle_rx(sc);
- return 0;
- }
-
- status = AMCC_READ(sc, AMCC_INTCSR);
- if ((status & ANY_S5933_INT) == 0)
- return 0;
-
- newcsr = sc->sc_csr | (status & ALL_INT);
- if (status & TX_TC_INT) newcsr &= ~EN_TX_TC_INT;
- if (status & RX_TC_INT) newcsr &= ~EN_RX_TC_INT;
- AMCC_WRITE(sc, AMCC_INTCSR, newcsr);
- sc->sc_intr = 1;
-
- if (status & RX_TC_INT) {
- u_int32_t rxlen;
-
- bus_dmamap_sync(sc->dmat, sc->rx_map, 0, sc->rx_map->dm_mapsize,
- BUS_DMASYNC_POSTREAD);
-
- if (sc->sc_recv1 == 0) {
- sc->sc_recv1 = *(u_int32_t*)(sc->sc_recvbuf);
- rxlen = (sc->sc_recv1 + 3) & ~3;
-
- AMCC_WRITE(sc, AMCC_RXPTR, sc->rx_map->dm_segs[0].ds_addr);
- AMCC_WRITE(sc, AMCC_RXLEN, rxlen ? rxlen : 4);
- } else {
- iavc_handle_rx(sc);
- sc->sc_recv1 = 0;
- AMCC_WRITE(sc, AMCC_RXPTR, sc->rx_map->dm_segs[0].ds_addr);
- AMCC_WRITE(sc, AMCC_RXLEN, 4);
- }
- }
-
- if (status & TX_TC_INT) {
- bus_dmamap_sync(sc->dmat, sc->tx_map, 0, sc->tx_map->dm_mapsize,
- BUS_DMASYNC_POSTWRITE);
- sc->sc_csr &= ~EN_TX_TC_INT;
- iavc_start_tx(sc);
- }
-
- AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
- sc->sc_intr = 0;
-
- return 0;
-}
-
-static void iavc_handle_rx(iavc_softc_t *sc)
-{
- u_int8_t *dmabuf = 0, cmd;
-
- if (sc->sc_dma) {
- dmabuf = amcc_get_byte(sc->sc_recvbuf, &cmd);
- } else {
- cmd = iavc_get_byte(sc);
- }
-
- NDBGL4(L4_IAVCDBG, "iavc%d: command = 0x%02x", sc->sc_unit, cmd);
-
- switch (cmd) {
- case RECEIVE_DATA_B3_IND:
- iavc_receive(sc, dmabuf, 1);
- break;
-
- case RECEIVE_MESSAGE:
- iavc_receive(sc, dmabuf, 0);
- break;
-
- case RECEIVE_NEW_NCCI:
- iavc_receive_new_ncci(sc, dmabuf);
- break;
-
- case RECEIVE_FREE_NCCI:
- iavc_receive_free_ncci(sc, dmabuf);
- break;
-
- case RECEIVE_START:
- iavc_receive_start(sc);
- break;
-
- case RECEIVE_STOP:
- iavc_receive_stop(sc);
- break;
-
- case RECEIVE_INIT:
- iavc_receive_init(sc, dmabuf);
- break;
-
- case RECEIVE_TASK_READY:
- iavc_receive_task_ready(sc, dmabuf);
- break;
-
- case RECEIVE_DEBUGMSG:
- iavc_receive_debugmsg(sc, dmabuf);
- break;
-
- default:
- aprint_error_dev(sc->sc_dev, "unknown msg %02x\n", cmd);
- }
-}
-
-static void iavc_start_tx(iavc_softc_t *sc)
-{
- struct mbuf *m;
- u_int32_t txlen;
-
- /* If device has put us on hold, punt. */
-
- if (sc->sc_blocked) {
- return;
- }
-
- /* If using DMA and transmitter busy, punt. */
- if (sc->sc_dma && (sc->sc_csr & EN_TX_TC_INT)) {
- return;
- }
-
- /* Else, see if we have messages to send. */
- IF_DEQUEUE(&sc->sc_txq, m);
- if (!m) {
- return;
- }
-
- /* Have message, will send. */
- if (CAPIMSG_LEN(m->m_data)) {
- /* A proper CAPI message, possibly with B3 data */
- txlen = iavc_tx_capimsg(sc, m);
- } else {
- /* A board control message to be sent as is */
- txlen = iavc_tx_ctrlmsg(sc, m);
- }
-
- if (m->m_next) {
- i4b_Bfreembuf(m->m_next);
- m->m_next = NULL;
- }
- i4b_Dfreembuf(m);
-
- /* Kick DMA into motion if applicable */
- if (sc->sc_dma) {
- txlen = (txlen + 3) & ~3;
-
- bus_dmamap_sync(sc->dmat, sc->tx_map, 0, txlen,
- BUS_DMASYNC_PREWRITE);
-
- AMCC_WRITE(sc, AMCC_TXPTR, sc->tx_map->dm_segs[0].ds_addr);
- AMCC_WRITE(sc, AMCC_TXLEN, txlen);
- sc->sc_csr |= EN_TX_TC_INT;
-
- if (!sc->sc_intr)
- AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
- }
-}
-
-static uint32_t
-iavc_tx_capimsg(iavc_softc_t *sc, struct mbuf *m)
-{
- uint32_t txlen = 0;
- u_int8_t *dmabuf;
-
- if (sc->sc_dma) {
- /* Copy message to DMA buffer. */
-
- if (m->m_next)
- dmabuf = amcc_put_byte(sc->sc_sendbuf, SEND_DATA_B3_REQ);
- else
- dmabuf = amcc_put_byte(sc->sc_sendbuf, SEND_MESSAGE);
-
- dmabuf = amcc_put_word(dmabuf, m->m_len);
- memcpy(dmabuf, m->m_data, m->m_len);
- dmabuf += m->m_len;
- txlen = 5 + m->m_len;
-
- if (m->m_next) {
- dmabuf = amcc_put_word(dmabuf, m->m_next->m_len);
- memcpy(dmabuf, m->m_next->m_data, m->m_next->m_len);
- txlen += 4 + m->m_next->m_len;
- }
-
- } else {
- /* Use PIO. */
-
- if (m->m_next) {
- iavc_put_byte(sc, SEND_DATA_B3_REQ);
- NDBGL4(L4_IAVCDBG, "iavc%d: tx SDB3R msg, len = %d",
- sc->sc_unit, m->m_len);
- } else {
- iavc_put_byte(sc, SEND_MESSAGE);
- NDBGL4(L4_IAVCDBG, "iavc%d: tx SM msg, len = %d",
- sc->sc_unit, m->m_len);
- }
-#if 0
- {
- u_int8_t *p = mtod(m, u_int8_t*);
- int len;
- for (len = 0; len < m->m_len; len++) {
- printf(" %02x", *p++);
- if (len && (len % 16) == 0)
- printf("\n");
- }
- if (len % 16)
- printf("\n");
- }
-#endif
-
- iavc_put_slice(sc, m->m_data, m->m_len);
-
- if (m->m_next)
- iavc_put_slice(sc, m->m_next->m_data, m->m_next->m_len);
- }
-
- return txlen;
-}
-
-static uint32_t
-iavc_tx_ctrlmsg(iavc_softc_t *sc, struct mbuf *m)
-{
- uint32_t txlen = 0;
- uint8_t *dmabuf;
-
- if (sc->sc_dma) {
- memcpy(sc->sc_sendbuf, m->m_data + 2, m->m_len - 2);
- txlen = m->m_len - 2;
- } else {
-
-#if 0
- {
- u_int8_t *p = mtod(m, u_int8_t*) + 2;
- int len;
-
- printf("%s: tx BDC msg, len = %d, msg =", device_xname(sc->sc_dev),
- m->m_len-2);
- for (len = 0; len < m->m_len-2; len++) {
- printf(" %02x", *p++);
- if (len && (len % 16) == 0) printf("\n");
- }
- if (len % 16)
- printf("\n");
- }
-#endif
-
- /* no DMA */
- txlen = m->m_len - 2;
- dmabuf = mtod(m, char*) + 2;
- while(txlen--)
- b1io_put_byte(sc, *dmabuf++);
- }
-
- return txlen;
-}
diff --git a/sys/dev/ic/iavcreg.h b/sys/dev/ic/iavcreg.h
deleted file mode 100644
index 2c790099e1f..00000000000
--- a/sys/dev/ic/iavcreg.h
+++ /dev/null
@@ -1,483 +0,0 @@
-/* $NetBSD: iavcreg.h,v 1.4 2006/02/16 20:17:16 perry Exp $ */
-
-/*
- * Copyright (c) 2001-2003 Cubical Solutions Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * capi/iavc/iavc.h The AVM ISDN controllers' common declarations.
- *
- * $FreeBSD: src/sys/i4b/capi/iavc/iavc.h,v 1.1.2.1 2001/08/10 14:08:34 obrien Exp $
- */
-
-/*
-// AMCC_{READ,WRITE}
-// Routines to access the memory mapped registers of the
-// S5933 DMA controller.
-*/
-
-static __inline u_int32_t AMCC_READ(iavc_softc_t *sc, int off)
-{
- return bus_space_read_4(sc->sc_mem_bt, sc->sc_mem_bh, off);
-}
-
-static __inline void AMCC_WRITE(iavc_softc_t *sc, int off, u_int32_t value)
-{
- bus_space_write_4(sc->sc_mem_bt, sc->sc_mem_bh, off, value);
-}
-
-/*
-// amcc_{put,get}_{byte,word}
-// Routines to access the DMA buffers byte- or wordwise.
-*/
-
-static __inline u_int8_t* amcc_put_byte(u_int8_t *buf, u_int8_t value)
-{
- *buf++ = value;
- return buf;
-}
-
-static __inline u_int8_t* amcc_get_byte(u_int8_t *buf, u_int8_t *value)
-{
- *value = *buf++;
- return buf;
-}
-
-static __inline u_int8_t* amcc_put_word(u_int8_t *buf, u_int32_t value)
-{
- *buf++ = (value & 0xff);
- *buf++ = (value >> 8) & 0xff;
- *buf++ = (value >> 16) & 0xff;
- *buf++ = (value >> 24) & 0xff;
- return buf;
-}
-
-static __inline u_int8_t* amcc_get_word(u_int8_t *buf, u_int32_t *value)
-{
- *value = *buf++;
- *value |= (*buf++ << 8);
- *value |= (*buf++ << 16);
- *value |= (*buf++ << 24);
- return buf;
-}
-
-/*
-// Controller LLI message numbers.
-*/
-
-#define SEND_POLL 0x72
-#define SEND_INIT 0x11
-#define SEND_REGISTER 0x12
-#define SEND_DATA_B3_REQ 0x13
-#define SEND_RELEASE 0x14
-#define SEND_MESSAGE 0x15
-#define SEND_CONFIG 0x71
-#define SEND_POLLACK 0x73
-
-#define RECEIVE_POLL 0x32
-#define RECEIVE_INIT 0x27
-#define RECEIVE_MESSAGE 0x21
-#define RECEIVE_DATA_B3_IND 0x22
-#define RECEIVE_START 0x23
-#define RECEIVE_STOP 0x24
-#define RECEIVE_NEW_NCCI 0x25
-#define RECEIVE_FREE_NCCI 0x26
-#define RECEIVE_RELEASE 0x26
-#define RECEIVE_TASK_READY 0x31
-#define RECEIVE_DEBUGMSG 0x71
-#define RECEIVE_POLLDWORD 0x75
-
-/* Operation constants */
-
-#define WRITE_REGISTER 0x00
-#define READ_REGISTER 0x01
-
-/* Port offsets in I/O space */
-
-#define B1_READ 0x00
-#define B1_WRITE 0x01
-#define B1_INSTAT 0x02
-#define B1_OUTSTAT 0x03
-#define B1_ANALYSE 0x04
-#define B1_REVISION 0x05
-#define B1_RESET 0x10
-
-#define T1_FASTLINK 0x00
-#define T1_SLOWLINK 0x08
-
-#define T1_READ B1_READ
-#define T1_WRITE B1_WRITE
-#define T1_INSTAT B1_INSTAT
-#define T1_OUTSTAT B1_OUTSTAT
-#define T1_IRQENABLE 0x05
-#define T1_FIFOSTAT 0x06
-#define T1_RESETLINK 0x10
-#define T1_ANALYSE 0x11
-#define T1_IRQMASTER 0x12
-#define T1_IDENT 0x17
-#define T1_RESETBOARD 0x1f
-
-#define T1F_IREADY 0x01
-#define T1F_IHALF 0x02
-#define T1F_IFULL 0x04
-#define T1F_IEMPTY 0x08
-#define T1F_IFLAGS 0xf0
-
-#define T1F_OREADY 0x10
-#define T1F_OHALF 0x20
-#define T1F_OEMPTY 0x40
-#define T1F_OFULL 0x80
-#define T1F_OFLAGS 0xf0
-
-#define FIFO_OUTBSIZE 256
-#define FIFO_INPBSIZE 512
-
-#define HEMA_VERSION_ID 0
-#define HEMA_PAL_ID 0
-
-/*
-// S5933 DMA controller register offsets in memory, and bitmasks.
-*/
-
-#define AMCC_RXPTR 0x24
-#define AMCC_RXLEN 0x28
-#define AMCC_TXPTR 0x2c
-#define AMCC_TXLEN 0x30
-
-#define AMCC_INTCSR 0x38
-#define EN_READ_TC_INT 0x00008000
-#define EN_WRITE_TC_INT 0x00004000
-#define EN_TX_TC_INT EN_READ_TC_INT
-#define EN_RX_TC_INT EN_WRITE_TC_INT
-#define AVM_FLAG 0x30000000
-
-#define ANY_S5933_INT 0x00800000
-#define READ_TC_INT 0x00080000
-#define WRITE_TC_INT 0x00040000
-#define TX_TC_INT READ_TC_INT
-#define RX_TC_INT WRITE_TC_INT
-#define MASTER_ABORT_INT 0x00100000
-#define TARGET_ABORT_INT 0x00200000
-#define BUS_MASTER_INT 0x00200000
-#define ALL_INT 0x000c0000
-
-#define AMCC_MCSR 0x3c
-#define A2P_HI_PRIORITY 0x00000100
-#define EN_A2P_TRANSFERS 0x00000400
-#define P2A_HI_PRIORITY 0x00001000
-#define EN_P2A_TRANSFERS 0x00004000
-#define RESET_A2P_FLAGS 0x04000000
-#define RESET_P2A_FLAGS 0x02000000
-
-/*
-// (B1IO_WAIT_MAX * B1IO_WAIT_DLY) is the max wait in us for the card
-// to become ready after an I/O operation. The default is 1 ms.
-*/
-
-#define B1IO_WAIT_MAX 1000
-#define B1IO_WAIT_DLY 1
-
-/*
-// b1io_outp
-// Diagnostic output routine, returns the written value via
-// the device's analysis register.
-//
-// b1io_rx_full
-// Returns nonzero if data is readable from the card via the
-// I/O ports.
-//
-// b1io_tx_empty
-// Returns nonzero if data can be written to the card via the
-// I/O ports.
-*/
-
-static __inline u_int8_t b1io_outp(iavc_softc_t *sc, int off, u_int8_t val)
-{
- bus_space_write_1(sc->sc_io_bt, sc->sc_io_bh, off, val);
- DELAY(1);
- return bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, B1_ANALYSE);
-}
-
-static __inline int b1io_rx_full(iavc_softc_t *sc)
-{
- u_int8_t val = bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, B1_INSTAT);
- return (val & 0x01);
-}
-
-static __inline int b1io_tx_empty(iavc_softc_t *sc)
-{
- u_int8_t val = bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, B1_OUTSTAT);
- return (val & 0x01);
-}
-
-/*
-// b1io_{get,put}_{byte,word}
-// Routines to read and write the device I/O registers byte- or
-// wordwise.
-//
-// b1io_{get,put}_slice
-// Routines to read and write sequential bytes to the device
-// I/O registers.
-*/
-
-static __inline u_int8_t b1io_get_byte(iavc_softc_t *sc)
-{
- int spin = 0;
- while (!b1io_rx_full(sc) && spin < B1IO_WAIT_MAX) {
- spin++; DELAY(B1IO_WAIT_DLY);
- }
- if (b1io_rx_full(sc))
- return bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, B1_READ);
- printf("iavc%d: rx not completed\n", sc->sc_unit);
- return 0xff;
-}
-
-static __inline int b1io_put_byte(iavc_softc_t *sc, u_int8_t val)
-{
- int spin = 0;
- while (!b1io_tx_empty(sc) && spin < B1IO_WAIT_MAX) {
- spin++; DELAY(B1IO_WAIT_DLY);
- }
- if (b1io_tx_empty(sc)) {
- bus_space_write_1(sc->sc_io_bt, sc->sc_io_bh, B1_WRITE, val);
- return 0;
- }
- printf("iavc%d: tx not emptied\n", sc->sc_unit);
- return -1;
-}
-
-static __inline int b1io_save_put_byte(iavc_softc_t *sc, u_int8_t val)
-{
- int spin = 0;
- while (!b1io_tx_empty(sc) && spin < B1IO_WAIT_MAX) {
- spin++; DELAY(B1IO_WAIT_DLY);
- }
- if (b1io_tx_empty(sc)) {
- b1io_outp(sc, B1_WRITE, val);
- return 0;
- }
- printf("iavc%d: tx not emptied\n", sc->sc_unit);
- return -1;
-}
-
-static __inline u_int32_t b1io_get_word(iavc_softc_t *sc)
-{
- u_int32_t val = 0;
- val |= b1io_get_byte(sc);
- val |= (b1io_get_byte(sc) << 8);
- val |= (b1io_get_byte(sc) << 16);
- val |= (b1io_get_byte(sc) << 24);
- return val;
-}
-
-static __inline void b1io_put_word(iavc_softc_t *sc, u_int32_t val)
-{
- b1io_put_byte(sc, (val & 0xff));
- b1io_put_byte(sc, (val >> 8) & 0xff);
- b1io_put_byte(sc, (val >> 16) & 0xff);
- b1io_put_byte(sc, (val >> 24) & 0xff);
-}
-
-static __inline int b1io_get_slice(iavc_softc_t *sc, u_int8_t *dp)
-{
- int len, i;
- len = i = b1io_get_word(sc);
- while (i--) *dp++ = b1io_get_byte(sc);
- return len;
-}
-
-static __inline void b1io_put_slice(iavc_softc_t *sc, u_int8_t *dp, int len)
-{
- b1io_put_word(sc, len);
- while (len--) b1io_put_byte(sc, *dp++);
-}
-
-/*
-// b1io_{read,write}_reg
-// Routines to read and write the device registers via the I/O
-// ports.
-*/
-
-static __inline u_int32_t b1io_read_reg(iavc_softc_t *sc, int reg)
-{
- b1io_put_byte(sc, READ_REGISTER);
- b1io_put_word(sc, reg);
- return b1io_get_word(sc);
-}
-
-static __inline u_int32_t b1io_write_reg(iavc_softc_t *sc, int reg, u_int32_t val)
-{
- b1io_put_byte(sc, WRITE_REGISTER);
- b1io_put_word(sc, reg);
- b1io_put_word(sc, val);
- return b1io_get_word(sc);
-}
-
-/*
-// t1io_outp
-// I/O port write operation for the T1, which does not seem
-// to have the analysis port.
-*/
-
-static __inline void t1io_outp(iavc_softc_t *sc, int off, u_int8_t val)
-{
- bus_space_write_1(sc->sc_io_bt, sc->sc_io_bh, off, val);
-}
-
-static __inline u_int8_t t1io_inp(iavc_softc_t *sc, int off)
-{
- return bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, off);
-}
-
-static __inline int t1io_isfastlink(iavc_softc_t *sc)
-{
- return ((bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, T1_IDENT) & ~0x82) == 1);
-}
-
-static __inline u_int8_t t1io_fifostatus(iavc_softc_t *sc)
-{
- return bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, T1_FIFOSTAT);
-}
-
-static __inline int t1io_get_slice(iavc_softc_t *sc, u_int8_t *dp)
-{
- int len, i;
- len = i = b1io_get_word(sc);
- if (t1io_isfastlink(sc)) {
- int status;
- while (i) {
- status = t1io_fifostatus(sc) & (T1F_IREADY|T1F_IHALF);
- if (i >= FIFO_INPBSIZE) status |= T1F_IFULL;
-
- switch (status) {
- case T1F_IREADY|T1F_IHALF|T1F_IFULL:
- bus_space_read_multi_1(sc->sc_io_bt, sc->sc_io_bh,
- T1_READ, dp, FIFO_INPBSIZE);
- dp += FIFO_INPBSIZE;
- i -= FIFO_INPBSIZE;
- break;
-
- case T1F_IREADY|T1F_IHALF:
- bus_space_read_multi_1(sc->sc_io_bt, sc->sc_io_bh,
- T1_READ, dp, i);
- dp += i;
- i = 0;
- break;
-
- default:
- *dp++ = b1io_get_byte(sc);
- i--;
- }
- }
- } else { /* not fastlink */
- if (i--) *dp++ = b1io_get_byte(sc);
- }
- return len;
-}
-
-static __inline void t1io_put_slice(iavc_softc_t *sc, u_int8_t *dp, int len)
-{
- int i = len;
- b1io_put_word(sc, i);
- if (t1io_isfastlink(sc)) {
- int status;
- while (i) {
- status = t1io_fifostatus(sc) & (T1F_OREADY|T1F_OHALF);
- if (i >= FIFO_OUTBSIZE) status |= T1F_OFULL;
-
- switch (status) {
- case T1F_OREADY|T1F_OHALF|T1F_OFULL:
- bus_space_write_multi_1(sc->sc_io_bt, sc->sc_io_bh,
- T1_WRITE, dp, FIFO_OUTBSIZE);
- dp += FIFO_OUTBSIZE;
- i -= FIFO_OUTBSIZE;
- break;
-
- case T1F_OREADY|T1F_OHALF:
- bus_space_write_multi_1(sc->sc_io_bt, sc->sc_io_bh,
- T1_WRITE, dp, i);
- dp += i;
- i = 0;
- break;
-
- default:
- b1io_put_byte(sc, *dp++);
- i--;
- }
- }
- } else {
- while (i--) b1io_put_byte(sc, *dp++);
- }
-}
-
-/*
-// An attempt to bring it all together:
-// ------------------------------------
-//
-// iavc_{read,write}_reg
-// Routines to access the device registers via the I/O port.
-//
-// iavc_{read,write}_port
-// Routines to access the device I/O ports.
-//
-// iavc_tx_empty, iavc_rx_full
-// Routines to check when the device has drained the last written
-// byte, or produced a full byte to read.
-//
-// iavc_{get,put}_byte
-// Routines to read/write byte values to the device via the I/O port.
-//
-// iavc_{get,put}_word
-// Routines to read/write 32-bit words to the device via the I/O port.
-//
-// iavc_{get,put}_slice
-// Routines to read/write {length, data} pairs to the device via the
-// ubiquituous I/O port. Uses the HEMA FIFO on a T1.
-*/
-
-#define iavc_read_reg(sc, reg) b1io_read_reg(sc, reg)
-#define iavc_write_reg(sc, reg, val) b1io_write_reg(sc, reg, val)
-
-#define iavc_read_port(sc, port) \
- bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, (port))
-#define iavc_write_port(sc, port, val) \
- bus_space_write_1(sc->sc_io_bt, sc->sc_io_bh, (port), (val))
-
-#define iavc_tx_empty(sc) b1io_tx_empty(sc)
-#define iavc_rx_full(sc) b1io_rx_full(sc)
-
-#define iavc_get_byte(sc) b1io_get_byte(sc)
-#define iavc_put_byte(sc, val) b1io_put_byte(sc, val)
-#define iavc_get_word(sc) b1io_get_word(sc)
-#define iavc_put_word(sc, val) b1io_put_word(sc, val)
-
-static __inline u_int32_t iavc_get_slice(iavc_softc_t *sc, u_int8_t *dp)
-{
- if (sc->sc_t1) return t1io_get_slice(sc, dp);
- else return b1io_get_slice(sc, dp);
-}
-
-static __inline void iavc_put_slice(iavc_softc_t *sc, u_int8_t *dp, int len)
-{
- if (sc->sc_t1) t1io_put_slice(sc, dp, len);
- else b1io_put_slice(sc, dp, len);
-}
diff --git a/sys/dev/ic/iavcvar.h b/sys/dev/ic/iavcvar.h
deleted file mode 100644
index 5976eb51a8b..00000000000
--- a/sys/dev/ic/iavcvar.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/* $NetBSD: iavcvar.h,v 1.5 2012/10/27 17:18:20 chs Exp $ */
-
-/*
- * Copyright (c) 2001-2003 Cubical Solutions Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * capi/iavc/iavc.h The AVM ISDN controllers' common declarations.
- *
- * $FreeBSD: src/sys/i4b/capi/iavc/iavc.h,v 1.1.2.1 2001/08/10 14:08:34 obrien Exp $
- */
-
-#include <netisdn/i4b_capi.h>
-
-/*
-// iavc_softc_t
-// The software context of one AVM T1 controller.
-*/
-
-#define IAVC_IO_BASES 1
-#define IAVC_DMA_SIZE (128 + 2048)
-
-typedef struct iavc_softc {
- device_t sc_dev;
- capi_softc_t sc_capi;
-
- bus_space_handle_t sc_mem_bh;
- bus_space_tag_t sc_mem_bt;
-
- bus_space_handle_t sc_io_bh;
- bus_space_tag_t sc_io_bt;
-
- bus_dma_tag_t dmat;
-
- bus_dmamap_t tx_map;
- bus_dmamap_t rx_map;
-
- bus_dma_segment_t txseg;
- bus_dma_segment_t rxseg;
- int ntxsegs, nrxsegs;
-
- uint32_t sc_unit;
- uint32_t sc_intr;
-
- int32_t sc_state;
-#define IAVC_DOWN 0
-#define IAVC_POLL 1
-#define IAVC_INIT 2
-#define IAVC_UP 3
- uint32_t sc_blocked;
- uint32_t sc_dma;
- uint32_t sc_t1;
-
- u_int32_t sc_csr;
-
- void * sc_sendbuf;
- void * sc_recvbuf;
-
- u_int32_t sc_recv1;
-
- struct ifqueue sc_txq;
-} iavc_softc_t;
-
-/*
-// {b1,b1dma,t1}_{detect,reset}
-// Routines to detect and manage the specific type of card.
-*/
-
-int iavc_b1_detect(iavc_softc_t *sc);
-void iavc_b1_disable_irq(iavc_softc_t *sc);
-void iavc_b1_reset(iavc_softc_t *sc);
-
-int iavc_b1dma_detect(iavc_softc_t *sc);
-void iavc_b1dma_reset(iavc_softc_t *sc);
-
-int iavc_t1_detect(iavc_softc_t *sc);
-void iavc_t1_disable_irq(iavc_softc_t *sc);
-void iavc_t1_reset(iavc_softc_t *sc);
-
-
-/*
-// iavc_handle_intr
-// Interrupt handler, called by the bus specific interrupt routine
-// in iavc_<bustype>.c module.
-//
-// iavc_load
-// CAPI callback. Resets device and loads firmware.
-//
-// iavc_register
-// CAPI callback. Registers an application id.
-//
-// iavc_release
-// CAPI callback. Releases an application id.
-//
-// iavc_send
-// CAPI callback. Sends a CAPI message. A B3_DATA_REQ message has
-// m_next point to a data mbuf.
-*/
-
-int iavc_handle_intr(iavc_softc_t *);
-int iavc_load(capi_softc_t *, int, u_int8_t *);
-int iavc_register(capi_softc_t *, int, int);
-int iavc_release(capi_softc_t *, int);
-int iavc_send(capi_softc_t *, struct mbuf *);
-
-#ifdef notyet
-extern void b1isa_setup_irq(struct iavc_softc *sc);
-#endif
diff --git a/sys/dev/pci/files.pci b/sys/dev/pci/files.pci
index 5a06450aee9..1be7ad6239b 100644
--- a/sys/dev/pci/files.pci
+++ b/sys/dev/pci/files.pci
@@ -1,4 +1,4 @@
-# $NetBSD: files.pci,v 1.401 2018/09/06 05:36:51 maxv Exp $
+# $NetBSD: files.pci,v 1.402 2018/09/21 18:38:25 maxv Exp $
#
# Config file and device description for machine-independent PCI code.
# Included by ports that need it. Requires that the SCSI files be
@@ -813,10 +813,6 @@ file dev/pci/isic_pci.c isic_pci
file dev/pci/isic_pci_elsa_qs1p.c isic_pci
-# AVM T1/B1
-attach iavc at pci with iavc_pci
-file dev/pci/iavc_pci.c iavc_pci
-
device ifpci: isdndev, passive_isdn, nisac
attach ifpci at pci
file dev/pci/ifpci.c ifpci
diff --git a/sys/dev/pci/iavc_pci.c b/sys/dev/pci/iavc_pci.c
deleted file mode 100644
index f2fcd4947e5..00000000000
--- a/sys/dev/pci/iavc_pci.c
+++ /dev/null
@@ -1,355 +0,0 @@
-/* $NetBSD: iavc_pci.c,v 1.17 2016/07/11 11:31:51 msaitoh Exp $ */
-
-/*
- char intrbuf[PCI_INTRSTR_LEN];
- * Copyright (c) 2001-2003 Cubical Solutions Ltd.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * capi/iavc/iavc_pci.c
- * The AVM ISDN controllers' PCI bus attachment handling.
- *
- * $FreeBSD: src/sys/i4b/capi/iavc/iavc_pci.c,v 1.1.2.1 2001/08/10 14:08:34 obrien Exp $
- */
-
-#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iavc_pci.c,v 1.17 2016/07/11 11:31:51 msaitoh Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/mbuf.h>
-#include <sys/callout.h>
-#include <sys/socket.h>
-#include <sys/device.h>
-#include <net/if.h>
-
-#include <sys/bus.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcidevs.h>
-
-#include <netisdn/i4b_ioctl.h>
-#include <netisdn/i4b_l3l4.h>
-#include <netisdn/i4b_capi.h>
-
-#include <dev/ic/iavcvar.h>
-#include <dev/ic/iavcreg.h>
-
-struct iavc_pci_softc {
- struct iavc_softc sc_iavc;
-
- bus_addr_t mem_base;
- bus_size_t mem_size;
- bus_addr_t io_base;
- bus_size_t io_size;
-
- pci_chipset_tag_t sc_pc;
-
- void *sc_ih; /* interrupt handler */
-};
-#define IAVC_PCI_IOBA 0x14
-#define IAVC_PCI_MMBA 0x10
-
-/* PCI driver linkage */
-
-static const struct iavc_pci_product *find_cardname(struct pci_attach_args *);
-
-static int iavc_pci_probe(device_t, cfdata_t, void *);
-static void iavc_pci_attach(device_t, device_t, void *);
-
-int iavc_pci_intr(void *);
-
-CFATTACH_DECL_NEW(iavc_pci, sizeof(struct iavc_pci_softc),
- iavc_pci_probe, iavc_pci_attach, NULL, NULL);
-
-static const struct iavc_pci_product {
- pci_vendor_id_t npp_vendor;
- pci_product_id_t npp_product;
- const char *name;
-} iavc_pci_products[] = {
- { PCI_VENDOR_AVM, PCI_PRODUCT_AVM_B1, "AVM B1 PCI" },
- { PCI_VENDOR_AVM, PCI_PRODUCT_AVM_T1, "AVM T1 PCI" },
- { 0, 0, NULL },
-};
-
-static const struct iavc_pci_product *
-find_cardname(struct pci_attach_args * pa)
-{
- const struct iavc_pci_product *pp = NULL;
-
- for (pp = iavc_pci_products; pp->npp_vendor; pp++) {
- if (PCI_VENDOR(pa->pa_id) == pp->npp_vendor &&
- PCI_PRODUCT(pa->pa_id) == pp->npp_product)
- return pp;
- }
-
- return NULL;
-}
-
-static int
-iavc_pci_probe(device_t parent, cfdata_t match, void *aux)
-{
- struct pci_attach_args *pa = aux;
-
- if (find_cardname(pa))
- return 1;
-
- return 0;
-}
-
-static void
-iavc_pci_attach(device_t parent, device_t self, void *aux)
-{
- struct iavc_pci_softc *psc = device_private(self);
- struct iavc_softc *sc = &psc->sc_iavc;
- struct pci_attach_args *pa = aux;
- pci_chipset_tag_t pc = pa->pa_pc;
- const struct iavc_pci_product *pp;
- pci_intr_handle_t ih;
- const char *intrstr;
- int ret;
- char intrbuf[PCI_INTRSTR_LEN];
-
- pp = find_cardname(pa);
- if (pp == NULL)
- return;
-
- sc->sc_dev = self;
- sc->sc_t1 = 0;
- sc->sc_dma = 0;
- sc->dmat = pa->pa_dmat;
-
- if (pci_mapreg_map(pa, IAVC_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0,
- &sc->sc_io_bt, &sc->sc_io_bh, &psc->io_base, &psc->io_size)) {
- aprint_error(": unable to map i/o registers\n");
- return;
- }
-
- if (pci_mapreg_map(pa, IAVC_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0,
- &sc->sc_mem_bt, &sc->sc_mem_bh, &psc->mem_base, &psc->mem_size)) {
- aprint_error(": unable to map mem registers\n");
- return;
- }
- aprint_normal(": %s\n", pp->name);
-
- iavc_b1dma_reset(sc);
-
- if (pp->npp_product == PCI_PRODUCT_AVM_T1) {
- aprint_error_dev(self, "sorry, PRI not yet supported\n");
- return;
-
-#if 0
- sc->sc_capi.card_type = CARD_TYPEC_AVM_T1_PCI;
- sc->sc_capi.sc_nbch = NBCH_PRI;
- ret = iavc_t1_detect(sc);
- if (ret) {
- if (ret < 6) {
- aprint_error_dev(self, "no card detected?\n");
- } else {
- aprint_error_dev(self, "black box not on\n");
- }
- return;
- } else {
- sc->sc_dma = 1;
- sc->sc_t1 = 1;
- }
-#endif
-
- } else if (pp->npp_product == PCI_PRODUCT_AVM_B1) {
- sc->sc_capi.card_type = CARD_TYPEC_AVM_B1_PCI;
- sc->sc_capi.sc_nbch = NBCH_BRI;
- ret = iavc_b1dma_detect(sc);
- if (ret) {
- ret = iavc_b1_detect(sc);
- if (ret) {
- aprint_error_dev(self, "no card detected?\n");
- return;
- }
- } else {
- sc->sc_dma = 1;
- }
- }
- if (sc->sc_dma)
- iavc_b1dma_reset(sc);
-
-#if 0
- /*
- * XXX: should really be done this way, but this freezes the card
- */
- if (sc->sc_t1)
- iavc_t1_reset(sc);
- else
- iavc_b1_reset(sc);
-#endif
-
- if (pci_intr_map(pa, &ih)) {
- aprint_error_dev(self, "couldn't map interrupt\n");
- return;
- }
-
- intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
- psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, iavc_pci_intr, psc);
- if (psc->sc_ih == NULL) {
- aprint_error_dev(self, "couldn't establish interrupt");
- if (intrstr != NULL)
- aprint_error(" at %s", intrstr);
- aprint_error("\n");
- return;
- }
- psc->sc_pc = pc;
- aprint_normal_dev(self, "interrupting at %s\n", intrstr);
-
- memset(&sc->sc_txq, 0, sizeof(struct ifqueue));
- sc->sc_txq.ifq_maxlen = sc->sc_capi.sc_nbch * 4;
-
- sc->sc_intr = 0;
- sc->sc_state = IAVC_DOWN;
- sc->sc_blocked = 0;
-
- /* setup capi link */
- sc->sc_capi.load = iavc_load;
- sc->sc_capi.reg_appl = iavc_register;
- sc->sc_capi.rel_appl = iavc_release;
- sc->sc_capi.send = iavc_send;
- sc->sc_capi.ctx = (void *) sc;
-
- /* lock & load DMA for TX */
- if ((ret = bus_dmamem_alloc(sc->dmat, IAVC_DMA_SIZE, PAGE_SIZE, 0,
- &sc->txseg, 1, &sc->ntxsegs, BUS_DMA_ALLOCNOW)) != 0) {
- aprint_error_dev(self,
- "can't allocate tx DMA memory, error = %d\n", ret);
- goto fail1;
- }
-
- if ((ret = bus_dmamem_map(sc->dmat, &sc->txseg, sc->ntxsegs,
- IAVC_DMA_SIZE, &sc->sc_sendbuf, BUS_DMA_NOWAIT)) != 0) {
- aprint_error_dev(self, "can't map tx DMA memory, error = %d\n",
- ret);
- goto fail2;
- }
-
- if ((ret = bus_dmamap_create(sc->dmat, IAVC_DMA_SIZE, 1,
- IAVC_DMA_SIZE, 0, BUS_DMA_ALLOCNOW | BUS_DMA_NOWAIT,
- &sc->tx_map)) != 0) {
- aprint_error_dev(self, "can't create tx DMA map, error = %d\n",
- ret);
- goto fail3;
- }
-
- if ((ret = bus_dmamap_load(sc->dmat, sc->tx_map, sc->sc_sendbuf,
- IAVC_DMA_SIZE, NULL, BUS_DMA_WRITE | BUS_DMA_NOWAIT)) != 0) {
- aprint_error_dev(self, "can't load tx DMA map, error = %d\n",
- ret);
- goto fail4;
- }
-
- /* do the same for RX */
- if ((ret = bus_dmamem_alloc(sc->dmat, IAVC_DMA_SIZE, PAGE_SIZE, 0,
- &sc->rxseg, 1, &sc->nrxsegs, BUS_DMA_ALLOCNOW)) != 0) {
- aprint_error_dev(self,
- "can't allocate rx DMA memory, error = %d\n", ret);
- goto fail5;
- }
-
- if ((ret = bus_dmamem_map(sc->dmat, &sc->rxseg, sc->nrxsegs,
- IAVC_DMA_SIZE, &sc->sc_recvbuf, BUS_DMA_NOWAIT)) != 0) {
- aprint_error_dev(self,
- "can't map rx DMA memory, error = %d\n", ret);
- goto fail6;
- }
-
- if ((ret = bus_dmamap_create(sc->dmat, IAVC_DMA_SIZE, 1, IAVC_DMA_SIZE,
- 0, BUS_DMA_ALLOCNOW | BUS_DMA_NOWAIT, &sc->rx_map)) != 0) {
- aprint_error_dev(self, "can't create rx DMA map, error = %d\n",
- ret);
- goto fail7;
- }
-
- if ((ret = bus_dmamap_load(sc->dmat, sc->rx_map, sc->sc_recvbuf,
- IAVC_DMA_SIZE, NULL, BUS_DMA_READ | BUS_DMA_NOWAIT)) != 0) {
- aprint_error_dev(self, "can't load rx DMA map, error = %d\n",
- ret);
- goto fail8;
- }
-
- if (capi_ll_attach(&sc->sc_capi, device_xname(sc->sc_dev), pp->name)) {
- aprint_error_dev(self, "capi attach failed\n");
- goto fail9;
- }
- return;
-
- /* release resources in case of failed attach */
-fail9:
- bus_dmamap_unload(sc->dmat, sc->rx_map);
-fail8:
- bus_dmamap_destroy(sc->dmat, sc->rx_map);
-fail7:
- bus_dmamem_unmap(sc->dmat, sc->sc_recvbuf, IAVC_DMA_SIZE);
-fail6:
- bus_dmamem_free(sc->dmat, &sc->rxseg, sc->nrxsegs);
-fail5:
- bus_dmamap_unload(sc->dmat, sc->tx_map);
-fail4:
- bus_dmamap_destroy(sc->dmat, sc->tx_map);
-fail3:
- bus_dmamem_unmap(sc->dmat, sc->sc_sendbuf, IAVC_DMA_SIZE);
-fail2:
- bus_dmamem_free(sc->dmat, &sc->txseg, sc->ntxsegs);
-fail1:
- pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
-
- return;
-}
-
-int
-iavc_pci_intr(void *arg)
-{
- struct iavc_softc *sc = arg;
-
- return iavc_handle_intr(sc);
-}
-
-#if 0
-static int
-iavc_pci_detach(device_t self, int flags)
-{
- struct iavc_pci_softc *psc = device_private(self);
-
- bus_space_unmap(psc->sc_iavc.sc_mem_bt, psc->sc_iavc.sc_mem_bh,
- psc->mem_size);
- bus_space_free(psc->sc_iavc.sc_mem_bt, psc->sc_iavc.sc_mem_bh,
- psc->mem_size);
- bus_space_unmap(psc->sc_iavc.sc_io_bt, psc->sc_iavc.sc_io_bh,
- psc->io_size);
- bus_space_free(psc->sc_iavc.sc_io_bt, psc->sc_iavc.sc_io_bh,
- psc->io_size);
-
- pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
-
- /* XXX: capi detach?!? */
-
- return 0;
-}
-#endif