diff options
| author | riastradh <riastradh@NetBSD.org> | 2021-12-19 10:59:00 +0000 |
|---|---|---|
| committer | riastradh <riastradh@NetBSD.org> | 2021-12-19 10:59:00 +0000 |
| commit | 54ddf812c141bfbd5ff09fb4fdfb52e624b85f26 (patch) | |
| tree | 3bc32781548caa1b1239a058bd82343427e94ec2 /sys/external | |
| parent | 6984de677d00c7df72fb2773ec7a832f2f3bc6dc (diff) | |
First whack at amdgpu. Long way to go.
Diffstat (limited to 'sys/external')
49 files changed, 362 insertions, 118 deletions
diff --git a/sys/external/bsd/drm2/amdgpu/files.amdgpu b/sys/external/bsd/drm2/amdgpu/files.amdgpu index e110f2947a0..3d7e0abc71f 100644 --- a/sys/external/bsd/drm2/amdgpu/files.amdgpu +++ b/sys/external/bsd/drm2/amdgpu/files.amdgpu @@ -1,4 +1,4 @@ -# $NetBSD: files.amdgpu,v 1.13 2021/12/19 10:56:39 riastradh Exp $ +# $NetBSD: files.amdgpu,v 1.14 2021/12/19 10:59:00 riastradh Exp $ version 20180827 @@ -31,9 +31,20 @@ makeoptions amdgpu "CPPFLAGS.amdgpu"+="-I$S/external/bsd/drm2/dist/drm/amd/displ makeoptions amdgpu "CPPFLAGS.amdgpu"+="-I$S/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm" makeoptions amdgpu "CPPFLAGS.amdgpu"+="-I$S/external/bsd/drm2/dist/drm/amd/display/dmub/inc" +makeoptions amdgpu "CPPFLAGS.amdgpu"+="-DCONFIG_DRM_AMD_ACP" + makeoptions amdgpu "CWARNFLAGS.amdgpu"+="-Wno-missing-field-initializers" makeoptions amdgpu "CWARNFLAGS.amdgpu"+="-Wno-shadow" makeoptions amdgpu "CWARNFLAGS.amdgpu"+="-Wno-pointer-arith" +makeoptions amdgpu "CWARNFLAGS.amdgpu"+="-Wno-override-init" + +# Half the file strips const qualifier; file is small enough this is +# not an issue. +makeoptions amdgpu "CWARNFLAGS.amdgpu_arct_reg_init.c"+="-Wno-cast-qual" + +# -Wtype-limits raises warnings about code that is careful to avoid +# overflow in arithmetic, which is the opposite of helpful. &@!#* +makeoptions amdgpu "CWARNFLAGS.amdgpu_bo_list.c"+="-Wno-type-limits" # Local additions. file external/bsd/drm2/amdgpu/amdgpu_module.c amdgpu @@ -298,7 +309,7 @@ file external/bsd/drm2/dist/drm/amd/amdgpu/../powerplay/smumgr/amdgpu_vega12_smu file external/bsd/drm2/dist/drm/amd/amdgpu/../powerplay/smumgr/amdgpu_vega20_smumgr.c amdgpu file external/bsd/drm2/dist/drm/amd/amdgpu/../powerplay/smumgr/amdgpu_vegam_smumgr.c amdgpu file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acp.c amdgpu -file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acpi.c amdgpu +#file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acpi.c amdgpu file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_afmt.c amdgpu file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd.c amdgpu file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_arct_reg_init.c amdgpu diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acp.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acp.c index ce4192b49d8..f610a04a9f4 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acp.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acp.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_acp.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_acp.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_acp.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_acp.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/irqdomain.h> #include <linux/pci.h> @@ -122,6 +122,8 @@ static int acp_sw_fini(void *handle) return 0; } +#ifndef __NetBSD__ /* XXX amdgpu pm */ + struct acp_pm_domain { void *adev; struct generic_pm_domain gpd; @@ -181,6 +183,8 @@ static struct device *get_mfd_cell_dev(const char *device_name, int r) return dev; } +#endif + /** * acp_hw_init - start and test ACP block * @@ -220,6 +224,7 @@ static int acp_hw_init(void *handle) acp_base = adev->rmmio_base; +#ifndef __NetBSD__ /* XXX amdgpu pm */ adev->acp.acp_genpd = kzalloc(sizeof(struct acp_pm_domain), GFP_KERNEL); if (adev->acp.acp_genpd == NULL) return -ENOMEM; @@ -232,7 +237,9 @@ static int acp_hw_init(void *handle) adev->acp.acp_genpd->adev = adev; pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false); +#endif +#ifndef __NetBSD__ /* XXX amdgpu cell */ adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), GFP_KERNEL); @@ -240,6 +247,7 @@ static int acp_hw_init(void *handle) r = -ENOMEM; goto failure; } +#endif adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL); if (adev->acp.acp_res == NULL) { @@ -247,6 +255,9 @@ static int acp_hw_init(void *handle) goto failure; } +#ifdef __NetBSD__ /* XXX amdgpu sound */ + __USE(i2s_pdata); +#else i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL); if (i2s_pdata == NULL) { r = -ENOMEM; @@ -294,6 +305,7 @@ static int acp_hw_init(void *handle) i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000; i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET; i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET; +#endif adev->acp.acp_res[0].name = "acp2x_dma"; adev->acp.acp_res[0].flags = IORESOURCE_MEM; @@ -320,6 +332,10 @@ static int acp_hw_init(void *handle) adev->acp.acp_res[4].start = amdgpu_irq_create_mapping(adev, 162); adev->acp.acp_res[4].end = adev->acp.acp_res[4].start; +#ifdef __NetBSD__ /* XXX amdgpu cell */ + __USE(dev); + __USE(i); +#else adev->acp.acp_cell[0].name = "acp_audio_dma"; adev->acp.acp_cell[0].num_resources = 5; adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; @@ -357,7 +373,7 @@ static int acp_hw_init(void *handle) goto failure; } } - +#endif /* Assert Soft reset of ACP */ val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); @@ -372,7 +388,7 @@ static int acp_hw_init(void *handle) (val & ACP_SOFT_RESET__SoftResetAudDone_MASK)) break; if (--count == 0) { - dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); + dev_err(pci_dev_dev(adev->pdev), "Failed to reset ACP\n"); r = -ETIMEDOUT; goto failure; } @@ -390,7 +406,7 @@ static int acp_hw_init(void *handle) if (val & (u32) 0x1) break; if (--count == 0) { - dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); + dev_err(pci_dev_dev(adev->pdev), "Failed to reset ACP\n"); r = -ETIMEDOUT; goto failure; } @@ -443,7 +459,7 @@ static int acp_hw_fini(void *handle) (val & ACP_SOFT_RESET__SoftResetAudDone_MASK)) break; if (--count == 0) { - dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); + dev_err(pci_dev_dev(adev->pdev), "Failed to reset ACP\n"); return -ETIMEDOUT; } udelay(100); @@ -460,12 +476,17 @@ static int acp_hw_fini(void *handle) if (val & (u32) 0x1) break; if (--count == 0) { - dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); + dev_err(pci_dev_dev(adev->pdev), "Failed to reset ACP\n"); return -ETIMEDOUT; } udelay(100); } +#ifdef __NetBSD__ /* XXX amdgpu pm */ + __USE(dev); + __USE(i); + __USE(ret); +#else for (i = 0; i < ACP_DEVS ; i++) { dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); ret = pm_genpd_remove_device(dev); @@ -475,6 +496,7 @@ static int acp_hw_fini(void *handle) } mfd_remove_devices(adev->acp.parent); +#endif kfree(adev->acp.acp_res); kfree(adev->acp.acp_genpd); kfree(adev->acp.acp_cell); diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd.c index ae056ec38a5..d9ed1f7cd83 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_amdkfd.c,v 1.5 2021/12/19 10:56:50 riastradh Exp $ */ +/* $NetBSD: amdgpu_amdkfd.c,v 1.6 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2014 Advanced Micro Devices, Inc. @@ -23,7 +23,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_amdkfd.c,v 1.5 2021/12/19 10:56:50 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_amdkfd.c,v 1.6 2021/12/19 10:59:01 riastradh Exp $"); #include "amdgpu_amdkfd.h" #include "amd_shared.h" @@ -385,8 +385,12 @@ void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd, struct kfd_local_mem_info *mem_info) { struct amdgpu_device *adev = (struct amdgpu_device *)kgd; +#ifdef __NetBSD__ + uint64_t address_mask = ~(uint64_t)0; /* XXX */ +#else uint64_t address_mask = adev->dev->dma_mask ? ~*adev->dev->dma_mask : ~((1ULL << 32) - 1); +#endif resource_size_t aper_limit = adev->gmc.aper_base + adev->gmc.aper_size; memset(mem_info, 0, sizeof(*mem_info)); @@ -400,7 +404,7 @@ void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd, } mem_info->vram_width = adev->gmc.vram_width; - pr_debug("Address base: %pap limit %pap public 0x%llx private 0x%llx\n", + pr_debug("Address base: %pap limit %pap public 0x%"PRIx64" private 0x%"PRIx64"\n", &adev->gmc.aper_base, &aper_limit, mem_info->local_mem_size_public, mem_info->local_mem_size_private); diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_atombios.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_atombios.c index 18fe865f91a..c2c1b128bf4 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_atombios.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_atombios.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_atombios.c,v 1.6 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_atombios.c,v 1.7 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2007-8 Advanced Micro Devices, Inc. @@ -27,7 +27,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_atombios.c,v 1.6 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_atombios.c,v 1.7 2021/12/19 10:59:01 riastradh Exp $"); #include <drm/amdgpu_drm.h> #include "amdgpu.h" @@ -41,6 +41,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_atombios.c,v 1.6 2021/12/18 23:44:58 riastrad #include "atombios_encoders.h" #include "bif/bif_4_1_d.h" +#include <linux/nbsd-namespace.h> + static void amdgpu_atombios_lookup_i2c_gpio_quirks(struct amdgpu_device *adev, ATOM_GPIO_I2C_ASSIGMENT *gpio, u8 index) @@ -1944,6 +1946,7 @@ static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg) return r; } +#ifdef CONFIG_SYSFS static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev, struct device_attribute *attr, char *buf) @@ -1957,6 +1960,7 @@ static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev, static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version, NULL); +#endif /** * amdgpu_atombios_fini - free the driver info and callbacks for atombios @@ -1978,7 +1982,9 @@ void amdgpu_atombios_fini(struct amdgpu_device *adev) adev->mode_info.atom_context = NULL; kfree(adev->mode_info.atom_card_info); adev->mode_info.atom_card_info = NULL; +#ifdef CONFIG_SYSFS device_remove_file(adev->dev, &dev_attr_vbios_version); +#endif } /** @@ -2043,11 +2049,13 @@ int amdgpu_atombios_init(struct amdgpu_device *adev) amdgpu_atombios_allocate_fb_scratch(adev); } +#ifdef CONFIG_SYSFS ret = device_create_file(adev->dev, &dev_attr_vbios_version); if (ret) { DRM_ERROR("Failed to create device file for VBIOS version\n"); return ret; } +#endif return 0; } diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bios.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bios.c index 30f49a92d6f..b7c83bec7b4 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bios.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bios.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_bios.c,v 1.4 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_bios.c,v 1.5 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2008 Advanced Micro Devices, Inc. @@ -29,7 +29,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_bios.c,v 1.4 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_bios.c,v 1.5 2021/12/19 10:59:01 riastradh Exp $"); #include "amdgpu.h" #include "atom.h" @@ -37,6 +37,9 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_bios.c,v 1.4 2021/12/18 23:44:58 riastradh Ex #include <linux/pci.h> #include <linux/slab.h> #include <linux/acpi.h> + +#include <linux/nbsd-namespace.h> + /* * BIOS. */ diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bo_list.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bo_list.c index 085df174dc5..e58eebfce6a 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bo_list.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bo_list.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_bo_list.c,v 1.7 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_bo_list.c,v 1.8 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -31,7 +31,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_bo_list.c,v 1.7 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_bo_list.c,v 1.8 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/uaccess.h> @@ -113,12 +113,18 @@ int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp, usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm); if (usermm) { +#ifdef __NetBSD__ /* XXX amdgpu userptr */ + amdgpu_bo_unref(&bo); + r = -EPERM; + goto error_free; +#else if (usermm != current->mm) { amdgpu_bo_unref(&bo); r = -EPERM; goto error_free; } entry = &array[--first_userptr]; +#endif } else { entry = &array[last_entry++]; } diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cgs.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cgs.c index bbe682e0bc1..7b4afa7d53a 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cgs.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cgs.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_cgs.c,v 1.6 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_cgs.c,v 1.7 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -24,7 +24,7 @@ * */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_cgs.c,v 1.6 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_cgs.c,v 1.7 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/list.h> #include <linux/pci.h> @@ -36,6 +36,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_cgs.c,v 1.6 2021/12/18 23:44:58 riastradh Exp #include "atom.h" #include "amdgpu_ucode.h" +#include <linux/nbsd-namespace.h> + struct amdgpu_cgs_device { struct cgs_device base; struct amdgpu_device *adev; diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c index 8baaa9f1775..56b07ff74cf 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_cik.c,v 1.4 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_cik.c,v 1.5 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012 Advanced Micro Devices, Inc. @@ -24,7 +24,7 @@ * Authors: Alex Deucher */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_cik.c,v 1.4 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_cik.c,v 1.5 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/firmware.h> #include <linux/slab.h> @@ -75,6 +75,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_cik.c,v 1.4 2021/12/18 23:44:58 riastradh Exp #include "amdgpu_amdkfd.h" #include "dce_virtual.h" +#include <linux/nbsd-namespace.h> + /* * Indirect registers accessor */ diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cs.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cs.c index afcd94e10b5..2557a37e3b2 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cs.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cs.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_cs.c,v 1.5 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_cs.c,v 1.6 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2008 Jerome Glisse. @@ -28,7 +28,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_cs.c,v 1.5 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_cs.c,v 1.6 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/file.h> #include <linux/pagemap.h> @@ -482,8 +482,13 @@ static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p, struct mm_struct *usermm; usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm); +#ifdef __NetBSD__ /* XXX amdgpu userptr */ + if (usermm) + return -EPERM; +#else if (usermm && usermm != current->mm) return -EPERM; +#endif if (amdgpu_ttm_tt_is_userptr(bo->tbo.ttm) && lobj->user_invalidated && lobj->user_pages) { @@ -1007,7 +1012,7 @@ static int amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p, r = drm_syncobj_find_fence(p->filp, handle, point, flags, &fence); if (r) { - DRM_ERROR("syncobj %u failed to find fence @ %llu (%d)!\n", + DRM_ERROR("syncobj %u failed to find fence @ %"PRIu64" (%d)!\n", handle, point, r); return r; } @@ -1459,6 +1464,27 @@ int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data, return r; case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD: +#ifdef __NetBSD__ + { + struct file *fp = NULL; + + /* XXX errno NetBSD->Linux */ + r = -fd_allocfile(&fp, &fd); + if (r) + goto out; + sync_file = sync_file_create(fence, fp); + if (sync_file == NULL) + goto out; + fd_affix(curproc, fp, fd); + fp = NULL; /* consumed by sync_file */ + +out: if (fp) { + fd_abort(curproc, fp, fd); + fd = -1; + } + dma_fence_put(fence); + } +#else fd = get_unused_fd_flags(O_CLOEXEC); if (fd < 0) { dma_fence_put(fence); @@ -1473,6 +1499,7 @@ int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data, } fd_install(fd, sync_file->file); +#endif info->out.handle = fd; return 0; diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_csa.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_csa.c index dbec4a54330..f82caf1cc26 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_csa.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_csa.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_csa.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_csa.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2016 Advanced Micro Devices, Inc. @@ -25,7 +25,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_csa.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_csa.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include "amdgpu.h" @@ -42,7 +42,7 @@ uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev) int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo, u32 domain, uint32_t size) { - int r; + int r __unused; void *ptr; r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE, diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dma_buf.h b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dma_buf.h index 278fdfe41c6..cd42c6aaf5b 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dma_buf.h +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dma_buf.h @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dma_buf.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_dma_buf.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2019 Advanced Micro Devices, Inc. @@ -33,8 +33,13 @@ struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf); void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj); void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); +#ifdef __NetBSD__ +int amdgpu_gem_prime_mmap_object(struct drm_gem_object *, off_t *, size_t, int, + int *, struct uvm_object **, int *); +#else int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); +#endif extern const struct dma_buf_ops amdgpu_dmabuf_ops; diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ras.h b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ras.h index 27ed1095774..6894dca3734 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ras.h +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ras.h @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_ras.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_ras.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2018 Advanced Micro Devices, Inc. @@ -320,8 +320,10 @@ struct amdgpu_ras { /* debugfs */ struct dentry *dir; /* sysfs */ +#ifdef CONFIG_SYSFS struct device_attribute features_attr; struct bin_attribute badpages_attr; +#endif /* block array */ struct ras_manager *objs; @@ -393,8 +395,10 @@ struct ras_manager { /* debugfs */ struct dentry *ent; /* sysfs */ +#ifdef CONFIG_SYSFS struct device_attribute sysfs_attr; int attr_inuse; +#endif /* fs node name */ struct ras_fs_data fs_data; diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ring.h b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ring.h index 89c92dc296b..7ee2e7edfd6 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ring.h +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ring.h @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_ring.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_ring.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2016 Advanced Micro Devices, Inc. @@ -26,6 +26,8 @@ #ifndef __AMDGPU_RING_H__ #define __AMDGPU_RING_H__ +#include <linux/idr.h> + #include <drm/amdgpu_drm.h> #include <drm/gpu_scheduler.h> #include <drm/drm_print.h> @@ -307,7 +309,7 @@ static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n"); occupied = ring->wptr & ring->buf_mask; - dst = (void *)&ring->ring[occupied]; + dst = __UNVOLATILE(&ring->ring[occupied]); chunk1 = ring->buf_mask + 1 - occupied; chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1; chunk2 = count_dw - chunk1; @@ -319,7 +321,7 @@ static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, if (chunk2) { src += chunk1; - dst = (void *)ring->ring; + dst = __UNVOLATILE(ring->ring); memcpy(dst, src, chunk2); } diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ttm.h b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ttm.h index 0167303e55f..60772144cf8 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ttm.h +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ttm.h @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_ttm.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_ttm.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2016 Advanced Micro Devices, Inc. @@ -42,6 +42,11 @@ #define AMDGPU_POISON 0xd0bed0be +#ifdef __NetBSD__ +# define __amdgpu_aperture_iomem +# define __iomem __amdgpu_aperture_iomem +#endif + struct amdgpu_mman { struct ttm_bo_device bdev; bool mem_global_referenced; @@ -62,6 +67,10 @@ struct amdgpu_mman { struct drm_sched_entity entity; }; +#ifdef __NetBSD__ +# undef __iomem +#endif + struct amdgpu_copy_mem { struct ttm_buffer_object *bo; struct ttm_mem_reg *mem; @@ -101,7 +110,12 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, struct dma_resv *resv, struct dma_fence **fence); +#ifdef __NetBSD__ +int amdgpu_mmap_object(struct drm_device *, off_t, size_t, vm_prot_t, + struct uvm_object **, voff_t *, struct file *); +#else int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); +#endif int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_virt.h b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_virt.h index 90ea0f9e97c..4efa0d1abc0 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_virt.h +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_virt.h @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_virt.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_virt.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2016 Advanced Micro Devices, Inc. @@ -278,7 +278,11 @@ struct amdgpu_virt { static inline bool is_virtual_machine(void) { #ifdef CONFIG_X86 +#ifdef __NetBSD__ + return false; /* XXX */ +#else return boot_cpu_has(X86_FEATURE_HYPERVISOR); +#endif #else return false; #endif diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.c b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.c index e7068019189..28ec50e784a 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.c +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_xgmi.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_xgmi.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2018 Advanced Micro Devices, Inc. @@ -24,7 +24,7 @@ * */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_xgmi.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_xgmi.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/list.h> #include "amdgpu.h" @@ -86,6 +86,7 @@ static ssize_t amdgpu_xgmi_show_hive_id(struct device *dev, static int amdgpu_xgmi_sysfs_create(struct amdgpu_device *adev, struct amdgpu_hive_info *hive) { +#ifdef CONFIG_SYSFS int ret = 0; if (WARN_ON(hive->kobj)) @@ -115,15 +116,18 @@ static int amdgpu_xgmi_sysfs_create(struct amdgpu_device *adev, } return ret; +#endif } static void amdgpu_xgmi_sysfs_destroy(struct amdgpu_device *adev, struct amdgpu_hive_info *hive) { +#ifdef CONFIG_SYSFS sysfs_remove_file(hive->kobj, &hive->dev_attr.attr); kobject_del(hive->kobj); kobject_put(hive->kobj); hive->kobj = NULL; +#endif } static ssize_t amdgpu_xgmi_show_device_id(struct device *dev, @@ -172,6 +176,7 @@ static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL); static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev, struct amdgpu_hive_info *hive) { +#ifdef CONFIG_SYSFS int ret = 0; char node[10] = { 0 }; @@ -217,14 +222,17 @@ remove_file: success: return ret; +#endif } static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev, struct amdgpu_hive_info *hive) { +#ifdef CONFIG_SYSFS device_remove_file(adev->dev, &dev_attr_xgmi_device_id); sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique); sysfs_remove_link(hive->kobj, adev->ddev->unique); +#endif } @@ -469,6 +477,7 @@ void amdgpu_xgmi_remove_device(struct amdgpu_device *adev) if (!(hive->number_devices--)) { amdgpu_xgmi_sysfs_destroy(adev, hive); + task_barrier_destroy(&tmp->tb); mutex_destroy(&hive->hive_lock); mutex_destroy(&hive->reset_lock); } else { diff --git a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.h b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.h index 61a1d6aa189..b0e795103d3 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.h +++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_xgmi.h @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_xgmi.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ +/* $NetBSD: amdgpu_xgmi.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2016 Advanced Micro Devices, Inc. @@ -33,7 +33,9 @@ struct amdgpu_hive_info { int number_devices; struct mutex hive_lock, reset_lock; struct kobject *kobj; +#ifdef CONFIG_SYSFS struct device_attribute dev_attr; +#endif struct amdgpu_device *adev; int pstate; /*0 -- low , 1 -- high , -1 unknown*/ struct task_barrier tb; diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c index c835c20a2b7..dbb241aa517 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dm_pp_smu.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $ */ +/* $NetBSD: amdgpu_dm_pp_smu.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2018 Advanced Micro Devices, Inc. @@ -24,7 +24,7 @@ * Authors: AMD */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dm_pp_smu.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dm_pp_smu.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/string.h> #include <linux/acpi.h> @@ -811,7 +811,7 @@ enum pp_smu_status pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz) } enum pp_smu_status pp_nv_set_pstate_handshake_support( - struct pp_smu *pp, BOOLEAN pstate_handshake_supported) + struct pp_smu *pp, bool pstate_handshake_supported) { const struct dc_context *ctx = pp->dm; struct amdgpu_device *adev = ctx->driver_context; diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/amdgpu_dc_helper.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/amdgpu_dc_helper.c index 7aa7912860a..38f7694c210 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/amdgpu_dc_helper.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/amdgpu_dc_helper.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dc_helper.c,v 1.3 2021/12/19 10:56:50 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_helper.c,v 1.4 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2017 Advanced Micro Devices, Inc. @@ -30,7 +30,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_helper.c,v 1.3 2021/12/19 10:56:50 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_helper.c,v 1.4 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/delay.h> @@ -39,6 +39,7 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_helper.c,v 1.3 2021/12/19 10:56:50 riastra #include "dc.h" #include "dc_dmub_srv.h" +#include "inc/reg_helper.h" static inline void submit_dmub_read_modify_write( struct dc_reg_helper_state *offload, diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/basics/amdgpu_conversion.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/basics/amdgpu_conversion.c index f1ffb92e6d7..721eaaac9cc 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/basics/amdgpu_conversion.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/basics/amdgpu_conversion.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_conversion.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $ */ +/* $NetBSD: amdgpu_conversion.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,9 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_conversion.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_conversion.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); + +#include "conversion.h" #include "dm_services.h" diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_bios_parser.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_bios_parser.c index a2a13369384..2d2b456d7e8 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_bios_parser.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_bios_parser.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_bios_parser.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $ */ +/* $NetBSD: amdgpu_bios_parser.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_bios_parser.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_bios_parser.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/slab.h> @@ -2589,6 +2589,7 @@ static struct integrated_info *bios_parser_create_integrated_info( return NULL; } +static enum bp_result update_slot_layout_info( struct dc_bios *dcb, unsigned int i, @@ -2693,6 +2694,7 @@ enum bp_result update_slot_layout_info( } +static enum bp_result get_bracket_layout_record( struct dc_bios *dcb, unsigned int bracket_layout_id, diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_command_table.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_command_table.c index 01588801fb9..8fd8bcc7a90 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_command_table.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/amdgpu_command_table.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_command_table.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $ */ +/* $NetBSD: amdgpu_command_table.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_command_table.c,v 1.2 2021/12/18 23:45:00 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_command_table.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include "dm_services.h" #include "amdgpu.h" @@ -1461,7 +1461,7 @@ static enum bp_result adjust_display_pll_v2( struct bp_adjust_pixel_clock_parameters *bp_params) { enum bp_result result = BP_RESULT_FAILURE; - ADJUST_DISPLAY_PLL_PS_ALLOCATION params = { 0 }; + ADJUST_DISPLAY_PLL_PS_ALLOCATION params __unused = { 0 }; /* We need to convert from KHz units into 10KHz units and then convert * output pixel clock back 10KHz-->KHz */ diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc.c index 6782c9236ab..4f09377f3f9 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dc.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -25,7 +25,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/slab.h> #include <linux/mm.h> @@ -2113,8 +2113,10 @@ static void commit_planes_do_stream_update(struct dc *dc, if (*stream_update->dpms_off) { core_link_disable_stream(pipe_ctx); /* for dpms, keep acquired resources*/ +#ifndef __NetBSD__ /* XXX amdgpu audio */ if (pipe_ctx->stream_res.audio && !dc->debug.az_endpoint_mute_only) pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio); +#endif dc->hwss.optimize_bandwidth(dc, dc->current_state); } else { diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_debug.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_debug.c index 2a9e0955581..6f38bf90d1d 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_debug.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_debug.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dc_debug.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_debug.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2017 Advanced Micro Devices, Inc. @@ -30,7 +30,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_debug.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_debug.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include "dm_services.h" @@ -76,8 +76,8 @@ void pre_surface_trace( "plane_state->visible = %d;\n" "plane_state->flip_immediate = %d;\n" "plane_state->address.type = %d;\n" - "plane_state->address.grph.addr.quad_part = 0x%llX;\n" - "plane_state->address.grph.meta_addr.quad_part = 0x%llX;\n" + "plane_state->address.grph.addr.quad_part = 0x%"PRIX64";\n" + "plane_state->address.grph.meta_addr.quad_part = 0x%"PRIX64";\n" "plane_state->scaling_quality.h_taps = %d;\n" "plane_state->scaling_quality.v_taps = %d;\n" "plane_state->scaling_quality.h_taps_c = %d;\n" @@ -193,8 +193,8 @@ void update_surface_trace( SURFACE_TRACE("Update %d\n", i); if (update->flip_addr) { SURFACE_TRACE("flip_addr->address.type = %d;\n" - "flip_addr->address.grph.addr.quad_part = 0x%llX;\n" - "flip_addr->address.grph.meta_addr.quad_part = 0x%llX;\n" + "flip_addr->address.grph.addr.quad_part = 0x%"PRIX64";\n" + "flip_addr->address.grph.meta_addr.quad_part = 0x%"PRIX64";\n" "flip_addr->flip_immediate = %d;\n", update->flip_addr->address.type, update->flip_addr->address.grph.addr.quad_part, diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_hw_sequencer.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_hw_sequencer.c index c2886da3423..cabd67ce34c 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_hw_sequencer.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_hw_sequencer.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dc_hw_sequencer.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_hw_sequencer.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_hw_sequencer.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_hw_sequencer.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/delay.h> @@ -182,6 +182,7 @@ static bool is_ycbcr709_limited_type( ret = true; return ret; } +static enum dc_color_space_type get_color_space_type(enum dc_color_space color_space) { enum dc_color_space_type type = COLOR_SPACE_RGB_TYPE; diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link.c index 5eea06bee22..cd81500d548 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dc_link.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_link.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_link.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_link.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/slab.h> @@ -727,7 +727,7 @@ static bool wait_for_alt_mode(struct dc_link *link) finish_timestamp = dm_get_timestamp(link->ctx); time_taken_in_ns = dm_get_elapse_time_in_ns( link->ctx, finish_timestamp, enter_timestamp); - DC_LOG_WARNING("Alt mode entered finished after %llu ms\n", + DC_LOG_WARNING("Alt mode entered finished after %"PRIu64" ms\n", div_u64(time_taken_in_ns, 1000000)); return true; } @@ -736,7 +736,7 @@ static bool wait_for_alt_mode(struct dc_link *link) finish_timestamp = dm_get_timestamp(link->ctx); time_taken_in_ns = dm_get_elapse_time_in_ns(link->ctx, finish_timestamp, enter_timestamp); - DC_LOG_WARNING("Alt mode has timed out after %llu ms\n", + DC_LOG_WARNING("Alt mode has timed out after %"PRIu64" ms\n", div_u64(time_taken_in_ns, 1000000)); return false; } @@ -2755,7 +2755,7 @@ enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx) "stream[%d].vcp_id: %d " "stream[%d].slot_count: %d\n", i, - (void *) link->mst_stream_alloc_table.stream_allocations[i].stream_enc, + (const void *) link->mst_stream_alloc_table.stream_allocations[i].stream_enc, i, link->mst_stream_alloc_table.stream_allocations[i].vcp_id, i, @@ -2847,7 +2847,7 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx) "stream[%d].vcp_id: %d " "stream[%d].slot_count: %d\n", i, - (void *) link->mst_stream_alloc_table.stream_allocations[i].stream_enc, + (const void *) link->mst_stream_alloc_table.stream_allocations[i].stream_enc, i, link->mst_stream_alloc_table.stream_allocations[i].vcp_id, i, diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_dp.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_dp.c index bea4f4378c9..ddfa53466b4 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_dp.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_dp.c @@ -1,8 +1,8 @@ -/* $NetBSD: amdgpu_dc_link_dp.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_link_dp.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* Copyright 2015 Advanced Micro Devices, Inc. */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_link_dp.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_link_dp.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include "dm_services.h" #include "dc.h" @@ -1291,9 +1291,9 @@ static void print_status_message( const struct link_training_settings *lt_settings, enum link_training_result status) { - char *link_rate = "Unknown"; - char *lt_result = "Unknown"; - char *lt_spread = "Disabled"; + const char *link_rate = "Unknown"; + const char *lt_result = "Unknown"; + const char *lt_spread = "Disabled"; switch (lt_settings->link_settings.link_rate) { case LINK_RATE_LOW: @@ -3523,6 +3523,7 @@ bool detect_dp_sink_caps(struct dc_link *link) /* TODO save sink caps in link->sink */ } +static enum dc_link_rate linkRateInKHzToLinkRateMultiplier(uint32_t link_rate_in_khz) { enum dc_link_rate link_rate; @@ -3818,7 +3819,7 @@ bool dc_link_dp_set_test_pattern( /* Set CRTC Test Pattern */ set_crtc_test_pattern(link, pipe_ctx, test_pattern, test_pattern_color_space); dp_set_hw_test_pattern(link, test_pattern, - (uint8_t *)p_custom_pattern, + (const uint8_t *)p_custom_pattern, (uint32_t)cust_pattern_size); /* Unblank Stream */ @@ -3854,7 +3855,7 @@ bool dc_link_dp_set_test_pattern( } dp_set_hw_test_pattern(link, test_pattern, - (uint8_t *)p_custom_pattern, + (const uint8_t *)p_custom_pattern, (uint32_t)cust_pattern_size); if (test_pattern != DP_TEST_PATTERN_VIDEO_MODE) { diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_hwss.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_hwss.c index accdf7635a1..9a2e6c0d854 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_hwss.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_link_hwss.c @@ -1,10 +1,10 @@ -/* $NetBSD: amdgpu_dc_link_hwss.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_link_hwss.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* Copyright 2015 Advanced Micro Devices, Inc. */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_link_hwss.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_link_hwss.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include "dm_services.h" #include "dc.h" @@ -294,7 +294,7 @@ void dp_set_hw_lane_settings( void dp_set_hw_test_pattern( struct dc_link *link, enum dp_test_pattern test_pattern, - uint8_t *custom_pattern, + const uint8_t *custom_pattern, uint32_t custom_pattern_size) { struct encoder_set_dp_phy_pattern_param pattern_param = {0}; @@ -334,8 +334,10 @@ void dp_retrain_link_dp_test(struct dc_link *link, dp_receiver_power_ctrl(link, false); link->dc->hwss.disable_stream(&pipes[i]); +#ifndef __NetBSD__ /* XXX amdgpu audio */ if ((&pipes[i])->stream_res.audio && !link->dc->debug.az_endpoint_mute_only) (&pipes[i])->stream_res.audio->funcs->az_disable((&pipes[i])->stream_res.audio); +#endif link->link_enc->funcs->disable_output( link->link_enc, @@ -357,6 +359,7 @@ void dp_retrain_link_dp_test(struct dc_link *link, link->dc->hwss.unblank_stream(&pipes[i], link_setting); +#ifndef __NetBSD__ /* XXX amdgpu audio */ if (pipes[i].stream_res.audio) { /* notify audio driver for * audio modes of monitor */ @@ -370,6 +373,7 @@ void dp_retrain_link_dp_test(struct dc_link *link, audio_mute_control( pipes[i].stream_res.stream_enc, false); } +#endif } } } diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_resource.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_resource.c index ec3a9a17f77..42a45419797 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_resource.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_resource.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dc_resource.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_resource.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_resource.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_resource.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/slab.h> @@ -209,6 +209,7 @@ void dc_destroy_resource_pool(struct dc *dc) } } +#ifndef __NetBSD__ /* XXX amdgpu audio */ static void update_num_audio( const struct resource_straps *straps, unsigned int *num_audio, @@ -235,6 +236,7 @@ static void update_num_audio( DC_ERR("DC: unexpected audio fuse!\n"); } } +#endif bool resource_construct( unsigned int num_virtual_links, @@ -252,6 +254,9 @@ bool resource_construct( create_funcs->read_dce_straps(dc->ctx, &straps); pool->audio_count = 0; +#ifdef __NetBSD__ /* XXX amdgpu audio */ + __USE(num_audio); +#else if (create_funcs->create_audio) { /* find the total number of streams available via the * AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT @@ -276,6 +281,7 @@ bool resource_construct( pool->audio_count++; } } +#endif pool->stream_enc_count = 0; if (create_funcs->create_stream_encoder) { @@ -966,6 +972,7 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx) * We also need to make sure pipe_ctx->plane_res.scl_data.h_active uses the * original h_border_left value in its calculation. */ +static int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx) { int store_h_border_left = pipe_ctx->stream->timing.h_border_left; @@ -977,6 +984,7 @@ int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx) return store_h_border_left; } +static void restore_border_left_from_dst(struct pipe_ctx *pipe_ctx, int store_h_border_left) { @@ -1662,6 +1670,7 @@ static int acquire_first_free_pipe( return -1; } +#ifndef __NetBSD__ /* XXX amdgpu audio */ static struct audio *find_first_free_audio( struct resource_context *res_ctx, const struct resource_pool *pool, @@ -1693,6 +1702,7 @@ static struct audio *find_first_free_audio( } return 0; } +#endif bool resource_is_stream_unchanged( struct dc_state *old_context, struct dc_stream_state *stream) @@ -2015,6 +2025,7 @@ enum dc_status resource_map_pool_resources( pipe_ctx->stream_res.stream_enc, true); +#ifndef __NetBSD__ /* XXX amdgpu audio */ /* TODO: Add check if ASIC support and EDID audio */ if (!stream->converter_disable_audio && dc_is_audio_capable_signal(pipe_ctx->stream->signal) && @@ -2031,6 +2042,7 @@ enum dc_status resource_map_pool_resources( update_audio_usage(&context->res_ctx, pool, pipe_ctx->stream_res.audio, true); } +#endif /* Add ABM to the resource if on EDP */ if (pipe_ctx->stream && dc_is_embedded_signal(pipe_ctx->stream->signal)) @@ -2040,8 +2052,12 @@ enum dc_status resource_map_pool_resources( if (context->streams[i] == stream) { context->stream_status[i].primary_otg_inst = pipe_ctx->stream_res.tg->inst; context->stream_status[i].stream_enc_inst = pipe_ctx->stream_res.stream_enc->id; +#ifdef __NetBSD__ /* XXX amdgpu audio */ + context->stream_status[i].audio_inst = -1; +#else context->stream_status[i].audio_inst = pipe_ctx->stream_res.audio ? pipe_ctx->stream_res.audio->inst : -1; +#endif return DC_OK; } diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/dce_audio.h b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/dce_audio.h index 6b96d20bbed..d5f4ea05965 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/dce_audio.h +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/dce_audio.h @@ -1,4 +1,4 @@ -/* $NetBSD: dce_audio.h,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: dce_audio.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -123,6 +123,8 @@ struct dce_audio_mask { }; +#ifndef __NetBSD__ /* XXX amdgpu audio */ + struct dce_audio { struct audio base; const struct dce_audio_registers *regs; @@ -154,4 +156,6 @@ void dce_aud_wall_dto_setup(struct audio *audio, const struct audio_crtc_info *crtc_info, const struct audio_pll_info *pll_info); +#endif + #endif /*__DAL_AUDIO_DCE_110_H__*/ diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/amdgpu_dce100_resource.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/amdgpu_dce100_resource.c index 0502718b06c..171a865e983 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/amdgpu_dce100_resource.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/amdgpu_dce100_resource.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dce100_resource.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dce100_resource.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce100_resource.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce100_resource.c,v 1.3 2021/12/19 10:59:01 riastradh Exp $"); #include <linux/slab.h> @@ -290,6 +290,7 @@ static const struct dce110_aux_registers aux_engine_regs[] = { aux_engine_regs(5) }; +#ifndef __NetBSD__ /* XXX amdgpu audio */ #define audio_regs(id)\ [id] = {\ AUD_COMMON_REG_LIST(id)\ @@ -312,6 +313,7 @@ static const struct dce_audio_shift audio_shift = { static const struct dce_audio_mask audio_mask = { AUD_COMMON_MASK_SH_LIST(_MASK) }; +#endif #define clk_src_regs(id)\ [id] = {\ @@ -449,8 +451,12 @@ static void read_dce_straps( static struct audio *create_audio( struct dc_context *ctx, unsigned int inst) { +#ifdef __NetBSD__ /* XXX amdgpu audio */ + return NULL; +#else return dce_audio_create(ctx, inst, &audio_regs[inst], &audio_shift, &audio_mask); +#endif } static struct timing_generator *dce100_timing_generator_create( @@ -610,6 +616,7 @@ static const struct encoder_feature_support link_enc_feature = { .flags.bits.IS_TPS3_CAPABLE = true }; +static struct link_encoder *dce100_link_encoder_create( const struct encoder_init_data *enc_init_data) { @@ -632,6 +639,7 @@ struct link_encoder *dce100_link_encoder_create( return &enc110->base; } +static struct output_pixel_processor *dce100_opp_create( struct dc_context *ctx, uint32_t inst) @@ -647,6 +655,7 @@ struct output_pixel_processor *dce100_opp_create( return &opp->base; } +static struct dce_aux *dce100_aux_engine_create( struct dc_context *ctx, uint32_t inst) @@ -685,6 +694,7 @@ static const struct dce_i2c_mask i2c_masks = { I2C_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(_MASK) }; +static struct dce_i2c_hw *dce100_i2c_hw_create( struct dc_context *ctx, uint32_t inst) @@ -700,6 +710,7 @@ struct dce_i2c_hw *dce100_i2c_hw_create( return dce_i2c_hw; } +static struct clock_source *dce100_clock_source_create( struct dc_context *ctx, struct dc_bios *bios, @@ -724,6 +735,7 @@ struct clock_source *dce100_clock_source_create( return NULL; } +static void dce100_clock_source_destroy(struct clock_source **clk_src) { kfree(TO_DCE110_CLK_SRC(*clk_src)); @@ -781,10 +793,12 @@ static void dce100_resource_destruct(struct dce110_resource_pool *pool) if (pool->base.dp_clock_source != NULL) dce100_clock_source_destroy(&pool->base.dp_clock_source); +#ifndef __NetBSD__ /* XXX amdgpu audio */ for (i = 0; i < pool->base.audio_count; i++) { if (pool->base.audios[i] != NULL) dce_aud_destroy(&pool->base.audios[i]); } +#endif if (pool->base.abm != NULL) dce_abm_destroy(&pool->base.abm); @@ -813,6 +827,7 @@ static enum dc_status build_mapped_resource( return DC_OK; } +static bool dce100_validate_bandwidth( struct dc *dc, struct dc_state *context, @@ -858,6 +873,7 @@ static bool dce100_validate_surface_sets( return true; } +static enum dc_status dce100_validate_global( struct dc *dc, struct dc_state *context) @@ -868,6 +884,7 @@ enum dc_status dce100_validate_global( return DC_OK; } +static enum dc_status dce100_add_stream_to_ctx( struct dc *dc, struct dc_state *new_ctx, @@ -895,6 +912,7 @@ static void dce100_destroy_resource_pool(struct resource_pool **pool) *pool = NULL; } +static enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps) { @@ -904,6 +922,7 @@ enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, s return DC_FAIL_SURFACE_VALIDATE; } +static struct stream_encoder *dce100_find_first_free_match_stream_enc_for_link( struct resource_context *res_ctx, const struct resource_pool *pool, @@ -1132,6 +1151,7 @@ res_create_fail: return false; } +static __unused struct resource_pool *dce100_create_resource_pool( uint8_t num_virtual_links, struct dc *dc) diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_compressor.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_compressor.c index 32b280e90e7..287b69220e2 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_compressor.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_compressor.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dce110_compressor.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dce110_compressor.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_compressor.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_compressor.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $"); #include <linux/delay.h> #include <linux/slab.h> @@ -417,6 +417,7 @@ void dce110_compressor_destroy(struct compressor **compressor) *compressor = NULL; } +static __unused bool dce110_get_required_compressed_surfacesize(struct fbc_input_info fbc_input_info, struct fbc_requested_compressed_size size) { @@ -461,6 +462,7 @@ void get_max_support_fbc_buffersize(unsigned int *max_x, unsigned int *max_y) } +static __unused unsigned int controller_id_to_index(enum controller_id controller_id) { unsigned int index = 0; diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_hw_sequencer.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_hw_sequencer.c index 62e672c8086..2ac455595f0 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_hw_sequencer.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_hw_sequencer.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dce110_hw_sequencer.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dce110_hw_sequencer.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_hw_sequencer.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_hw_sequencer.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $"); #include <linux/delay.h> @@ -689,11 +689,13 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx) tg->funcs->set_early_control(tg, early_control); +#ifndef __NetBSD__ /* XXX amdgpu audio */ /* enable audio only within mode set */ if (pipe_ctx->stream_res.audio != NULL) { if (dc_is_dp_signal(pipe_ctx->stream->signal)) pipe_ctx->stream_res.stream_enc->funcs->dp_audio_enable(pipe_ctx->stream_res.stream_enc); } +#endif @@ -948,6 +950,7 @@ void dce110_edp_backlight_control( void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx) { +#ifndef __NetBSD__ /* XXX amdgpu audio */ /* notify audio driver for audio modes of monitor */ struct dc *dc; struct clk_mgr *clk_mgr; @@ -981,10 +984,12 @@ void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx) if (pipe_ctx->stream_res.audio) pipe_ctx->stream_res.audio->enabled = true; } +#endif } void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx) { +#ifndef __NetBSD__ /* XXX amdgpu audio */ struct dc *dc; struct clk_mgr *clk_mgr; @@ -1019,6 +1024,7 @@ void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx) * stream->stream_engine_id); */ } +#endif } void dce110_disable_stream(struct pipe_ctx *pipe_ctx) @@ -1089,6 +1095,7 @@ void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable) pipe_ctx->stream_res.stream_enc->funcs->set_avmute(pipe_ctx->stream_res.stream_enc, enable); } +#ifndef __NetBSD__ /* XXX amdgpu audio */ static enum audio_dto_source translate_to_dto_source(enum controller_id crtc_id) { switch (crtc_id) { @@ -1190,6 +1197,7 @@ static void build_audio_output( audio_output->pll_info.ss_percentage = pipe_ctx->pll_settings.ss_percentage; } +#endif static void get_surface_visual_confirm_color(const struct pipe_ctx *pipe_ctx, struct tg_color *color) @@ -1337,6 +1345,7 @@ static enum dc_status apply_single_controller_ctx_to_hw( hws->funcs.disable_stream_gating(dc, pipe_ctx); } +#ifndef __NetBSD__ /* XXX amdgpu audio */ if (pipe_ctx->stream_res.audio != NULL) { struct audio_output audio_output; @@ -1360,6 +1369,7 @@ static enum dc_status apply_single_controller_ctx_to_hw( &audio_output.crtc_info, &pipe_ctx->stream->audio_info); } +#endif /* */ /* Do not touch stream timing on seamless boot optimization. */ @@ -1899,6 +1909,7 @@ static void dce110_reset_hw_ctx_wrap( if (!pipe_ctx->stream || !pipe_ctx->stream->dpms_off) { core_link_disable_stream(pipe_ctx_old); +#ifndef __NetBSD__ /* XXX amdgpu audio */ /* free acquired resources*/ if (pipe_ctx_old->stream_res.audio) { /*disable az_endpoint*/ @@ -1914,6 +1925,7 @@ static void dce110_reset_hw_ctx_wrap( pipe_ctx_old->stream_res.audio = NULL; } } +#endif } pipe_ctx_old->stream_res.tg->funcs->set_blank(pipe_ctx_old->stream_res.tg, true); @@ -1974,6 +1986,7 @@ static void dce110_setup_audio_dto( if (pipe_ctx->stream->signal != SIGNAL_TYPE_HDMI_TYPE_A) continue; +#ifndef __NetBSD__ /* XXX amdgpu audio */ if (pipe_ctx->stream_res.audio != NULL) { struct audio_output audio_output; @@ -1986,6 +1999,7 @@ static void dce110_setup_audio_dto( &audio_output.pll_info); break; } +#endif } /* no HDMI audio is found, try DP audio */ @@ -2002,6 +2016,7 @@ static void dce110_setup_audio_dto( if (!dc_is_dp_signal(pipe_ctx->stream->signal)) continue; +#ifndef __NetBSD__ /* XXX amdgpu audio */ if (pipe_ctx->stream_res.audio != NULL) { struct audio_output audio_output; @@ -2014,6 +2029,7 @@ static void dce110_setup_audio_dto( &audio_output.pll_info); break; } +#endif } } } @@ -2405,10 +2421,12 @@ static void init_hw(struct dc *dc) hwss_wait_for_blank_complete(tg); } +#ifndef __NetBSD__ /* XXX amdgpu audio */ for (i = 0; i < dc->res_pool->audio_count; i++) { struct audio *audio = dc->res_pool->audios[i]; audio->funcs->hw_init(audio); } +#endif abm = dc->res_pool->abm; if (abm != NULL) { @@ -2673,6 +2691,7 @@ static void program_output_csc(struct dc *dc, } } +static void dce110_set_cursor_position(struct pipe_ctx *pipe_ctx) { struct dc_cursor_position pos_cpy = pipe_ctx->stream->cursor_position; @@ -2701,6 +2720,7 @@ void dce110_set_cursor_position(struct pipe_ctx *pipe_ctx) mi->funcs->set_cursor_position(mi, &pos_cpy, ¶m); } +static void dce110_set_cursor_attribute(struct pipe_ctx *pipe_ctx) { struct dc_cursor_attributes *attributes = &pipe_ctx->stream->cursor_attributes; diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_mem_input_v.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_mem_input_v.c index e2d853e9174..ef0a6fca507 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_mem_input_v.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_mem_input_v.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dce110_mem_input_v.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dce110_mem_input_v.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2012-16 Advanced Micro Devices, Inc. @@ -25,7 +25,7 @@ * */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_mem_input_v.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_mem_input_v.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $"); #include "dm_services.h" @@ -39,6 +39,7 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_mem_input_v.c,v 1.2 2021/12/18 23:45:0 #include "inc/dce_calcs.h" #include "dce/dce_mem_input.h" +#include "dce110/dce110_mem_input_v.h" static void set_flip_control( struct dce_mem_input *mem_input110, @@ -473,6 +474,7 @@ static void program_pixel_format( } } +static bool dce_mem_input_v_is_surface_pending(struct mem_input *mem_input) { struct dce_mem_input *mem_input110 = TO_DCE_MEM_INPUT(mem_input); @@ -488,6 +490,7 @@ bool dce_mem_input_v_is_surface_pending(struct mem_input *mem_input) return false; } +static bool dce_mem_input_v_program_surface_flip_and_addr( struct mem_input *mem_input, const struct dc_plane_address *address, @@ -565,6 +568,7 @@ static const unsigned int *get_dvmm_hw_setting( } } +static void dce_mem_input_v_program_pte_vm( struct mem_input *mem_input, enum surface_pixel_format format, @@ -638,6 +642,7 @@ void dce_mem_input_v_program_pte_vm( dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C, value); } +static void dce_mem_input_v_program_surface_config( struct mem_input *mem_input, enum surface_pixel_format format, @@ -924,6 +929,7 @@ static void program_nbp_watermark_c( marks); } +static void dce_mem_input_v_program_display_marks( struct mem_input *mem_input, struct dce_watermarks nbp, @@ -947,6 +953,7 @@ void dce_mem_input_v_program_display_marks( } +static void dce_mem_input_program_chroma_display_marks( struct mem_input *mem_input, struct dce_watermarks nbp, @@ -968,6 +975,7 @@ void dce_mem_input_program_chroma_display_marks( stutter); } +static void dce110_allocate_mem_input_v( struct mem_input *mi, uint32_t h_total,/* for current stream */ @@ -1010,6 +1018,7 @@ void dce110_allocate_mem_input_v( } +static void dce110_free_mem_input_v( struct mem_input *mi, uint32_t total_stream_num) diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_timing_generator.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_timing_generator.c index b3117c10bca..2c9dcf6f76d 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_timing_generator.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/amdgpu_dce110_timing_generator.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dce110_timing_generator.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $ */ +/* $NetBSD: amdgpu_dce110_timing_generator.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_timing_generator.c,v 1.2 2021/12/18 23:45:02 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dce110_timing_generator.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $"); #include "dm_services.h" @@ -1356,7 +1356,7 @@ void dce110_timing_generator_tear_down_global_swap_lock( /* Restore DCP_GSL_PURPOSE_SURFACE_FLIP */ { - uint32_t value_crtc_vtotal; + uint32_t value_crtc_vtotal __unused; value_crtc_vtotal = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_V_TOTAL)); diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dm_pp_smu.h b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dm_pp_smu.h index 38a34d6bc15..570c2a0a568 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dm_pp_smu.h +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dm_pp_smu.h @@ -1,4 +1,4 @@ -/* $NetBSD: dm_pp_smu.h,v 1.2 2021/12/18 23:45:00 riastradh Exp $ */ +/* $NetBSD: dm_pp_smu.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $ */ /* * Copyright 2017 Advanced Micro Devices, Inc. @@ -32,8 +32,6 @@ * interface to PPLIB/SMU to setup clocks and pstate requirements on SoC */ -typedef bool BOOLEAN; - enum pp_smu_ver { /* * PP_SMU_INTERFACE_X should be interpreted as the interface defined @@ -242,7 +240,7 @@ struct pp_smu_funcs_nv { * DC hardware */ enum pp_smu_status (*set_pstate_handshake_support)(struct pp_smu *pp, - BOOLEAN pstate_handshake_supported); + bool pstate_handshake_supported); }; #define PP_SMU_NUM_SOCCLK_DPM_LEVELS 8 diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/amdgpu_dc_dsc.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/amdgpu_dc_dsc.c index a80a93c6033..86969ee98bf 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/amdgpu_dc_dsc.c +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/amdgpu_dc_dsc.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_dc_dsc.c,v 1.2 2021/12/18 23:45:04 riastradh Exp $ */ +/* $NetBSD: amdgpu_dc_dsc.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2019 Advanced Micro Devices, Inc. @@ -25,7 +25,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_dsc.c,v 1.2 2021/12/18 23:45:04 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_dc_dsc.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $"); #include "dc_hw_types.h" #include "dsc.h" @@ -311,6 +311,9 @@ static inline uint32_t dsc_div_by_10_round_up(uint32_t value) static inline uint32_t calc_dsc_bpp_x16(uint32_t stream_bandwidth_kbps, uint32_t pix_clk_100hz, uint32_t bpp_increment_div) { +#ifdef __NetBSD__ + panic("what is your float doing in my kernel"); +#else uint32_t dsc_target_bpp_x16; float f_dsc_target_bpp; float f_stream_bandwidth_100bps = stream_bandwidth_kbps * 10.0f; @@ -323,6 +326,7 @@ static inline uint32_t calc_dsc_bpp_x16(uint32_t stream_bandwidth_kbps, uint32_t dsc_target_bpp_x16 = (dsc_target_bpp_x16 * 16) / precision; return dsc_target_bpp_x16; +#endif } /* Get DSC bandwidth range based on [min_bpp, max_bpp] target bitrate range, and timing's pixel clock diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/link_hwss.h b/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/link_hwss.h index 3c6bb2bcb67..b3eab34f097 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/link_hwss.h +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/link_hwss.h @@ -1,4 +1,4 @@ -/* $NetBSD: link_hwss.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $ */ +/* $NetBSD: link_hwss.h,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -73,7 +73,7 @@ void dp_set_hw_lane_settings( void dp_set_hw_test_pattern( struct dc_link *link, enum dp_test_pattern test_pattern, - uint8_t *custom_pattern, + const uint8_t *custom_pattern, uint32_t custom_pattern_size); void dp_retrain_link_dp_test(struct dc_link *link, diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/dmub_rb.h b/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/dmub_rb.h index c3e7e9030ec..fdaa47b4365 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/dmub_rb.h +++ b/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/dmub_rb.h @@ -1,4 +1,4 @@ -/* $NetBSD: dmub_rb.h,v 1.2 2021/12/18 23:45:06 riastradh Exp $ */ +/* $NetBSD: dmub_rb.h,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2019 Advanced Micro Devices, Inc. @@ -128,7 +128,7 @@ static inline void dmub_rb_flush_pending(const struct dmub_rb *rb) while (rptr != wptr) { uint64_t volatile *data = (uint64_t volatile *)rb->base_address + rptr / sizeof(uint64_t); //uint64_t volatile *p = (uint64_t volatile *)data; - uint64_t temp; + uint64_t temp __unused; int i; for (i = 0; i < DMUB_RB_CMD_SIZE / sizeof(uint64_t); i++) diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/include/fixed31_32.h b/sys/external/bsd/drm2/dist/drm/amd/display/include/fixed31_32.h index e2cb1a1ed89..4caa851aa7c 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/display/include/fixed31_32.h +++ b/sys/external/bsd/drm2/dist/drm/amd/display/include/fixed31_32.h @@ -1,4 +1,4 @@ -/* $NetBSD: fixed31_32.h,v 1.2 2021/12/18 23:45:07 riastradh Exp $ */ +/* $NetBSD: fixed31_32.h,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2012-15 Advanced Micro Devices, Inc. @@ -28,6 +28,8 @@ #ifndef __DAL_FIXED31_32_H__ #define __DAL_FIXED31_32_H__ +#include "os_types.h" + #ifndef LLONG_MAX #define LLONG_MAX 9223372036854775807ll #endif @@ -530,7 +532,7 @@ static inline struct fixed31_32 dc_fixpt_truncate(struct fixed31_32 arg, unsigne if (negative) arg.value = -arg.value; - arg.value &= (~0LL) << (FIXED31_32_BITS_PER_FRACTIONAL_PART - frac_bits); + arg.value &= (~0ULL) << (FIXED31_32_BITS_PER_FRACTIONAL_PART - frac_bits); if (negative) arg.value = -arg.value; return arg; diff --git a/sys/external/bsd/drm2/dist/drm/amd/include/amd_shared.h b/sys/external/bsd/drm2/dist/drm/amd/include/amd_shared.h index 712f79a6ce2..83b5115eb21 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/include/amd_shared.h +++ b/sys/external/bsd/drm2/dist/drm/amd/include/amd_shared.h @@ -1,4 +1,4 @@ -/* $NetBSD: amd_shared.h,v 1.3 2021/12/18 23:45:08 riastradh Exp $ */ +/* $NetBSD: amd_shared.h,v 1.4 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -158,7 +158,7 @@ enum amd_dpm_forced_level; */ struct amd_ip_funcs { /** @name: Name of IP block */ - char *name; + const char *name; /** * @early_init: * diff --git a/sys/external/bsd/drm2/dist/drm/amd/include/kgd_kfd_interface.h b/sys/external/bsd/drm2/dist/drm/amd/include/kgd_kfd_interface.h index 0da31fbd196..41b85733dc8 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/include/kgd_kfd_interface.h +++ b/sys/external/bsd/drm2/dist/drm/amd/include/kgd_kfd_interface.h @@ -1,4 +1,4 @@ -/* $NetBSD: kgd_kfd_interface.h,v 1.3 2021/12/18 23:45:08 riastradh Exp $ */ +/* $NetBSD: kgd_kfd_interface.h,v 1.4 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2014 Advanced Micro Devices, Inc. @@ -253,17 +253,21 @@ struct kfd2kgd_calls { int (*init_interrupts)(struct kgd_dev *kgd, uint32_t pipe_id); +#ifndef __NetBSD__ int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, uint32_t queue_id, uint32_t __user *wptr, uint32_t wptr_shift, uint32_t wptr_mask, struct mm_struct *mm); +#endif int (*hiq_mqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, uint32_t queue_id, uint32_t doorbell_off); +#ifndef __NetBSD__ int (*hqd_sdma_load)(struct kgd_dev *kgd, void *mqd, uint32_t __user *wptr, struct mm_struct *mm); +#endif int (*hqd_dump)(struct kgd_dev *kgd, uint32_t pipe_id, uint32_t queue_id, diff --git a/sys/external/bsd/drm2/dist/drm/amd/include/navi10_enum.h b/sys/external/bsd/drm2/dist/drm/amd/include/navi10_enum.h index 7022043dbaa..283e6d9e946 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/include/navi10_enum.h +++ b/sys/external/bsd/drm2/dist/drm/amd/include/navi10_enum.h @@ -1,4 +1,4 @@ -/* $NetBSD: navi10_enum.h,v 1.2 2021/12/18 23:45:08 riastradh Exp $ */ +/* $NetBSD: navi10_enum.h,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright (C) 2019 Advanced Micro Devices, Inc. @@ -19623,7 +19623,9 @@ typedef enum CovToShaderSel { INPUT_COVERAGE = 0x00000000, INPUT_INNER_COVERAGE = 0x00000001, INPUT_DEPTH_COVERAGE = 0x00000002, +#ifndef __NetBSD__ /* XXX &@!#!^ */ RAW = 0x00000003, +#endif } CovToShaderSel; /* diff --git a/sys/external/bsd/drm2/dist/drm/amd/include/vega10_enum.h b/sys/external/bsd/drm2/dist/drm/amd/include/vega10_enum.h index 721dd06da33..2cb22d2880d 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/include/vega10_enum.h +++ b/sys/external/bsd/drm2/dist/drm/amd/include/vega10_enum.h @@ -1,4 +1,4 @@ -/* $NetBSD: vega10_enum.h,v 1.2 2021/12/18 23:45:08 riastradh Exp $ */ +/* $NetBSD: vega10_enum.h,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright (C) 2017 Advanced Micro Devices, Inc. @@ -21407,7 +21407,9 @@ typedef enum CovToShaderSel { INPUT_COVERAGE = 0x00000000, INPUT_INNER_COVERAGE = 0x00000001, INPUT_DEPTH_COVERAGE = 0x00000002, +#ifndef __NetBSD__ /* XXX @!#&* */ RAW = 0x00000003, +#endif } CovToShaderSel; /******************************************************* diff --git a/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_amd_powerplay.c b/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_amd_powerplay.c index 04da676a549..e55e05db059 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_amd_powerplay.c +++ b/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_amd_powerplay.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_amd_powerplay.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ +/* $NetBSD: amdgpu_amd_powerplay.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -23,7 +23,7 @@ * */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_amd_powerplay.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_amd_powerplay.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $"); #include "pp_debug.h" #include <linux/types.h> @@ -37,6 +37,7 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_amd_powerplay.c,v 1.2 2021/12/18 23:45:26 ria #include "amdgpu.h" #include "hwmgr.h" +#include <linux/nbsd-namespace.h> static const struct amd_pm_funcs pp_dpm_funcs; @@ -655,7 +656,7 @@ static int pp_dpm_get_pp_table(void *handle, char **table) return -EINVAL; mutex_lock(&hwmgr->smu_lock); - *table = (char *)hwmgr->soft_pp_table; + *table = __UNCONST(hwmgr->soft_pp_table); size = hwmgr->soft_pp_table_size; mutex_unlock(&hwmgr->smu_lock); return size; diff --git a/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_arcturus_ppt.c b/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_arcturus_ppt.c index e0a1d4c9723..0e5f67c1fa0 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_arcturus_ppt.c +++ b/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_arcturus_ppt.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_arcturus_ppt.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ +/* $NetBSD: amdgpu_arcturus_ppt.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2019 Advanced Micro Devices, Inc. @@ -24,7 +24,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_arcturus_ppt.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_arcturus_ppt.c,v 1.3 2021/12/19 10:59:02 riastradh Exp $"); #include "pp_debug.h" #include <linux/firmware.h> @@ -592,6 +592,7 @@ static int arcturus_populate_umd_state_clk(struct smu_context *smu) return 0; } +#ifdef CONFIG_SYSFS static int arcturus_get_clk_table(struct smu_context *smu, struct pp_clock_levels_with_latency *clocks, struct arcturus_single_dpm_table *dpm_table) @@ -615,10 +616,14 @@ static int arcturus_freqs_in_same_level(int32_t frequency1, { return (abs(frequency1 - frequency2) <= EPSILON); } +#endif static int arcturus_print_clk_levels(struct smu_context *smu, enum smu_clk_type type, char *buf) { +#ifndef CONFIG_SYSFS + return 0; +#else int i, now, size = 0; int ret = 0; struct pp_clock_levels_with_latency clocks; @@ -730,6 +735,7 @@ static int arcturus_print_clk_levels(struct smu_context *smu, } return size; +#endif } static int arcturus_upload_dpm_level(struct smu_context *smu, bool max, @@ -1323,6 +1329,9 @@ static int arcturus_get_power_limit(struct smu_context *smu, static int arcturus_get_power_profile_mode(struct smu_context *smu, char *buf) { +#ifndef CONFIG_SYSFS + return 0; +#else struct amdgpu_device *adev = smu->adev; DpmActivityMonitorCoeffInt_t activity_monitor; static const char *profile_name[] = { @@ -1421,6 +1430,7 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu, } return size; +#endif } static int arcturus_set_power_profile_mode(struct smu_context *smu, @@ -1950,6 +1960,8 @@ static bool arcturus_is_dpm_running(struct smu_context *smu) uint32_t feature_mask[2]; unsigned long feature_enabled; ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); + if (ret) + return false; feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | ((uint64_t)feature_mask[1] << 32)); return !!(feature_enabled & SMC_DPM_FEATURE); @@ -2190,7 +2202,9 @@ static int arcturus_i2c_eeprom_control_init(struct i2c_adapter *control) control->owner = THIS_MODULE; control->class = I2C_CLASS_SPD; +#ifndef __NetBSD__ control->dev.parent = &adev->pdev->dev; +#endif control->algo = &arcturus_i2c_eeprom_i2c_algo; snprintf(control->name, sizeof(control->name), "RAS EEPROM"); diff --git a/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/hwmgr.h b/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/hwmgr.h index 2268f3b54cf..ea127ba4560 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/hwmgr.h +++ b/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/hwmgr.h @@ -1,4 +1,4 @@ -/* $NetBSD: hwmgr.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ +/* $NetBSD: hwmgr.h,v 1.3 2021/12/19 10:59:02 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -200,7 +200,7 @@ enum SMU_ASIC_RESET_MODE }; struct pp_smumgr_func { - char *name; + const char *name; int (*smu_init)(struct pp_hwmgr *hwmgr); int (*smu_fini)(struct pp_hwmgr *hwmgr); int (*start_smu)(struct pp_hwmgr *hwmgr); diff --git a/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/amdgpu_ci_smumgr.c b/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/amdgpu_ci_smumgr.c index 3c2df445502..b6ea4b70203 100644 --- a/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/amdgpu_ci_smumgr.c +++ b/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/amdgpu_ci_smumgr.c @@ -1,4 +1,4 @@ -/* $NetBSD: amdgpu_ci_smumgr.c,v 1.2 2021/12/18 23:45:27 riastradh Exp $ */ +/* $NetBSD: amdgpu_ci_smumgr.c,v 1.3 2021/12/19 10:59:03 riastradh Exp $ */ /* * Copyright 2017 Advanced Micro Devices, Inc. @@ -23,7 +23,7 @@ * */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: amdgpu_ci_smumgr.c,v 1.2 2021/12/18 23:45:27 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdgpu_ci_smumgr.c,v 1.3 2021/12/19 10:59:03 riastradh Exp $"); #include <linux/module.h> #include <linux/slab.h> @@ -188,6 +188,7 @@ static int ci_program_jump_on_start(struct pp_hwmgr *hwmgr) return 0; } +static bool ci_is_smc_ram_running(struct pp_hwmgr *hwmgr) { return ((0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, @@ -2133,7 +2134,7 @@ static int ci_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) uint32_t t_diff1, t_diff2, pwm_diff1, pwm_diff2; uint16_t fdo_min, slope1, slope2; uint32_t reference_clock; - int res; + int res __unused; uint64_t tmp64; if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl)) diff --git a/sys/external/bsd/drm2/dist/include/drm/gpu_scheduler.h b/sys/external/bsd/drm2/dist/include/drm/gpu_scheduler.h index c450014a50b..44f9e9fdc83 100644 --- a/sys/external/bsd/drm2/dist/include/drm/gpu_scheduler.h +++ b/sys/external/bsd/drm2/dist/include/drm/gpu_scheduler.h @@ -1,4 +1,4 @@ -/* $NetBSD: gpu_scheduler.h,v 1.2 2021/12/18 23:45:46 riastradh Exp $ */ +/* $NetBSD: gpu_scheduler.h,v 1.3 2021/12/19 10:59:03 riastradh Exp $ */ /* * Copyright 2015 Advanced Micro Devices, Inc. @@ -27,8 +27,10 @@ #define _DRM_GPU_SCHEDULER_H_ #include <drm/spsc_queue.h> +#include <drm/drm_wait_netbsd.h> #include <linux/dma-fence.h> #include <linux/completion.h> +#include <linux/workqueue.h> #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) @@ -276,8 +278,13 @@ struct drm_gpu_scheduler { long timeout; const char *name; struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX]; +#ifdef __NetBSD__ + drm_waitqueue_t wake_up_worker; + drm_waitqueue_t job_scheduled; +#else wait_queue_head_t wake_up_worker; wait_queue_head_t job_scheduled; +#endif atomic_t hw_rq_count; atomic64_t job_id_count; struct delayed_work work_tdr; |
