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authorrin <rin@NetBSD.org>2022-05-30 14:09:01 +0000
committerrin <rin@NetBSD.org>2022-05-30 14:09:01 +0000
commit193397ea5d2d760558427c93023d2db0ded5218a (patch)
tree9880a828dca14418966668d2369b891688f1efae /sys
parentb09fa5ff99d9d0e576f6bfc1187b231d472be2b6 (diff)
For IBM_PPC403, emulate unaligned memory access for userland process.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/evbppc/conf/std.explora5
-rw-r--r--sys/arch/powerpc/ibm4xx/trap.c37
2 files changed, 21 insertions, 21 deletions
diff --git a/sys/arch/evbppc/conf/std.explora b/sys/arch/evbppc/conf/std.explora
index 47888df1578..811fad15f37 100644
--- a/sys/arch/evbppc/conf/std.explora
+++ b/sys/arch/evbppc/conf/std.explora
@@ -1,4 +1,4 @@
-# $NetBSD: std.explora,v 1.9 2021/06/26 09:03:46 rin Exp $
+# $NetBSD: std.explora,v 1.10 2022/05/30 14:09:01 rin Exp $
#
# Standard/required options for NetBSD/explora.
@@ -9,6 +9,9 @@ include "conf/std" # MI standard options
options PPC_IBM4XX # IBM 40x family
options PPC_IBM403 # IBM 403GCX
+# 403 does not support unaligned memory access.
+options PPC_NO_UNALIGNED
+
options VMSWAP_DEFAULT_PLAINTEXT # do not encrypt swap by
# default (slow cpu)
diff --git a/sys/arch/powerpc/ibm4xx/trap.c b/sys/arch/powerpc/ibm4xx/trap.c
index 49d2f7a71cc..790bd836a67 100644
--- a/sys/arch/powerpc/ibm4xx/trap.c
+++ b/sys/arch/powerpc/ibm4xx/trap.c
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.86 2021/03/06 08:08:19 rin Exp $ */
+/* $NetBSD: trap.c,v 1.87 2022/05/30 14:09:01 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -69,12 +69,13 @@
#define __UFETCHSTORE_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.86 2021/03/06 08:08:19 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.87 2022/05/30 14:09:01 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_ppcarch.h"
+#include "opt_ppcopts.h"
#endif
#include <sys/param.h>
@@ -116,8 +117,6 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.86 2021/03/06 08:08:19 rin Exp $");
#define NARGREG 8 /* 8 args are in registers */
#define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */
-static int fix_unaligned(struct lwp *l, struct trapframe *tf);
-
void trap(struct trapframe *); /* Called from locore / trap_subr */
#if 0
/* Not currently used nor exposed externally in any header file */
@@ -126,6 +125,10 @@ int badaddr_read(void *, size_t, int *);
#endif
int ctx_setup(int, int);
+#ifndef PPC_NO_UNALIGNED
+static bool fix_unaligned(struct trapframe *, ksiginfo_t *);
+#endif
+
#ifdef DEBUG
#define TDB_ALL 0x1
int trapdebug = /* TDB_ALL */ 0;
@@ -290,14 +293,8 @@ isi:
break;
case EXC_ALI|EXC_USER:
- if (fix_unaligned(l, tf) != 0) {
- KSI_INIT_TRAP(&ksi);
- ksi.ksi_signo = SIGBUS;
- ksi.ksi_trap = EXC_ALI;
- ksi.ksi_addr = (void *)tf->tf_dear;
+ if (fix_unaligned(tf, &ksi))
trapsignal(l, &ksi);
- } else
- tf->tf_srr0 += 4;
break;
case EXC_PGM|EXC_USER:
@@ -726,18 +723,18 @@ badaddr_read(void *addr, size_t size, int *rptr)
}
#endif
-/*
- * For now, this only deals with the particular unaligned access case
- * that gcc tends to generate. Eventually it should handle all of the
- * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
- */
-
-static int
-fix_unaligned(struct lwp *l, struct trapframe *tf)
+#ifndef PPC_NO_UNALIGNED
+static bool
+fix_unaligned(struct trapframe *tf, ksiginfo_t *ksi)
{
- return -1;
+ KSI_INIT_TRAP(ksi);
+ ksi->ksi_signo = SIGBUS;
+ ksi->ksi_trap = EXC_ALI;
+ ksi->ksi_addr = (void *)tf->tf_dear;
+ return true;
}
+#endif
/*
* XXX Extremely lame implementations of _ufetch_* / _ustore_*. IBM 4xx