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authoris <is@NetBSD.org>2000-01-03 21:52:14 +0000
committeris <is@NetBSD.org>2000-01-03 21:52:14 +0000
commit2e3d1cc0480c8cdfe80880b5245edd101d60a082 (patch)
treed3880ed67898e3c372791c4f3947d1a25800da95 /sys
parentd14968078ac742a56125100a58245fbe6f755a9f (diff)
The Ricoh chip has a seperate leapyear counter.
We must write this when we write the year register, keeping them in sync. XXX the chosen algorithm only works for 1901 <= year <= 2099.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/amiga/dev/a34kbbc.c7
-rw-r--r--sys/arch/amiga/dev/rtc.h5
2 files changed, 8 insertions, 4 deletions
diff --git a/sys/arch/amiga/dev/a34kbbc.c b/sys/arch/amiga/dev/a34kbbc.c
index 050cef7c22a..12866f1e9f5 100644
--- a/sys/arch/amiga/dev/a34kbbc.c
+++ b/sys/arch/amiga/dev/a34kbbc.c
@@ -1,4 +1,4 @@
-/* $NetBSD: a34kbbc.c,v 1.5 2000/01/03 20:30:51 is Exp $ */
+/* $NetBSD: a34kbbc.c,v 1.6 2000/01/03 21:52:14 is Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -130,7 +130,6 @@ a34kugettod(tvp)
/* let it run again.. */
rt->control1 = A3CONTROL1_FREE_CLOCK;
- printf("year read: %d.\n", dt.dt_year);
if (dt.dt_year < STARTOFTIME)
dt.dt_year += 100;
@@ -182,7 +181,9 @@ a34kusettod(tvp)
rt->month2 = dt.dt_mon % 10;
rt->year1 = (dt.dt_year / 10) % 10;
rt->year2 = dt.dt_year % 10;
- rt->control1 = A3CONTROL1_FREE_CLOCK;
+ rt->control1 = A3CONTROL1_HOLD_CLOCK | 1; /* mode 1 registers */
+ rt->leapyear = dt.dt_year; /* XXX implicit % 4 */
+ rt->control1 = A3CONTROL1_FREE_CLOCK; /* implies mode 0 */
return (1);
}
diff --git a/sys/arch/amiga/dev/rtc.h b/sys/arch/amiga/dev/rtc.h
index e59e82d4ebc..8f40a6677b0 100644
--- a/sys/arch/amiga/dev/rtc.h
+++ b/sys/arch/amiga/dev/rtc.h
@@ -1,4 +1,4 @@
-/* $NetBSD: rtc.h,v 1.6 1999/03/14 22:42:12 is Exp $ */
+/* $NetBSD: rtc.h,v 1.7 2000/01/03 21:52:15 is Exp $ */
/*
* Copyright (c) 1994 Christian E. Hopps
@@ -92,6 +92,9 @@ struct rtclock3000 {
#define A3CONTROL1_HOLD_CLOCK 0
#define A3CONTROL1_FREE_CLOCK 9
+/* mode1 registers used by us */
+#define leapyear year2
+
#define A3BBC_SET_REG 0xe0
#define A3BBC_WRITE_REG 0xc2
#define A3BBC_READ_REG 0xc3