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authornisimura <nisimura@NetBSD.org>1999-12-03 02:15:55 +0000
committernisimura <nisimura@NetBSD.org>1999-12-03 02:15:55 +0000
commit31f8115d2002a66c2ab9afdae09d7aaa5512efe6 (patch)
tree2f0a05d4612bb29e9d5d994f4e17378079a0027a /sys
parent535e7106d2d2bf7810848f61392738877ad23b06 (diff)
Add _splrestore() to manipulate processor interrupt control bits.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/mips/mips/locore.S14
1 files changed, 13 insertions, 1 deletions
diff --git a/sys/arch/mips/mips/locore.S b/sys/arch/mips/mips/locore.S
index b8e1ed4bd03..17f8a237af5 100644
--- a/sys/arch/mips/mips/locore.S
+++ b/sys/arch/mips/mips/locore.S
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.80 1999/11/29 11:12:13 uch Exp $ */
+/* $NetBSD: locore.S,v 1.81 1999/12/03 02:15:55 nisimura Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -507,6 +507,18 @@ LEAF(_spllower)
and v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
END(_spllower)
+LEAF(_splrestore)
+ mfc0 v0, MIPS_COP_0_STATUS # fetch status register
+ and a0, a0, MIPS_INT_MASK
+ li v1, ~MIPS_INT_MASK
+ and v1, v1, v0 # turn off every INT bit
+ or v1, v1, a0 # set old INT bits
+ mtc0 v1, MIPS_COP_0_STATUS # store back
+ nop
+ j ra
+ and v0, v0, MIPS_INT_MASK
+END(_splrestore)
+
LEAF(_splset)
mfc0 v0, MIPS_COP_0_STATUS # fetch status register
and a0, a0, (MIPS_INT_MASK | MIPS_SR_INT_IE)