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authorrin <rin@NetBSD.org>2022-10-15 04:47:37 +0000
committerrin <rin@NetBSD.org>2022-10-15 04:47:37 +0000
commit55bd2edf31eeb91543adfb98d9db5e5775bee93f (patch)
tree45efd16660f44e309389d0cb1098aeadc1f164b0 /sys
parenta48e4a98ffaa29f9bcbc0df8a67930425e3594e8 (diff)
DHT Walnut: Fix failure to attach on-board pdcide(4) for cold boot.
U-Boot seems to initialize pdcide(4) to compatible mode. Therefore, we need to reinitialize it to native-PCI mode in pci_conf_hook(). Otherwise, we will fail to configure IO registers for native-PCI mode during PCI_NETBSD_CONFIGURE.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/evbppc/conf/DHT5
-rw-r--r--sys/arch/powerpc/ibm4xx/pci/pci_machdep.c28
2 files changed, 29 insertions, 4 deletions
diff --git a/sys/arch/evbppc/conf/DHT b/sys/arch/evbppc/conf/DHT
index f047b08ecfd..147dd354105 100644
--- a/sys/arch/evbppc/conf/DHT
+++ b/sys/arch/evbppc/conf/DHT
@@ -1,4 +1,4 @@
-# $NetBSD: DHT,v 1.3 2022/08/07 02:52:25 simonb Exp $
+# $NetBSD: DHT,v 1.4 2022/10/15 04:47:37 rin Exp $
#
# DHT --- DHT Walnut 405GP Evaluation Board
# (Digital Home Technologies PCB 01070201 Rev. 1.1)
@@ -8,7 +8,7 @@ include "arch/evbppc/conf/std.dht"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "DHT-$Revision: 1.3 $"
+#ident "DHT-$Revision: 1.4 $"
maxusers 32
@@ -160,6 +160,7 @@ options PCI_NETBSD_CONFIGURE # Do not rely on BIOS/whatever
#options PCI_CONFIGURE_VERBOSE # Show PCI config information
pdcide* at pci? dev ? function ? # Promise IDE controllers
+options DHT_FIXUP_PDCIDE # Initialize pdcide to native-PCI mode
# ATA (IDE) bus support
atabus* at ata?
diff --git a/sys/arch/powerpc/ibm4xx/pci/pci_machdep.c b/sys/arch/powerpc/ibm4xx/pci/pci_machdep.c
index 3463687873b..34b608fe5c7 100644
--- a/sys/arch/powerpc/ibm4xx/pci/pci_machdep.c
+++ b/sys/arch/powerpc/ibm4xx/pci/pci_machdep.c
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.12 2020/07/06 10:49:41 rin Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.13 2022/10/15 04:47:37 rin Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.12 2020/07/06 10:49:41 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.13 2022/10/15 04:47:37 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -70,6 +70,10 @@ __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.12 2020/07/06 10:49:41 rin Exp $")
#include <powerpc/ibm4xx/pci_machdep.h>
#include <powerpc/ibm4xx/dev/pcicreg.h>
+#ifdef DHT_FIXUP_PDCIDE
+#include <dev/pci/pciidereg.h>
+#endif
+
static struct powerpc_bus_space pci_iot = {
_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
0x00000000,
@@ -182,5 +186,25 @@ ibm4xx_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
/* Don't configure the bridge and PCI probe. */
return 0;
}
+
+#ifdef DHT_FIXUP_PDCIDE
+ /*
+ * Initialize PDC20265 to native-PCI mode. This should be done
+ * *before* pci_do_device_query(). Otherwise, we will fail to
+ * configure native-PCI IO registers.
+ */
+ if (PCI_VENDOR(id) == PCI_VENDOR_PROMISE &&
+ PCI_PRODUCT(id) == PCI_PRODUCT_PROMISE_PDC20265) {
+ pcitag_t tag;
+ pcireg_t csr;
+
+ tag = ibm4xx_pci_make_tag(v, bus, dev, func);
+ csr = ibm4xx_pci_conf_read(v, tag, PCI_CLASS_REG);
+ csr |= (PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1))
+ << PCI_INTERFACE_SHIFT;
+ ibm4xx_pci_conf_write(v, tag, PCI_CLASS_REG, csr);
+ }
+#endif
+
return PCI_CONF_DEFAULT;
}