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authorbjh21 <bjh21@NetBSD.org>2001-06-12 20:16:22 +0000
committerbjh21 <bjh21@NetBSD.org>2001-06-12 20:16:22 +0000
commitca5de264b47ba7415cf38ec03528e032ec017bcf (patch)
treefa625878caefdceb8f184c4903bd50f5efe1e298 /sys
parent2b283d77dfd838464a4f9ed671bd77f2b7b92d79 (diff)
Change the structure of a bus_space_handle_t in a desperate bid to avoid using
function pointers. It now contains two base addresses, one for 8-bit transfers and one for 16-bit transfers. This should make it possible for me to handle the Castle EtherSCSI card, which uses and address line to select transfer width to the i82595.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/arm26/arm26/bus.c9
-rw-r--r--sys/arch/arm26/arm26/db_machdep.c11
-rw-r--r--sys/arch/arm26/include/bus.h21
-rw-r--r--sys/arch/arm26/podulebus/podulebus.c20
4 files changed, 36 insertions, 25 deletions
diff --git a/sys/arch/arm26/arm26/bus.c b/sys/arch/arm26/arm26/bus.c
index 31bc6eae793..72301cd496b 100644
--- a/sys/arch/arm26/arm26/bus.c
+++ b/sys/arch/arm26/arm26/bus.c
@@ -1,4 +1,4 @@
-/* $NetBSD: bus.c,v 1.7 2001/06/02 21:31:02 bjh21 Exp $ */
+/* $NetBSD: bus.c,v 1.8 2001/06/12 20:16:22 bjh21 Exp $ */
/*-
* Copyright (c) 1999, 2000 Ben Harris
* All rights reserved.
@@ -32,7 +32,7 @@
#include <sys/param.h>
-__RCSID("$NetBSD: bus.c,v 1.7 2001/06/02 21:31:02 bjh21 Exp $");
+__RCSID("$NetBSD: bus.c,v 1.8 2001/06/12 20:16:22 bjh21 Exp $");
#include <machine/bus.h>
#include <machine/memcreg.h>
@@ -46,7 +46,7 @@ bus_space_map(bus_space_tag_t bst, bus_addr_t addr, bus_size_t size,
if (flags & BUS_SPACE_MAP_LINEAR)
return -1;
- *bshp = (bus_space_handle_t)(addr);
+ bshp->a1 = bshp->a2 = addr;
return 0;
}
@@ -56,7 +56,8 @@ bus_space_subregion(bus_space_tag_t bst, bus_space_handle_t bsh,
bus_space_handle_t *nbshp)
{
- *nbshp = bsh + (offset << bst);
+ nbshp->a1 = bsh.a1 + (offset << bst);
+ nbshp->a2 = bsh.a2 + (offset << bst);
return 0;
}
diff --git a/sys/arch/arm26/arm26/db_machdep.c b/sys/arch/arm26/arm26/db_machdep.c
index 182859c0e96..1bca01732f1 100644
--- a/sys/arch/arm26/arm26/db_machdep.c
+++ b/sys/arch/arm26/arm26/db_machdep.c
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.5 2001/02/17 19:08:21 bjh21 Exp $ */
+/* $NetBSD: db_machdep.c,v 1.6 2001/06/12 20:16:22 bjh21 Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@@ -95,23 +95,28 @@ db_bus_write_cmd(addr, have_addr, count, modif)
char *modif;
{
db_expr_t datum;
+ bus_space_tag_t iot = 2; /* XXX */
+ bus_space_handle_t ioh;
if (!have_addr)
db_error("target address must be specified");
+ bus_space_map(iot, addr, 1, 0, &ioh);
+
while (db_expression(&datum)) {
switch (*modif) {
case 'b':
- bus_space_write_1(2, addr, 0, datum);
+ bus_space_write_1(2, ioh, 0, datum);
break;
case '\0':
case 'h':
- bus_space_write_2(2, addr, 0, datum);
+ bus_space_write_2(2, ioh, 0, datum);
break;
default:
db_error("bad modifier");
}
}
+ bus_space_unmap(iot, ioh, 1);
db_skip_to_eol();
}
diff --git a/sys/arch/arm26/include/bus.h b/sys/arch/arm26/include/bus.h
index bd26aee84a0..750dc74de3e 100644
--- a/sys/arch/arm26/include/bus.h
+++ b/sys/arch/arm26/include/bus.h
@@ -1,4 +1,4 @@
-/* $NetBSD: bus.h,v 1.4 2001/06/02 21:31:02 bjh21 Exp $ */
+/* $NetBSD: bus.h,v 1.5 2001/06/12 20:16:23 bjh21 Exp $ */
/*-
* Copyright (c) 2000 Ben Harris
@@ -50,7 +50,10 @@ typedef u_int bus_size_t;
/* Access methods for bus space. */
typedef int bus_space_tag_t;
-typedef bus_addr_t bus_space_handle_t;
+typedef struct bus_space_handle {
+ bus_addr_t a1; /* Address for 8-bit operations */
+ bus_addr_t a2; /* Address for 16-bit operations */
+} bus_space_handle_t;
/* Mapping and unmapping operations. */
#define BUS_SPACE_MAP_CACHEABLE 0x01
@@ -76,25 +79,27 @@ extern int bus_space_shift(bus_space_tag_t, bus_space_handle_t, int,
#define bus_space_barrier(t, h, o, l, f) /* Do nothing */
/* Bus read (single) operations. */
-#define bus_space_read_1(t, h, o) (*(volatile u_int8_t *)((h) + ((o) << (t))))
-#define bus_space_read_2(t, h, o) (*(volatile u_int16_t *)((h) + ((o) << (t))))
+#define bus_space_read_1(t, h, o) \
+ (*(volatile u_int8_t *)((h.a1) + ((o) << (t))))
+#define bus_space_read_2(t, h, o) \
+ (*(volatile u_int16_t *)((h.a2) + ((o) << (t))))
/* Bus write (single) operations. */
#define bus_space_write_1(t, h, o, v) \
- (*(volatile u_int8_t *)((h) + ((o) << (t))) = (v))
+ (*(volatile u_int8_t *)((h.a1) + ((o) << (t))) = (v))
#define bus_space_write_2(t, h, o, v) \
- (*(volatile u_int32_t *)((h) + ((o) << (t))) = (v) | ((v) << 16))
+ (*(volatile u_int32_t *)((h.a2) + ((o) << (t))) = (v) | ((v) << 16))
/* Bus read multiple operations. */
#define bus_space_read_multi_1(t, h, o, d, c) \
- (read_multi_1((h) + ((o) << (t)), (d), (c)))
+ (read_multi_1((h.a1) + ((o) << (t)), (d), (c)))
extern void bus_space_read_multi_2(bus_space_tag_t, bus_space_handle_t,
bus_size_t, u_int16_t *, bus_size_t);
#define bus_space_read_multi_4(t, h, o, d, s) panic("bus_space_read_multi_4")
/* Bus write multiple operations. */
#define bus_space_write_multi_1(t, h, o, d, c) \
- (write_multi_1((h) + ((o) << (t)), (d), (c)))
+ (write_multi_1((h.a1) + ((o) << (t)), (d), (c)))
extern void bus_space_write_multi_2(bus_space_tag_t, bus_space_handle_t,
bus_size_t, u_int16_t const *, bus_size_t);
#define bus_space_write_multi_4(t, h, o, d, s) panic("bus_space_write_multi_4")
diff --git a/sys/arch/arm26/podulebus/podulebus.c b/sys/arch/arm26/podulebus/podulebus.c
index 9ca2843ec99..9bae5e0b356 100644
--- a/sys/arch/arm26/podulebus/podulebus.c
+++ b/sys/arch/arm26/podulebus/podulebus.c
@@ -1,4 +1,4 @@
-/* $NetBSD: podulebus.c,v 1.12 2001/04/19 13:47:07 bjh21 Exp $ */
+/* $NetBSD: podulebus.c,v 1.13 2001/06/12 20:16:24 bjh21 Exp $ */
/*-
* Copyright (c) 2000 Ben Harris
@@ -30,7 +30,7 @@
#include <sys/param.h>
-__RCSID("$NetBSD: podulebus.c,v 1.12 2001/04/19 13:47:07 bjh21 Exp $");
+__RCSID("$NetBSD: podulebus.c,v 1.13 2001/06/12 20:16:24 bjh21 Exp $");
#include <sys/device.h>
#include <sys/malloc.h>
@@ -139,17 +139,17 @@ podulebus_probe_podule(struct device *self, int slotnum)
&pa.pa_sync_h);
/* XXX This is a hack! */
pa.pa_mod_t = 2;
- bus_space_subregion(pa.pa_mod_t,
- (bus_space_handle_t)MEMC_IO_BASE, slotnum * PODULE_GAP,
- PODULE_GAP, &pa.pa_mod_h);
+ bus_space_map(pa.pa_mod_t,
+ (bus_addr_t)MEMC_IO_BASE + slotnum * (PODULE_GAP << 2),
+ (PODULE_GAP << 2), 0, &pa.pa_mod_h);
bus_space_read_region_1(id_bst, id_bsh, 0,
extecid, EXTECID_SIZE);
/* XXX If you thought that was a hack... */
- pa.pa_mod_base = pa.pa_mod_h;
- pa.pa_fast_base = pa.pa_fast_h;
- pa.pa_medium_base = pa.pa_medium_h;
- pa.pa_slow_base = pa.pa_slow_h;
- pa.pa_sync_base = pa.pa_sync_h;
+ pa.pa_mod_base = pa.pa_mod_h.a1;
+ pa.pa_fast_base = pa.pa_fast_h.a1;
+ pa.pa_medium_base = pa.pa_medium_h.a1;
+ pa.pa_slow_base = pa.pa_slow_h.a1;
+ pa.pa_sync_base = pa.pa_sync_h.a1;
pa.pa_ecid = ecid;
pa.pa_flags1 = extecid[EXTECID_F1];
pa.pa_manufacturer = (extecid[EXTECID_MLO] |