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authornisimura <nisimura@NetBSD.org>2023-06-27 21:43:58 +0000
committernisimura <nisimura@NetBSD.org>2023-06-27 21:43:58 +0000
commite34ca8d195d236485d8f7360254eb58064f64de7 (patch)
treee5d72c5ef41bd84309d61d25003fc94cf80a638c /sys
parent1b25d88d1f3a4a10872e13fd76956955103ffdca (diff)
correct register function annotation as it's for receive coalesce.
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/if_bce.c6
-rw-r--r--sys/dev/pci/if_bcereg.h4
2 files changed, 5 insertions, 5 deletions
diff --git a/sys/dev/pci/if_bce.c b/sys/dev/pci/if_bce.c
index 19fc000a6cb..315ac41238d 100644
--- a/sys/dev/pci/if_bce.c
+++ b/sys/dev/pci/if_bce.c
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $ */
+/* $NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $ */
/*
* Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -928,7 +928,7 @@ bce_init(struct ifnet *ifp)
bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) &
~BCE_EMC_PDOWN);
- /* setup DMA interrupt control */
+ /* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMAI_CTL, 1 << 24); /* MAGIC */
/* setup packet filter */
diff --git a/sys/dev/pci/if_bcereg.h b/sys/dev/pci/if_bcereg.h
index 78c6e8f258d..c28b20ac0e0 100644
--- a/sys/dev/pci/if_bcereg.h
+++ b/sys/dev/pci/if_bcereg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bcereg.h,v 1.5 2019/10/18 23:08:29 msaitoh Exp $ */
+/* $NetBSD: if_bcereg.h,v 1.6 2023/06/27 21:43:58 nisimura Exp $ */
/*
* Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -76,7 +76,7 @@
#define BCE_EMC_EDET 0x00000008 /* PHY energy detect */
#define BCE_EMC_LED 0x000000e0 /* PHY LED control */
-/* DMA Interrupt control */
+/* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
#define BCE_DMAI_CTL 0x0100
/* DMA registers */