diff options
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/sdmmc/sdhc.c | 20 | ||||
| -rw-r--r-- | sys/dev/sdmmc/sdhcvar.h | 33 |
2 files changed, 32 insertions, 21 deletions
diff --git a/sys/dev/sdmmc/sdhc.c b/sys/dev/sdmmc/sdhc.c index 92e3ad4e97c..502de8f13e3 100644 --- a/sys/dev/sdmmc/sdhc.c +++ b/sys/dev/sdmmc/sdhc.c @@ -1,4 +1,4 @@ -/* $NetBSD: sdhc.c,v 1.54 2015/02/27 15:53:09 nonaka Exp $ */ +/* $NetBSD: sdhc.c,v 1.55 2015/04/14 18:34:29 bouyer Exp $ */ /* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */ /* @@ -23,7 +23,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.54 2015/02/27 15:53:09 nonaka Exp $"); +__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.55 2015/04/14 18:34:29 bouyer Exp $"); #ifdef _KERNEL_OPT #include "opt_sdmmc.h" @@ -86,6 +86,7 @@ struct sdhc_host { #define SHF_USE_DMA 0x0001 #define SHF_USE_4BIT_MODE 0x0002 #define SHF_USE_8BIT_MODE 0x0004 +#define SHF_MODE_DMAEN 0x0008 /* needs SDHC_DMA_ENABLE in mode */ }; #define HDEVNAME(hp) (device_xname((hp)->sc->sc_dev)) @@ -309,11 +310,19 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot, mutex_exit(&hp->host_mtx); } - /* Use DMA if the host system and the controller support it. */ + /* + * Use DMA if the host system and the controller support it. + * Suports integrated or external DMA egine, with or without + * SDHC_DMA_ENABLE in the command. + */ if (ISSET(sc->sc_flags, SDHC_FLAG_FORCE_DMA) || (ISSET(sc->sc_flags, SDHC_FLAG_USE_DMA && ISSET(caps, SDHC_DMA_SUPPORT)))) { SET(hp->flags, SHF_USE_DMA); + if (!ISSET(sc->sc_flags, SDHC_FLAG_EXTERNAL_DMA) || + ISSET(sc->sc_flags, SDHC_FLAG_EXTDMA_DMAEN)) + SET(hp->flags, SHF_MODE_DMAEN); + aprint_normal_dev(sc->sc_dev, "using DMA transfer\n"); } @@ -1205,7 +1214,7 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd) mode |= SDHC_AUTO_CMD12_ENABLE; } if (cmd->c_dmamap != NULL && cmd->c_datalen > 0 && - !ISSET(sc->sc_flags, SDHC_FLAG_EXTERNAL_DMA)) { + ISSET(hp->flags, SHF_MODE_DMAEN)) { mode |= SDHC_DMA_ENABLE; } @@ -1251,7 +1260,8 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd) } /* Set DMA start address. */ - if (ISSET(mode, SDHC_DMA_ENABLE)) + if (ISSET(mode, SDHC_DMA_ENABLE) && + !ISSET(sc->sc_flags, SDHC_FLAG_EXTERNAL_DMA)) HWRITE4(hp, SDHC_DMA_ADDR, cmd->c_dmamap->dm_segs[0].ds_addr); /* diff --git a/sys/dev/sdmmc/sdhcvar.h b/sys/dev/sdmmc/sdhcvar.h index b3affcd84f3..ec163e1d10e 100644 --- a/sys/dev/sdmmc/sdhcvar.h +++ b/sys/dev/sdmmc/sdhcvar.h @@ -1,4 +1,4 @@ -/* $NetBSD: sdhcvar.h,v 1.15 2014/10/04 18:09:32 jmcneill Exp $ */ +/* $NetBSD: sdhcvar.h,v 1.16 2015/04/14 18:34:29 bouyer Exp $ */ /* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */ /* @@ -36,21 +36,22 @@ struct sdhc_softc { bus_dma_tag_t sc_dmat; uint32_t sc_flags; -#define SDHC_FLAG_USE_DMA 0x0001 -#define SDHC_FLAG_FORCE_DMA 0x0002 -#define SDHC_FLAG_NO_PWR0 0x0004 /* Freescale ESDHC */ -#define SDHC_FLAG_HAVE_DVS 0x0008 /* Freescale ESDHC */ -#define SDHC_FLAG_32BIT_ACCESS 0x0010 /* Freescale ESDHC */ -#define SDHC_FLAG_ENHANCED 0x0020 /* Freescale ESDHC */ -#define SDHC_FLAG_8BIT_MODE 0x0040 /* MMC 8bit mode is supported */ -#define SDHC_FLAG_HAVE_CGM 0x0080 /* Netlogic XLP */ -#define SDHC_FLAG_NO_LED_ON 0x0100 /* LED_ON unsupported in HOST_CTL */ -#define SDHC_FLAG_HOSTCAPS 0x0200 /* No device provided capabilities */ -#define SDHC_FLAG_RSP136_CRC 0x0400 /* Resp 136 with CRC and end-bit */ -#define SDHC_FLAG_SINGLE_ONLY 0x0800 /* Single transfer only */ -#define SDHC_FLAG_WAIT_RESET 0x1000 /* Wait for soft resets to start */ -#define SDHC_FLAG_NO_HS_BIT 0x2000 /* Don't set SDHC_HIGH_SPEED bit */ -#define SDHC_FLAG_EXTERNAL_DMA 0x4000 +#define SDHC_FLAG_USE_DMA 0x00000001 +#define SDHC_FLAG_FORCE_DMA 0x00000002 +#define SDHC_FLAG_NO_PWR0 0x00000004 /* Freescale ESDHC */ +#define SDHC_FLAG_HAVE_DVS 0x00000008 /* Freescale ESDHC */ +#define SDHC_FLAG_32BIT_ACCESS 0x00000010 /* Freescale ESDHC */ +#define SDHC_FLAG_ENHANCED 0x00000020 /* Freescale ESDHC */ +#define SDHC_FLAG_8BIT_MODE 0x00000040 /* MMC 8bit mode is supported */ +#define SDHC_FLAG_HAVE_CGM 0x00000080 /* Netlogic XLP */ +#define SDHC_FLAG_NO_LED_ON 0x00000100 /* LED_ON unsupported in HOST_CTL */ +#define SDHC_FLAG_HOSTCAPS 0x00000200 /* No device provided capabilities */ +#define SDHC_FLAG_RSP136_CRC 0x00000400 /* Resp 136 with CRC and end-bit */ +#define SDHC_FLAG_SINGLE_ONLY 0x00000800 /* Single transfer only */ +#define SDHC_FLAG_WAIT_RESET 0x00001000 /* Wait for soft resets to start */ +#define SDHC_FLAG_NO_HS_BIT 0x00002000 /* Don't set SDHC_HIGH_SPEED bit */ +#define SDHC_FLAG_EXTERNAL_DMA 0x00004000 +#define SDHC_FLAG_EXTDMA_DMAEN 0x00008000 /* ext. dma need SDHC_DMA_ENABLE */ uint32_t sc_clkbase; int sc_clkmsk; /* Mask for SDCLK */ |
