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2023-05-19No need for double semi-colonskrll
Indent END the same as ENTRY. NFCI.
2023-05-19KNFskrll
2023-05-07RISC-V support that works on QEMU with a single hart.skrll
Thanks for Simon Burge for plic(4).
2023-04-02Trailing whitespaceskrll
2022-12-13Trailing whitespaceskrll
2022-12-04Consistently use the 'mv' instrucation (which is itself an alias) insteadskrll
of the (old) alternative alias 'move'.
2022-12-03Trailing whitespaceskrll
2022-12-03Trailing whitespaceskrll
2022-10-05libc: switch aarch64 to use softfloat functions from compiler_rtnia
The old definitions in qp.c being all grouped together in one file causes problems when static linking with libgcc (i.e. cc --static-libgcc) due to functions like __trunctfdf2 conflicting with libgcc, as seen in PR 57021 We can also add some missing functions like __fixdfti for converting a double to an int128_t, the lack of which is currently preventing webkit from linking on aarch64, as seen in PR 57022 Unclear to me if libc is the right place for these functions, but we can avoid breaking compatibility right now and maintain the status quo while avoiding some obvious immediate problems. nm output for libc shows no functions being removed by this change.
2022-06-26Decorate the HPPA signal trampoline with the appropriate .cfiskrll
directives to allow exception unwind / backtrace across a signal handler.
2022-06-06Save and restore %r19 the "linkage table pointer register" across the callskrll
to __cerror so if the ptrace syscall fails we can call __cerror again with the correct %r19 value. Do this even though the call of __cerror doesn't go via the PLT because __cerror calls __errno which does. Analysis and fix from Tom Lane in port-hppa/56864: hppa: ptrace(2) dumps core when returning an error I changed the location of where %r19 is stored on the stack to follow the ABI.
2022-05-30Obsolete hack for evbppc to replace memcmp(9), memcpy(9), and memmove(9)rin
with strictly-aligned versions. Now all 32-bit powerpc ports share the same libc binary. This change together with the preceding similar change in libkern slightly improve performance for DHT (ibm4xx/405GP) and RB800 (MPC8533E). See changes in bytebench scores: - DHT https://gist.github.com/rokuyama/301063355de9733bea515b84ef574c0a - RB800 https://gist.github.com/rokuyama/60ad665d367d6d110b79ec44707f39ff Improvements may be negligible, but this does not cause performance regressions at least. This hack was for 403, but unaligned memory access is now emulated by kernel. This should result in serious performance regression for 403. We will provide strictly-aligned versions by ld.so.conf.
2022-04-08fix various typos, mainly in comments, but also log messages, docs, game text.andvar
2022-04-07s/psuedo/pseudo/andvar
2021-11-27Trailing whitespaceskrll
2021-11-24Decorate the VAX signal trampoline with the appropriate .cfithorpej
directives to allow exception unwind / backtrace across a signal handler. N.B. This is currently disabled, as these .cfi directives cause linker warnings about incompatible TEXTREL relocations in .eh_frame.
2021-11-24Decorate the SuperH signal trampoline with the appropriate .cfithorpej
directives to allow exception unwind / backtrace across a signal handler.
2021-11-23Decorate the ARM signal trampoline with the appropriate .cfithorpej
directives to allow exception unwind / backtrace across a signal handler.
2021-11-23Because the PC is not a general purpose register on aarch64, we needthorpej
to use DWARF pseudo-register for the signal trampoline return address. Adjust the style to match other platforms.
2021-11-21Decorate the m68k signal trampoline with the appropriate .cfithorpej
directives to allow exception unwind / backtrace across a signal handler.
2021-11-21Decorate the powerpc signal trampoline with the appropriate .cfithorpej
directives to allow exception unwind / backtrace across a signal handler.
2021-11-20Use the DWARF pseudo-register for the signal trampoline return address.thorpej
2021-11-18Decorate the MIPS signal trampoline with the appropriate .cfithorpej
directives to allow exception unwind / backtrace across a signal handler.
2021-11-03CFI: Saved RA needs to point to the PC slot in the ucontext_t.thorpej
2021-11-03Set up the CFI in a slightly more rational way.thorpej
2021-10-31Tidy up how __sigaction14_sigtramp.c is added to SRCS.thorpej
2021-10-26Merge all MD __sigaction14_sigtramp.c copies into one:christos
- sparc and sparc64 were not using version 0 sigcontext when there were no arguments in the signal version. This was probably a bug. - vax is using +1 the version numbers of the other archs. - Only hppa was defining __LIBC12_SOURCE__ so it was getting a working sigcontext before. all the other ports that supported sigcontext had the compat code disabled. [pointed out by thorpej, thanks!] If we want to remove sigcontext support from userland at least now there is less work to do so.
2021-10-07Fix the lib/libc/setjmp/t_setjmp:{,_}longjmp_zero test casesskrll
2021-07-26Improve previous:rin
- Add suffix ``d'' for mkdep(1). - Improve comment a little...
2021-07-24For evbppc, use C version of bcopy(3), memcpy(3), memcmp(3), andrin
memmove(3) consistently for debug library (*.go) in order to avoid alignment faults for 403.
2021-07-06Ensure that the stack is always 16-byte aligned by rounding sizes as needed.thorpej
All changes from rin@ except swapcontext.S, which is from me (added symbolic constants to make the code clearer).
2021-06-30Do previous differtly by pushing two registers in the same way as theskrll
_INVOKE_CERROR macro
2021-06-30The _INVOKE_CERROR macro deals with thumb so simplify the code (at theskrll
expense of a couple more instructions).
2021-06-30Trailing whitespaceskrll
2021-06-30Fix previous. For Thumb-1:rin
- sp cannot be manipulated directly - {add,sub}s should be used instead of {add,sub}
2021-06-29Align sp to 8-byte boundary as required by EABI.rin
IIUC, this change only affects libc compiled for ``Thumb-mode userland'', which we've not officially supported yet.
2021-05-25POSIX sez:thorpej
The longjmp() function shall not cause setjmp() to return 0; if val is 0, setjmp() shall return 1. Fixes the _longjmp_zero and longjmp_zero test cases in the t_setjmp test on alpha.
2021-04-25Use ${MACHINE_MIPS64}christos
2021-02-19Remove the incorrect register shuffle - we pass SYS___syscall as thesimonb
syscall number in v0 and pass all the original __syscall() args in their original slots/regs.
2021-02-06For mips n32/n64 explicitly save the GP reg on the stack, andsimonb
restore it _after_ the call to __errno(). Fixes sending the __errno() call off to nowhereland when this code is included in another library (eg __posix_cerror() in libposix). Failure picked up by the ATF lib/libposix/posix1/t_rename test.
2020-12-05spaces to tabskrll
2020-10-24Add _UC_GREGS_* defines for all general registersskrll
2020-10-24Provide _UC_REGS_* defines for all registersskrll
2020-10-24Update the unwinder comment to better reflect ARM64skrll
2020-10-24s/ARM/ARM64/ in commentskrll
2020-10-21Fix typo (thanks kamil@ for pointing it out).thorpej
2020-10-21Add call frame unwind info to the Alpha signal trampoline. Usingthorpej
kamil@'s test program: Before: Backtrace 2 stack frames. 0x120000a74 <handler+0x54> at ./test 0x3fffdca6550 <__sigtramp_siginfo_2> at /usr/lib/libc.so.12 After: Backtrace 4 stack frames. 0x120000a74 <handler+0x54> at ./test 0x3fffdca6554 <__sigtramp_siginfo_2> at /usr/lib/libc.so.12 0x120000b10 <main+0x38> at ./test 0x1200009b4 <___start+0x1a4> at ./test
2020-10-21- Consistently use _REG_* defines from assym.h to mean register numbers,thorpej
not offsets (i.e. *8 to get the offset). - Define and use SIZEOF_SIGINFO and UC_GREGS constants, rather than hard-code magic numbers. NFC -- same object code is generated.
2020-10-19Restore SP from mcontextkamil
Improves unwinding of multiple frames without frame pointer.
2020-10-19Restore ESP from mcontextkamil
Improves unwinding of multiple frames without base pointer.