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2023-02-23alpha: Add missing barriers in cpu_switchto.riastradh
Details in comments. PR kern/57240 XXX pullup-8 XXX pullup-9 XXX pullup-10
2022-07-20Make alpha_wmb() actually a WMB rather than an MB (all uses ofthorpej
alpha_wmb() have been audited and fixed-up as necessary).
2022-07-20In the Alpha tc_syncbus(), we need to issue a MB because WMB does notthorpej
order reads with respect to writes. Remove now-redundant tc_wmb() calls before tc_syncbus(). NFC on MIPS other than removing a redundant wbflush() (tc_wmb() followed by tc_syncbus()).
2022-07-19alpha: Fix missing includes in pmap.h.riastradh
2022-06-03remove reference to gatekeeper.dec.com ftp.andvar
2022-02-13alpha: __cpu_simple_lock audit.riastradh
Add missing "cc" and "memory" asm clobbers to the compiler can't reorder memory access around these. The necessary memory barrier instructions, mb, already appear in all the right places.
2022-02-12__cpu_simple_lock(9): Omit needless barriers in init.riastradh
It is, and always has been, the caller's responsibility to ensure the lock is initialized before it can be used -- otherwise the memory could hold garbage; it is nonsensical to even attempt locking operations on it before initialization. So there's no need to issue explicit barriers here. The barrier seems to have been introduced in sys/arch/alpha/alpha/lock_machdep.c rev. 1.1 (since moved to inline asm in alpha/include/lock.h) and then copied & pasted into several other architectures.
2021-11-02In order to prevent _mcount() from being recursively called when built with ↵ryo
COPTS=-O0, sprinkle `__always_inline' to make _mcount() be generated as a single function.
2021-10-29Define __HAVE_STRUCT_SIGCONTEXT regardless of its current visibility.thorpej
2021-10-26Merge all MD __sigaction14_sigtramp.c copies into one:christos
- sparc and sparc64 were not using version 0 sigcontext when there were no arguments in the signal version. This was probably a bug. - vax is using +1 the version numbers of the other archs. - Only hppa was defining __LIBC12_SOURCE__ so it was getting a working sigcontext before. all the other ports that supported sigcontext had the compat code disabled. [pointed out by thorpej, thanks!] If we want to remove sigcontext support from userland at least now there is less work to do so.
2021-09-25Make all of the EISA chipset functions call through real functions,thorpej
rather the macros.
2021-08-25- In kern_mutex.c, if MUTEX_CAS() is not defined, define it in terms ofthorpej
atomic_cas_ulong(). - For arm, ia64, m68k, mips, or1k, riscv, vax: don't define our own MUTEX_CAS(), as they either use atomic_cas_ulong() or equivalent (atomic_cas_uint() on m68k). - For alpha and sparc64, don't define MUTEX_CAS() in terms of their own _lock_cas(), which has its own memory barriers; the call sites in kern_mutex.c already have the appropriate memory barrier calls. Thus, alpha and sparc64 can use default definition. - For sh3, don't define MUTEX_CAS() in terms of its own _lock_cas(); atomic_cas_ulong() is strong-aliased to _lock_cas(), therefore defining our own MUTEX_CAS() is redundant. Per thread: https://mail-index.netbsd.org/tech-kern/2021/07/25/msg027562.html
2021-08-14Improved the performance of kernel profiling on MULTIPROCESSOR, and possible ↵ryo
to get profiling data for each CPU. In the current implementation, locks are acquired at the entrance of the mcount internal function, so the higher the number of cores, the more lock conflict occurs, making profiling performance in a MULTIPROCESSOR environment unusable and slow. Profiling buffers has been changed to be reserved for each CPU, improving profiling performance in MP by several to several dozen times. - Eliminated cpu_simple_lock in mcount internal function, using per-CPU buffers. - Add ci_gmon member to struct cpu_info of each MP arch. - Add kern.profiling.percpu node in sysctl tree. - Add new -c <cpuid> option to kgmon(8) to specify the cpuid, like openbsd. For compatibility, if the -c option is not specified, the entire system can be operated as before, and the -p option will get the total profiling data for all CPUs.
2021-07-23- Expose alpha_fp_complete_at() to callers outside fp_complete.c.thorpej
- Use ufetch_32() instead of copyin() to fetch the instruction.
2021-07-22Various minor cleanups and bug fixes to the FP software completion code:thorpej
- Use __CTASSERT() instead of rolling our own compile-time assertion using cpp. - Use __BIT() &c instead of rolling our own. - Improve some comments. - Define a default FP_C and FPCR value that is self-consistent, and initialize it properly at process creation time. - Fix signal information when the trap shadow cannot be resolved. - Use defined constants rather than magic numbers for the exception summary bits. - Add a machdep sysctl to enable FP software-completion debugging.
2021-07-22Use __BITS() to define MDLWP_FP_C.thorpej
2021-07-20Define the f_float in-memory format. Line of the fields in s_float andthorpej
t_float.
2021-07-19Remove definitions for CACHE_LINE_SIZE and COHERENCY_UNIT which are the samechristos
as the default.
2021-07-18Allow for the SGMAP implementation to specify a minimum alignment forthorpej
SGMAP DMA segments. If not specified, PAGE_SIZE will be used, as before.
2021-07-16The Alpha AXP Architecture Reference Manual is explcit that the onlythorpej
valid bits in the PSL are the IPL and USER bits, the latter of which will always be clear when in the kernel, and that all other bits MBZ. So, when reading the PSL to get the current IPL, don't bother masking with ALPHA_PSL_IPL_MASK.
2021-07-14Disable the mutex_spin_{enter,exit}() fast-path stubs while I investigatethorpej
some an odd IPL-related panic that seems to be related (that I can fairly reliabily reproduce on an LCA45).
2021-07-12Optimized fast-paths for mutex_spin_enter() and mutex_spin_exit().thorpej
2021-07-11Optimized fast-paths for rw_enter() / rw_tryenter() / rw_exit().thorpej
2021-07-06- Define STACK_ALIGNBYTES to override the default and ensure thatthorpej
stacks are 16-byte aligned, an assumption made by the compiler and recommended by the Alpha Architecture Handbook. - cpu_lwp_fork(): Ensure 16-byte stack alignment if the caller specified one. Addresses root casue of PR port-alpha/54307 and PR toolchain/56153. Many thanks to rin@ for performing the root cause analysis and testing changes.
2021-07-04Reduce code duplication when setting up the interrupt handler datathorpej
structures: - alpha_shared_intr_alloc() no longer takes a "string length" argument, and just uses kmem_asprintf() to create an "irq %u" string by default. This is suitable for nearly every caller. - Add a alpha_shared_intr_set_string() that allows callers to override the default IRQ description string. - Related: make alpha_shared_intr_string() return a const char *, since no callers should need to modify the string directly now. - Re-factor PCI shared interrupt structure allocation / initialization into a new alpha_pci_intr_alloc(), which is suitable for nearly every Alpha PCI platform. Callers are expected to first have initialized the interrupt hardware to the quiescent state. Adjust various call sites of above functions to account for changes, even if they are not able to use the newly re-factored code.
2021-06-26Fix typo in commentskrll
2021-06-19Don't use a bunch of switch() statements in the core logic drivers to selectthorpej
the PCI interrupt initialization routine. Instead, register said routines by systype in a link set, and look them up and invoke them in a new function alpha_pci_intr_init().
2021-05-31Additional comment about the range (0-1025) that's needed for the PT pagethorpej
reference count, and thus now many bits we need to scare up.
2021-05-31After a comment by joerg@, go back to using a dedicated field for thethorpej
PT page reference count, but add an XXX comment stating the desire to find a safely-unused field in the vm_page structure when pages are in- use as PT pages, so that we can save the 8 bytes per page needed for this.
2021-05-31Include "opt_param.h" (ifdef _KERNEL_OPT) everywhere that MSGBUFSIZE issimonb
referenced since some sources include <machine/param.h>.
2021-05-30Implement pmap_remove_all().thorpej
2021-05-30When removing mappings, hang PV entries to be freed off of thethorpej
pmap_tlb_context structure, and free them back in bulk after we release all of our locks (as we do with PT pages that are freed).
2021-05-30Keep track of a pmap's PV entries with a list hanging off the pmap.thorpej
2021-05-30Store the modified / referenced attribute bits in the lower 2 bits ofthorpej
the PV entry list pointer in struct vm_page_md. This reduces the size of that structure from 16 bytes to 8, and will go a fair way to making up for increasing the size of struct pv_entry in a future commit.
2021-05-30Define a macro, VM_MDPAGE_PVS(), for fetching the first pv entrythorpej
for a page.
2021-05-30Pages that are in-use as page table pages should never be part of athorpej
UVM loan transaction, so use the vm_page::loan_count field as the PT page reference count.
2021-05-30Track the PT pages allocated to a pmap in the pmap itself.thorpej
2021-05-30Define a pmap_pagelist LIST_HEAD and use it where we used ad hoc LIST_HEADsthorpej
of vm_page structures. Define and use a generic routine to free such a list back to UVM. In pmap_remove_internal(), KASSERT that no PT pages are queued up to be freed when removing mappings from the kernel pmap.
2021-05-29Move the pointer to the pmap's lev1map out of the shared pmap structurethorpej
and into each CPU's pmap_percpu area. This pointer is constant for the life of the pmap, and moving it gives us an additional 8 bytes in the shared pmap structure. Because the kernel pmap does not have per-CPU data, all places where we need the kernel pmap's lev1map now just reference kernel_lev1map directly.
2021-05-29Rather than tracking "needs I-sync on return to userspace" in a bitmap,thorpej
track it with a separate field in the pmap_percpu. Not only does this reduce cache line contention ever so slightly, it also frees up a field in the shared portion of the pmap structure.
2021-05-29Rename pmap_asn_info to pmap_percpu, and pmap::pm_asni to pmap::pm_percpu.thorpej
No functional change.
2021-05-27The Tsunami / Typhoon chipsets have a static "monster window" for DMAthorpej
that allows for up to 32GB of RAM to be direct-mapped if the PCI device can issue a 64-bit address (the monster window lives at 0x10000000000). Enable this window and provide this to the PCI bus as a "dmat64".
2021-05-27Define the arithmetic exception summary bits passed in a0 to entArith.thorpej
2021-05-24Add _UC_SETSTACK / _UC_CLRSTACK handling. Fixes the t_sigaltstack testthorpej
on alpha.
2021-05-24pmap_tlb_shootdown_all_user() can be called in the PV scenario as wellthorpej
as the forward scenario, for example if a pmap_page_protect() to remove all mappings results in the freeing of a PT page. It therefore needs to do the same reference counting dance as pmap_tlb_shootdown_pv(). Also fix a use-after-free error in pmap_page_protect(). Add / tweak some assertions, and shrink the pmap::pm_count field from long to unsigned int (which gave me a spare unsigned int field for debugging purposes). PR port-alpha/56201.
2021-05-05Remove unused dot_conv() function.thorpej
2021-05-01Make sure preemption is disabled around PMAP_USERRET(); it usesthorpej
per-cpu information. XXX mi_userret() also internally disables preemption. Should restructure these to remove redundancies.
2021-04-20Slight tweak to previous changes:thorpej
Rather than simply increment the interrupt depth for the clock interrupt, we add 0x10. Why? Because while we only use a single Alpha IPL (4) for IPL_{BIO,NET,TTY,VM}, technically the architecture specification suports two in the OSF/1 PALcode (3 [low-pri] and 4 [high-pri]), meaning we could conceiveably have intrdepth > 1 just for device interrupts. Adding 0x10 here means that cpu_intr_p() can check for "intrdepth != 0" for "in interrupt context" and CLKF_INTR() can check "(intrdepth & 0xf) != 0" for "was processing interrupts when the clock interrupt happened".
2021-04-15Fix fallout from alpha/interrupt.c rev 1.93:rin
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/alpha/alpha/interrupt.c#rev1.93 by which interrupts *seem* to occupy 100% CPU time. Now, we bump ci_intrdepth for clock interrupt. Therefore, if ci_intrdepth > 1 is observed in statclock(), CPU is actually occupied by interrupts. Thanks jklos and thorpej for notice!
2021-04-03Fix an IPI deadlock scenario that resulted in a TLB shootdown timeoutthorpej
panic reported by John Klos on port-alpha: - pmap_tlb_shootnow(): If we acquire a pmap's activation lock, we will have raised the IPL on the current CPU to IPL_SCHED until we drop the tlb_lock (due to how nested spin mutexes work). As such, when we release the activation lock, forcibly lower our IPL back to IPL_VM so that we can receive and process IPIs while waiting for other CPUs to process the shootdowns. - mutex_vector_enter(): Invoke SPINLOCK_SPIN_HOOK while spinning to acquire a spin mutex. This is a nop on most platforms, but it's important on the Alpha. Without this, IPIs (and thus TLB shootdowns) cannot be processed if trying to acquire an IPL_SCHED spin mutex such as those used by the scheduler. ...and while we're poking around in here: - Rework the Alpha SPINLOCK_SPIN_HOOK to only check curcpu()->ci_ipis if the current CPU's IPL is >= IPL_CLOCK (thus ensuring that preemption is disabled and thus guaranteeing that curcpu() is stable). (Alpha does not yet support kernel preemption, but this is now one less thing that would need to be fixed.)