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path: root/sys/arch/amd64/include/frameasm.h
AgeCommit message (Expand)Author
2022-07-30x86: Eliminate mfence hotpatch for membar_sync.riastradh
2022-04-09x86: Every load is a load-acquire, so membar_consumer is a noop.riastradh
2021-04-17sys/arch/amd64: remove trailing whitespacerillig
2020-07-19Revert most of ad's movs/stos change. Instead do a lot simpler: declaremaxv
2020-06-21Fix commentbouyer
2020-06-01Reported-by: syzbot+6dd5a230d19f0cbc7814@syzkaller.appspotmail.comad
2020-04-26Use the hotpatch framework for LFENCE/MFENCE.maxv
2020-04-25Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVMbouyer
2019-11-17Disable KCOV - by raising the interrupt level - in the TLB IPI handler,maxv
2019-11-14Add support for Kernel Memory Sanitizer (kMSan). It detects uninitializedmaxv
2019-10-12Rewrite the FPU code on x86. This greatly simplifies the logic and removesmaxv
2019-05-18Two changes in the CPU mitigations:maxv
2019-05-14Mitigation for INTEL-SA-00233: Microarchitectural Data Sampling (MDS).maxv
2019-02-11We reorganise definitions for XEN source support as follows:cherry
2018-08-12Move the PCPU area from slot 384 to slot 510, to avoid creating too muchmaxv
2018-07-13Provide empty SVS_ENTER_NMI/SVS_LEAVE_NMI for kernels w/o options SVSmartin
2018-07-12Handle NMIs correctly when SVS is enabled. We store the kernel's CR3 at themaxv
2018-03-28Add the IBRS mitigation for SpectreV2 on amd64.maxv
2018-02-25Remove INTRENTRY_L, it's not used anymore.maxv
2018-02-22Make the machdep.svs_enabled sysctl writable, and add the kernel codemaxv
2018-02-22Add a dynamic detection for SVS.maxv
2018-01-27Put the default %cs value in INTR_RECURSE_HWFRAME. Pushing an immediatemaxv
2018-01-27Declare and use INTR_RECURSE_ENTRY, an optimized version of INTRENTRY.maxv
2018-01-27Remove DO_DEFERRED_SWITCH and DO_DEFERRED_SWITCH_RETRY, unused.maxv
2018-01-21Unmap the kernel from userland in SVS, and leave only the neededmaxv
2018-01-20Use .pushsection/.popsection, we will soon embed macros in several layersmaxv
2018-01-18Unmap the kernel heap from the user page tables (SVS).maxv
2018-01-11Declare new SVS_* variants: SVS_ENTER_NOSTACK and SVS_LEAVE_NOSTACK. Usemaxv
2018-01-07Add a new option, SVS (for Separate Virtual Space), that unmaps kernelmaxv
2018-01-07Switch x86_retpatch[] -> HOTPATCH().maxv
2018-01-07Switch x86_lockpatch[] -> HOTPATCH().maxv
2018-01-07Implement a real hotpatch feature.maxv
2017-10-17Have the cpu clear PSL_D automatically when entering the kernel via amaxv
2017-10-17Add support for SMAP on amd64.maxv
2017-09-15Declare INTRFASTEXIT as a function, so that there is only one iretq in themaxv
2012-07-15Rename MDP_IRET to MDL_IRET since it is an lwp flag, not a proc one.dsl
2012-05-17Let the user of INTRENTRY_L() place a label on the 'swapgs' useddsl
2012-05-07Add a ';' that got deleted in a slight tidyup.dsl
2012-05-07Move all the XEN differences to a single conditional.dsl
2011-08-10Correct offset calculation for cicherry
2011-01-12Allow use of traditional CPP to be set on a per platform base in sys.mk.joerg
2010-07-07add the guts of TLS support on amd64. based on joerg's patch,chs
2008-11-21PR port-amd64/39991 modules/compat_linux: build fixad
2008-04-21Access Xen's vcpu info structure per-CPU.cegger
2008-02-29don't bother to check curlwp==NULL.yamt
2007-12-21Create the trap/syscall frame space for all the registers in one go.dsl
2007-12-21Change the xen CLI() and STI() defines to only use one scratch register.dsl
2007-11-22Pull up the bouyer-xenamd64 branch to HEAD. This brings in amd64 supportbouyer
2007-11-14Clear the direction flag on entry to the kernel.ad
2007-10-18merge yamt-x86pmap branch.yamt