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2023-04-09amd64: Make curlwp and curcpu() flushable.riastradh
The only effect of the `volatile' qualifier on an asm block with outputs is to force the instructions to appear in the generated code, even if the outputs end up being unused. Since these instructions have no (architectural) side effects -- provided %gs is set correctly, which must be the case here -- there's no need for the volatile qualifier, so nix it.
2022-09-24x86: Support EFI runtime services.riastradh
This creates a special pmap, efi_runtime_pmap, which avoids setting PTE_U but allows mappings to lie in what would normally be user VM -- this way we don't fall afoul of SMAP/SMEP when executing EFI runtime services from CPL 0. SVS does not apply to the EFI runtime pmap. The mechanism is intended to work with either physical addressing or virtual addressing; currently the bootloader does physical addressing but in principle it could be modified to do virtual addressing instead, if it allocated virtual pages, assigned them in the memory map, and issued RT->SetVirtualAddressMap. Not sure pmap_activate_sync and pmap_deactivate_sync are correct, need more review from an x86 wizard. If this causes fallout, it can be disabled temporarily without reverting anything by just making efi_runtime_init return immediately without doing anything, or by removing options EFI_RUNTIME. amd64-only for now pending type fixes and testing on i386.
2022-09-13amd64/asan.h, amd64/msan.h: Add include guards.riastradh
2022-08-22Sprinkle "#include <machine/pmap_private.h>", kernel ALL/amd64hannken
compiles again.
2022-08-22amd64/msan.h: Fix includes for private pmap.riastradh
2022-08-21x86 Move VA_SIGN_POS/NEG to machine/pte.h.riastradh
It's used by pl[1-4]_pi, also defined in machine/pte.h, and used in libkvm without pmap_private.h.
2022-08-20{amd64,i386}/pmap_private.h: Fix minor whitespace issues.riastradh
2022-08-20x86: Move definition of struct pmap to pmap_private.h.riastradh
This makes pmap_resident_count and pmap_wired_count out-of-line functions instead of inline. No functional change intended otherwise.
2022-08-20x86: Split most of pmap.h into pmap_private.h or vmparam.h.riastradh
This way pmap.h only contains the MD definition of the MI pmap(9) API, which loads of things in the kernel rely on, so changing x86 pmap internals no longer requires recompiling the entire kernel every time. Callers needing these internals must now use machine/pmap_private.h. Note: This is not x86/pmap_private.h because it contains three parts: 1. CPU-specific (different for i386/amd64) definitions used by... 2. common definitions, including Xenisms like xpmap_ptetomach, further used by... 3. more CPU-specific inlines for pmap_pte_* operations So {amd64,i386}/pmap_private.h defines 1, includes x86/pmap_private.h for 2, and then defines 3. Maybe we should split that out into a new pmap_pte.h to reduce this trouble. No functional change intended, other than that some .c files must include machine/pmap_private.h when previously uvm/uvm_pmap.h polluted the namespace with pmap internals. Note: This migrates part of i386/pmap.h into i386/vmparam.h -- specifically the parts that are needed for several constants defined in vmparam.h: VM_MAXUSER_ADDRESS VM_MAX_ADDRESS VM_MAX_KERNEL_ADDRESS VM_MIN_KERNEL_ADDRESS Since i386 needs PDP_SIZE in vmparam.h, I added it there on amd64 too, just to keep things parallel.
2022-08-20x86: Forbid using x86/pte.h directly; use machine/pte.h.riastradh
machine/pte.h already used outside sys/arch, so let's make it the primary thing and make sure to use x86/pte.h only as a subroutine.
2022-08-20amd64/pte.h, i386/pte.h: Need sys/stdint.h for uintN_t.riastradh
2022-08-20x86: Move struct vm_page_md to common x86/pmap.h.riastradh
2022-08-20x86: Split bootspace out of x86/pmap.h into new x86/bootspace.h.riastradh
2022-07-30x86: Eliminate mfence hotpatch for membar_sync.riastradh
The more-compatible LOCK ADD $0,-N(%rsp) turns out to be cheaper than MFENCE anyway. Let's save some space and maintenance and rip out the hotpatching for it.
2022-05-22fix various small typos, mainly in comments.andvar
2022-04-09x86: Every load is a load-acquire, so membar_consumer is a noop.riastradh
lfence is only needed for MD logic, such as operations on I/O memory rather than normal cacheable memory, or special instructions like RDTSC -- never for MI synchronization between threads/CPUs. No need for hot-patching to do lfence here. (The x86_lfence function might reasonably be patched on i386 to do lfence for MD logic, but it isn't now and this doesn't change that.)
2021-11-02In order to prevent _mcount() from being recursively called when built with ↵ryo
COPTS=-O0, sprinkle `__always_inline' to make _mcount() be generated as a single function.
2021-10-27- In sendsig() and sigaction1(), don't hard-code signal trampolinethorpej
versions. Instead, use the version constants from <sys/signal.h> and automatically (and correctly) handle cases where multiple versions of a particular trampoline flavor exist. Conditionalize support for sigcontext trampolines on __HAVE_STRUCT_SIGCONTEXT. - aarch64 and amd64 don't use sigcontext natively, but do need to support it for 32-bit compatibility; define __HAVE_STRUCT_SIGCONTEXT conditionally on _KERNEL.
2021-04-30Merge the x86 gdt function and constant definitionschristos
2021-04-30Bump MAX_USERLDT_SIZE to the max size (wastes some memory). wine needs morechristos
than PAGE_SIZE and fails spuriously. XXX: Note the duplicate definition hacks. Should really create <x86/gdt.h>, put the just the constants there and unify them. This would also avoid the hack in: src/tests/lib/libi386/t_user_ldt.c#46
2021-04-17sys/arch/amd64: remove trailing whitespacerillig
2021-04-01Whitespace: #define<tab>simonb
2021-01-23Document via __HAVE_BUS_SPACE_8 platforms that implement bus_space_*_8christos
2020-11-30Introduce smap_enable()/smap_disable() functions, to be used frombouyer
C code.
2020-11-26make the max text size the same as the max data sizechristos
2020-11-18Make this at least compile.hannken
Looks like a missing part from "Round of uvm.h cleanup (2020-09-05 18:30)".
2020-10-06GC unused MAXTSIZ32christos
2020-09-10kasan: fix the copyright noticesmaxv
2020-09-10kcsan: fix the copyright noticesmaxv
2020-09-09kmsan: update the copyright noticesmaxv
2020-09-05Round of uvm.h cleanup.riastradh
The poorly named uvm.h is generally supposed to be for uvm-internal users only. - Narrow it to files that actually need it -- mostly files that need to query whether curlwp is the pagedaemon, which should maybe be exposed by an external header. - Use uvm_extern.h where feasible and uvm_*.h for things not exposed by it. We should split up uvm_extern.h but this will serve for now to reduce the uvm.h dependencies. - Use uvm_stat.h and #ifdef UVMHIST uvm.h for files that use UVMHIST(ubchist), since ubchist is declared in uvm.h but the reference evaporates if UVMHIST is not defined, so we reduce header file dependencies. - Make uvm_device.h and uvm_swap.h independently includable while here. ok chs@
2020-08-01move __HAVE_PCI_MSI_MSIX to <x86/pci_machdep_common.h>jdolecek
2020-07-19Revert most of ad's movs/stos change. Instead do a lot simpler: declaremaxv
svs_quad_copy() used by SVS only, with no need for instrumentation, because SVS is disabled when sanitizers are on.
2020-07-14Introduce per-cpu IDTsyamaguchi
This is realized by following modifications: - Add IDT pages and its allocation maps for each cpu in "struct cpu_info" - Load per-cpu IDTs at cpu_init_idt(struct cpu_info*) - Copy the IDT entries for cpu0 to other CPUs at attach - These are, for example, exceptions, db, system calls, etc. And, added a kernel option named PCPU_IDT to enable the feature.
2020-06-29increase UPAGES (used for lwp kernel stack) for SVS so the thejdolecek
amount of actually usable kernel stack is the same for SVS and non-SVS kernels (currently 12 KiB) discussed with maxv@, part of investigation for PR kern/S55402
2020-06-23Rename __MD_CANONICAL_BASE -> __MD_KERNMEM_BASE for clarity.maxv
2020-06-21Fix commentbouyer
2020-06-13Print a rate limited warning if the TSC timecounter goes backwards from thead
viewpoint of any single LWP.
2020-06-07make this compile.christos
2020-06-01Reported-by: syzbot+6dd5a230d19f0cbc7814@syzkaller.appspotmail.comad
Instrument STOS/MOVS for KMSAN to unbreak it.
2020-05-30Introduce PTRACE_REGS_ALIGN, and on x86, enforce a 16-byte alignment, duemaxv
to fpregs having fxsave which requires 16-byte alignment. Reported-by: syzbot+f44d47e617ebf7fda081@syzkaller.appspotmail.com
2020-05-15Revert previous after thinking about it. It was wrong, don't need to usead
an atomic to clear a PTE or set initial version unless the circumstances call for it.
2020-05-04add support for using MSI for XenPV Dom0jdolecek
use PHYSDEVOP_map_pirq to get the pirq/gsi for MSI/MSI-X, switch also INTx to use it instead of PHYSDEVOP_alloc_irq_vector MSI confirmed working with single-vector MSI for wm(4), ahcisata(4), bge(4) XXX added some provision for MSI-X, but it doesn't actually work (no interrupts delivered), needs some further investigation; disable MSI-X for XENPV via flag in x86/pci/pci_machdep.c
2020-05-02Call kasan_early_init earlier, to unbreak KASAN after the recent RNGmaxv
changes. Will also prevent further trouble.
2020-04-30Don't #include xen/intrdefs.h is !XEN.bouyer
Should fix third-party module builds (e.g. virtualbox)
2020-04-26Use the hotpatch framework for LFENCE/MFENCE.maxv
2020-04-25Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVMbouyer
guests in GENERIC. Xen support can be disabled at runtime with boot -c disable hypervisor
2020-04-25Switch to the new PTE naming. The old naming is now unused, remove it.maxv
2020-04-24Give the ldt a fixed size of one page (512 slots), and drop the variable-maxv
sized mechanism that was too complex. This fixes a race between USER_LDT and SVS: during context switches, the way SVS installs the new ldt relies on the ldt pointer AND the ldt size, but both cannot be accessed atomically at the same time.
2020-04-17Mark the .ident section as mergable string section to avoid redundantjoerg
entries.