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lockcount-9.3
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NetBSD fork for lockdoc analysis
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pl310.c
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Author
2021-10-02
Trailing whitespace
skrll
2019-01-19
Remove hard requirement for "offset" property on Cortex-A5. This is not requi...
jmcneill
2018-06-20
Add l2cc support.
hkenken
2015-02-27
allow arml2cc to be used on Cortex-A5 if the "offset" property is specified
jmcneill
2014-12-01
clean the a9 l2 cache before turning it on.
matt
2014-04-16
Allow l2cc base to gotten from device properties.
matt
2014-03-20
pl310 cache is PIPT
matt
2014-02-23
#include <arm/locore.h>
matt
2013-06-17
KASSERT -> KASSERTMSG
matt
2013-02-13
simplify cache range op
matt
2013-01-22
Don't "sync" atomic ops.
matt
2012-11-28
Make these compile with gcc4.1 and binutils 2.16
matt
2012-11-01
Invalidate the L2 cache before enabling it.
matt
2012-10-17
Add a missing mutex exit.
matt
2012-09-22
Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
matt
2012-09-14
Add L2 cache flush routines. (not yet enabled).
matt
2012-09-07
Don't disable the L2C is it isn't enabled.
matt
2012-09-07
Switch cortex_a9 back to need_ptesync = 1
matt
2012-09-02
Add "write-back" before Unified
matt
2012-09-02
Add driver to attach ARM PL210 L2 Cache Controller
matt