| Age | Commit message (Collapse) | Author |
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Instead of using objcopy(1), which cannot handle EABI version
embedded in e_flags of ELF header, add a dedicated asm file.
If proprietary microcode binary is present, it is incbin'ed
from that asm file.
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mentions. A piece of comment updates.
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The RISC-V binding here seems somewhat of an abuse, but it exists in
mainline linux.
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around the code block with last_gd usage after the inner loop.
It may mainly happen on bus_dmamap_load error.
Reported by Mootja _14, 2017.
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builds.
They fail with 'L1_S_SIZE' undeclared error otherwise from gemini.h declarations.
gemini_machdep.c includes it transitively, thus doesn't faili on GEMINI config.
Likely nobody is using them anyway though...
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and then checks for an "arm,cortex-a9-twd-timer" compatible entry in the
fdt. If not present, create one so that a9ptmr will attach.
We need this entry as this is the only timer we support for this platform,
but the upstream imx6sx.dtsi is missing the entry for it (and all A9 CPUs
have it anyway).
Thanks to Jared McNeill for advices and review.
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PR kern/57076
XXX pullup-10
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In one comment I assume that it was meant to be pull-up resistor.
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only one OTG.
Add a "uintptr_t data" argument to all sc_*_md_hook callbacks, which
gets the sc_md_hook_data value when called.
In imx6_usb.c use this to pass the number of OTG controllers to the callbacks.
imx6_usb_init() can then properly call init_otg() or init_h1() for unit 1.
In imx6_usb_attach(), test if there is a vbus-supply property in the fdt,
and enable the regulator if present.
Now the USB port of the UDOO Neo works.
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- the i.mx6sx has a third AIPS, so KERNEL_IO_IOREG map has to be larger
- the uart clock is at 24Mhz instead of 80.
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the i.mx6q
- move i.mx6q-specific functions and data to imx6_clk.c
- add i.mx6sx specific imx6sx_clk.c
- add a imx6sxccm device
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fdt at some point, so look for those as well
with this my pinebook's sensors work again
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Patch from Lloyd Parkes <lloyd@must-have-coffee.gen.nz> in PR# kern/57386
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implementation visibility of these relocations.
Currently all implementations resolve local symbol relocations in the first
pass and simply skip them in the second. The RISC-V implementation will
make use of this visiblity.
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this comes from upstream d1152bc533c941f7e267bf53d344cee510ea2808.
(i tried to make this be in rk3328.dtsi so all rk3328 boards would
benefit, but it doesn't work, and this is the only one have to test.)
adjust rkv1crypto to support a per-platform clocks setup.
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arrays to use DEVMAP_ENTRY{,_END}
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extern paddr_t physical_start, physical_end;
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It's less letters, matches other similar variables and will help with
sharing code between the two architectures.
NFCI.
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imx6_ccm.c to imx6_clk.c, and prefix with IMX6Q/imx6q:
- Clock IDs and related struct imx_clock_id
- Clock Parents and Divider Tables
- struct imx6_clk
and related static functions
Add a pointer to struct imx6_clk, and it's size to imx6ccm_softc
Pass a pointer to imx6ccm_softc to all functions from imx6_ccm.c
NFCI
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mainly aion -> ation and inlude -> include.
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When we are triggering a softint, it can't already hold any mutexes.
So any path to mutex_exit(mtx) must go via mutex_enter(mtx), which is
always done with atomic r/m/w, and we need not issue any explicit
barrier between ci->ci_curlwp = softlwp and a potential load of
mtx->mtx_owner in mutex_exit.
PR kern/57240
XXX pullup-8
XXX pullup-9
XXX pullup-10
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CPSW_DEBUG_DMA define.
This handles a condition where checking for DMA_RXEOQ in the received packet
results in the console being spammed with "rxeoq" messages, which soon results
in a kernel panic. The corresponding Debugger() call for this check was
commented out.
The TI documentation ("AM335x and AMIC110 Sitara™ Processors Technical
Reference Manual") documents the EOQ bit thus:
(14.3.2.4.1.2.4) This bit is set by the EMAC when the EMAC identifies
that a descriptor is the last for a given packet received (also sets
the EOP flag), and there are no more descriptors in the receive list
(next descriptor pointer is NULL). The software application can use
this bit to detect when the EMAC receiver for the corresponding channel
has halted. This is useful when the application appends additional free
buffer descriptors to an active receive queue. Note that this flag is
valid on EOP descriptors only.
Moving this check (and the offending printf() ) into a debug #ifdef results in
the BeagleBone Green surviving the nightly checks; it would always drop into
the debugger before this change.
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SOC_VIRT got removed.
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address and maximum (~0UL) physical address. The values are passed
through to uvm_pglistalloc which knows about the RAM ranges.
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