| Age | Commit message (Expand) | Author |
| 2021-04-01 | Whitespace: #define<tab> | simonb |
| 2020-08-01 | move __HAVE_PCI_MSI_MSIX to <x86/pci_machdep_common.h> | jdolecek |
| 2020-05-04 | add support for using MSI for XenPV Dom0 | jdolecek |
| 2019-09-23 | Disable __NO_STRICT_ALIGNMENT on amd64/i386 for UBSan builds | kamil |
| 2019-04-06 | Overhaul the API used to fetch and store individual memory cells in | thorpej |
| 2018-07-12 | Remove the kernel PMC code. Sent yesterday on tech-kern@. | maxv |
| 2016-02-27 | Add cpu_rng, a framework for simple on-CPU random number generators. | tls |
| 2016-01-24 | expose __vaddr_t for segments.h since it is a userland api. | christos |
| 2016-01-23 | expose the kernel types for standalone code. | christos |
| 2016-01-23 | Hide {p,v}{addr,size}_t and register_t (and a couple more types that | christos |
| 2015-08-27 | Fix PTHREAD_FOO_INITIALIZER for C++ by not using volatile in the relevant | pooka |
| 2015-08-21 | Make it possible to explicitly disable MSI/MSIX with NO_PCI_MSI_MSIX. | pooka |
| 2015-04-27 | add x86 MD MSI/MSI-X support code. | knakahara |
| 2015-04-22 | Revise rhetoric for why __HAVE_ATOMIC64_OPS is defined with _KERNEL even | pooka |
| 2014-04-24 | Explain what is going on with the 64 bit atomic ops, and restore them | christos |
| 2014-04-22 | we don't really have 64 bit atomic ops. | christos |
| 2014-04-03 | we have cpu_bootconf() | christos |
| 2013-12-01 | revert fpu/pcu changes until we figure out what's wrong; they cause random | christos |
| 2013-10-23 | Use the MI "pcu" framework for bookkeeping of npx/fpu states on x86. | drochner |
| 2011-07-06 | Implement bus_space_tag_create() and _destroy(). | dyoung |
| 2011-06-12 | Welcome to 5.99.53! Merge rmind-uvmplock branch: | rmind |
| 2011-03-12 | Add TLS support for AMD64, i386 and SH3. | joerg |
| 2011-02-24 | Allow storing and receiving the LWP private pointer via ucontext_t | joerg |
| 2010-12-22 | Make __HAVE_CPU_DATA_FIRST true | christos |
| 2010-12-14 | Revert change made in revision 1.66 by ad@ this is not true and 64bit | haad |
| 2010-09-21 | Promote paddr_t to 64 bits for i386 userland (non PAE and PAE). | jym |
| 2009-12-11 | Add PRIx{P,V}{ADDR,SIZE}, PRIu{P,V}SIZE, and PRIxREGISTER{,32,64} for all | matt |
| 2009-06-28 | Define __HAVE_ATOMIC64_OPS only in kernel, since it doesn't work in | ad |
| 2009-04-19 | cpuctl: | ad |
| 2009-04-05 | Use #define<tab> consistently. | tsutsui |
| 2009-04-05 | Remove __HAVE_UFS2_BOOT since it belongs to sysinst for now. | tsutsui |
| 2009-04-04 | +__HAVE_UFS2_BOOT | ad |
| 2009-03-29 | _lwp_setprivate: provide the value to MD code if a hook is present. | ad |
| 2008-10-26 | - use _I386_FOO_H for multi-include protection | mrg |
| 2008-02-21 | #define __HAVE_ATOMIC_AS_MEMBAR, indicating that: | ad |
| 2008-01-23 | Merge the bouyer-xeni386 branch. This brings in PAE support to NetBSD xeni386 | bouyer |
| 2008-01-20 | Now that __HAVE_TIMECOUNTER and __HAVE_GENERIC_TODR are invariants, | joerg |
| 2008-01-15 | Introduce optional cpu_offline_md to execute MD actions at the end of | joerg |
| 2008-01-11 | Merge the bouyer-xeni386 branch to head, at tag bouyer-xeni386-merge1 (the | bouyer |
| 2008-01-04 | i386: | yamt |
| 2007-12-20 | 64-bit atomic ops for i386. | ad |
| 2007-10-17 | Merge the ppcoea-renovation branch to HEAD. | garbled |
| 2007-07-14 | Generic soft interrupts are mandatory. | ad |
| 2007-02-09 | Merge newlock2 to head. | ad |
| 2006-09-03 | Nothing in the kernel now tests __HAVE_NWSCONS, so stop defining it everywhere. | bjh21 |
| 2006-09-03 | Convert i386 to use common TODR code. Not tested, but Christos says he'll | gdamore |
| 2006-06-07 | convert to timecounters (from branch simonb-timecounters) | kardel |
| 2005-12-24 | Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete. | perry |
| 2004-01-18 | Do not export __HAVE_RAS to userland. Applications are supposed to try | martin |
| 2003-09-26 | Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h | nathanw |