| Age | Commit message (Expand) | Author |
| 2003-10-29 | Add some more MIPS vendor IDs. | simonb |
| 2003-10-05 | No need to include opt_mips_cache.h here. | tsutsui |
| 2002-11-04 | Use named indices for RA, SR, MULLO, MULHI, and EPC in the | thorpej |
| 2002-11-04 | Define named constants for the trapframe register idices (they | thorpej |
| 2002-06-03 | Add prototypes for the 64-bit pagezero functions. | simonb |
| 2002-06-01 | Use CPU_MIPS_USE_WAIT and CPU_MIPS_NO_WAIT in the CPU table, and use | simonb |
| 2002-05-13 | Add a comment after an #endif to match up with an #ifdef. | simonb |
| 2002-03-11 | make this compile and work with MIPS3_5900. | uch |
| 2002-03-05 | Add support for MIPS32 and MIPS64 architectures: | simonb |
| 2001-11-14 | Merge the thorpej-mips-cache branch onto the trunk. This is an | thorpej |
| 2001-10-16 | R5900 support. | uch |
| 2001-08-18 | Reorder some function prototypes more logically. | simonb |
| 2001-08-15 | Add Alchemy and SiByte company IDs (from oss.sgi.com). | simonb |
| 2001-08-15 | Remove parameter names from function prototypes. | simonb |
| 2001-06-11 | Always indirect through the "locoresw" to get the cache ops, since | thorpej |
| 2000-10-31 | Add mips_pagecopy/zero assembly loops for use by pmap_copy/zero_page*() | jeffs |
| 2000-10-31 | Add mips_indexof() macro to make code for checking the cache index | jeffs |
| 2000-10-09 | mips1_ConfigCache() has gone. | nisimura |
| 2000-10-05 | clean up and consistency for CP0 Count, Compare, Wired, and Config | cgd |
| 2000-10-05 | nuke mips3_clearBEV(). There's really no point in coding a | cgd |
| 2000-10-05 | tweak cpu_arch. Eliminate all direct checks of it (making them | cgd |
| 2000-10-04 | rename mips_read_causereg -> mips_cp0_cause_read. nuke prototype | cgd |
| 2000-10-03 | add some additional info re: MIPS32 PRID encoding, derived from | cgd |
| 2000-10-02 | provide mips3_ld() and mips3_sd(), functions which provide safe wrappers | cgd |
| 2000-09-16 | Introduce new MIPS1 direct mapped cache capacity detection logics. | nisimura |
| 2000-09-16 | IDT32364's Config register uses a different base for IC/DC (instruction | chuck |
| 2000-09-13 | kill mips3_write_xcontext_upper | chuck |
| 2000-07-27 | convert PRID handling to use macros on an int, not bit-fields. | cgd |
| 2000-07-20 | Make pmap_prefer() use a global setting based on cache size | jeffs |
| 2000-06-29 | un-__P, clean up spacing a little bit, put fwd struct decl(s) near top | cgd |
| 2000-06-26 | Abandon {mips1,mips3}_TBRPL()s which have little gain. They were | nisimura |
| 2000-06-20 | 3rd argument of TBRPL() is not paddr_t but PTE. | soda |
| 2000-06-20 | Add mips3_write_config(). | soren |
| 2000-06-06 | Rename RM5200 cache ops to mips3_*_2way in anticipation of using them | soren |
| 2000-05-23 | MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD, | soren |
| 2000-05-21 | Include opt_cputype.h. | soren |
| 2000-05-10 | Have mips_locoresw[] of 3 entry pointer array for different | nisimura |
| 2000-04-12 | - Implement mips3_TBIAP(). | nisimura |
| 2000-03-28 | Don't `extern' function declarations. While we're there, remove trailing | simonb |
| 2000-03-27 | Have TBIA/TBIAP an argument refering to a global variable instead | nisimura |
| 2000-03-27 | - Rename some of TLB ops to have handy abbrivations hired from VAX and | nisimura |
| 2000-03-23 | Make MIPS1+MIPS3 compile again. | soren |
| 2000-03-19 | Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast. | soren |
| 2000-01-28 | CPU specific idle hook and VR idle routine. | takemura |
| 2000-01-09 | Prototype stacktrace() and logstacktrace(). | simonb |
| 1999-11-12 | Make sure wbflush symbol treated as a C function call. | nisimura |
| 1999-09-25 | Changes for NetBSD/hpcmips. | shin |
| 1999-04-24 | Nuke register and remove trailling white space. | simonb |
| 1999-02-27 | Define C structures (struct kernframe, struct trapframe) | jonathan |
| 1999-01-15 | * Add prototype for mips1_clean_tlb | castor |