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path: root/sys/arch/mips/include/locore.h
AgeCommit message (Expand)Author
2003-10-29Add some more MIPS vendor IDs.simonb
2003-10-05No need to include opt_mips_cache.h here.tsutsui
2002-11-04Use named indices for RA, SR, MULLO, MULHI, and EPC in thethorpej
2002-11-04Define named constants for the trapframe register idices (theythorpej
2002-06-03Add prototypes for the 64-bit pagezero functions.simonb
2002-06-01Use CPU_MIPS_USE_WAIT and CPU_MIPS_NO_WAIT in the CPU table, and usesimonb
2002-05-13Add a comment after an #endif to match up with an #ifdef.simonb
2002-03-11make this compile and work with MIPS3_5900.uch
2002-03-05Add support for MIPS32 and MIPS64 architectures:simonb
2001-11-14Merge the thorpej-mips-cache branch onto the trunk. This is anthorpej
2001-10-16R5900 support.uch
2001-08-18Reorder some function prototypes more logically.simonb
2001-08-15Add Alchemy and SiByte company IDs (from oss.sgi.com).simonb
2001-08-15Remove parameter names from function prototypes.simonb
2001-06-11Always indirect through the "locoresw" to get the cache ops, sincethorpej
2000-10-31Add mips_pagecopy/zero assembly loops for use by pmap_copy/zero_page*()jeffs
2000-10-31Add mips_indexof() macro to make code for checking the cache indexjeffs
2000-10-09mips1_ConfigCache() has gone.nisimura
2000-10-05clean up and consistency for CP0 Count, Compare, Wired, and Configcgd
2000-10-05nuke mips3_clearBEV(). There's really no point in coding acgd
2000-10-05tweak cpu_arch. Eliminate all direct checks of it (making themcgd
2000-10-04rename mips_read_causereg -> mips_cp0_cause_read. nuke prototypecgd
2000-10-03add some additional info re: MIPS32 PRID encoding, derived fromcgd
2000-10-02provide mips3_ld() and mips3_sd(), functions which provide safe wrapperscgd
2000-09-16Introduce new MIPS1 direct mapped cache capacity detection logics.nisimura
2000-09-16IDT32364's Config register uses a different base for IC/DC (instructionchuck
2000-09-13kill mips3_write_xcontext_upperchuck
2000-07-27convert PRID handling to use macros on an int, not bit-fields.cgd
2000-07-20Make pmap_prefer() use a global setting based on cache sizejeffs
2000-06-29un-__P, clean up spacing a little bit, put fwd struct decl(s) near topcgd
2000-06-26Abandon {mips1,mips3}_TBRPL()s which have little gain. They werenisimura
2000-06-203rd argument of TBRPL() is not paddr_t but PTE.soda
2000-06-20Add mips3_write_config().soren
2000-06-06Rename RM5200 cache ops to mips3_*_2way in anticipation of using themsoren
2000-05-23MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,soren
2000-05-21Include opt_cputype.h.soren
2000-05-10Have mips_locoresw[] of 3 entry pointer array for differentnisimura
2000-04-12- Implement mips3_TBIAP().nisimura
2000-03-28Don't `extern' function declarations. While we're there, remove trailingsimonb
2000-03-27Have TBIA/TBIAP an argument refering to a global variable insteadnisimura
2000-03-27- Rename some of TLB ops to have handy abbrivations hired from VAX andnisimura
2000-03-23Make MIPS1+MIPS3 compile again.soren
2000-03-19Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.soren
2000-01-28CPU specific idle hook and VR idle routine.takemura
2000-01-09Prototype stacktrace() and logstacktrace().simonb
1999-11-12Make sure wbflush symbol treated as a C function call.nisimura
1999-09-25Changes for NetBSD/hpcmips.shin
1999-04-24Nuke register and remove trailling white space.simonb
1999-02-27Define C structures (struct kernframe, struct trapframe)jonathan
1999-01-15* Add prototype for mips1_clean_tlbcastor